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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Cover SheetCustom
1 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Compal confidentialSchematics Document
Mobile Yonah uFCPGA with IntelCalistoga_GM/PM+ICH7-M core logic
REV:1.02005-12-15
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Block DiagramCustom
2 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
LPC BUS
File Name : LA-2841
Compal confidential
USB conn X3
Thermal SensorADM1032
CardBus Controller
Audio CKTAMOM
page 41
BT Conn
PCI BUS
Clock GeneratorICS 954306
page 15
CRT & TV OUT
LVDS PanelInterface
page 16
page 17
AMP & Audio Jackpage 40
page 4, 5, 6
page 33
Slot 0page 32
Card reader
page 27, 28, 29, 30
Power Circuit DC/DC
Fan Control
SPR CONN.
page 46
DC/DC Interface CKT.
TI PCI7412
page 39
MODEMAMOM
page 7, 8, 9, 10,11,12
New CardConnector x2
page 34
PCIE x3
AC-LINK
page 32
page 38
page 44
page 45
page 42page 42
page 41
3.3V 33 MHz
Power On/Off CKT.
page 4
page 35RJ45 CONN
10/100 LANpage 35
Int.KBD
ENE KB910/L
page 42
Touch Pad
page 47
BIOS
RTC CKT.
page 48~56
page 4
*RJ45 CONN*MIC IN JACK*LINE OUT JACK*1394 CONN *SPDIF CONN *DC JACK*TVOUT CONN*USB CONN x1*CIR x1
page 29
page 32
1394
Mobile YonahuFCBGA-479/uFCPGA-478 CPU
FSB533/667MHz
H_A#(3..31)H_D#(0..63)
PCBGA 1466
Intel Calistoga GMCH
DMI
mBGA-652
Intel ICH7-M
Mini-PCIE Cardpage 37
PCI-E x 16
NvidiaNV71/72M
page 18,19,20,21,26BANK 0, 1, 2, 3DDR2-SO-DIMM X2DDR2 -400/533/667
page 13,14
Dual Channel
SATA HDDConnector x2
PATA CDROM Connector
page 31
page 31
USB2.0LAN I/F
VRAM128/256MB
page 22,23,24,25
ZZZ
PCB
A
A
1 1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Notes ListCustom
3 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
PCI Devices
EXTERNAL
CARD BUS & 1394
O MEANS ON
X MEANS OFF
AD22 2 C,D,E,G
State
+1.5VS+1.8V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
O
O
X
+0.9VS
Voltage Rails
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+2.5VS
+CPU_CORE
+1.8VS
OO
OO
X
X X
+VCCP
powerplane
+5V+VGA_CORE
+1.2VS
+B
LDO3
LDO5
O
O
O
O
O
X
S5 S4/ Battery only
X X X
IDSEL# REQ/GNT# PIRQ
Load BOM check item1.U31 GM/PM/GML part number2.U6 ICH7 part number3.VRAM part number and Page26 RAM_CFG[0:3]/PCI_DEVID[0:3] modify check4.For NV73 R510/R75/R533/R168 change to 499ohm5.U33 NV7x part number
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A#28
H_THERMDA
H_FERR#
H_ADSTB#0
H_A#23
H_REQ#2
H_A#31
H_REQ#0
H_A#17
H_BNR#
H_A#29
H_DSTBP#0
H_A#8
H_DEFER#
H_REQ#1
H_A#3
H_RS#0
H_A#6
ITP_BPM#2
H_BPRI#
H_ADS#
H_A#25
ITP_BPM#3
H_RS#1
H_DSTBP#1
H_A#4
H_IERR#H_HITM#
H_INTR
H_A#22
H_A#7
H_REQ#4
ITP_DBRESET#
H_DRDY#
H_A#15H_A#14
H_A20M#
H_DINV#0
H_DSTBP#2
H_DINV#2H_DINV#3
H_DINV#1
H_DSTBP#3
H_NMI
H_A#30
H_A#27
H_A#18
H_A#10
H_BR0#
H_LOCK#
H_A#11
H_A#21
H_A#26
H_A#13
H_A#9
ITP_BPM#0
H_DPSLP#
H_A#20
H_A#16
H_A#12
H_HIT#
H_ADSTB#1
H_THERMTRIP#
H_DBSY#
H_A#19
H_A#24
H_A#5
H_RS#2
H_RESET#
ITP_BPM#1
H_REQ#3
H_SMI#H_STPCLK#
ITP_TCK
ITP_TRST#ITP_TMS
H_CPUSLP#
ITP_TDOITP_TDI
H_PWRGOOD
ITP_BPM#5
H_DPRSTP#
H_TRDY#
CLK_CPU_BCLKCLK_CPU_BCLK#
EC_SMC_2EC_SMD_2
H_THERMDA
H_THERMDC
THERM#
EC_SMD_2
EC_SMC_2
H_THERMDC
ITP_BPM#4H_DPWR#
TEST1TEST2 H_INIT#
H_IGNNE#
H_PROCHOT#
H_PROCHOT# OCP#
H_DPSLP#
H_DPRSTP#
ITP_TCK
ITP_BPM#5
ITP_TMS
ITP_TDO
ITP_TDI
ITP_TRST#
ITP_BPM#4
ITP_BPM#0
ITP_BPM#2ITP_BPM#3
ITP_BPM#1
ITP_DBRESET#
H_D#53
H_D#10
H_D#7
H_D#37
H_D#57
H_D#26
H_D#54
H_D#41
H_D#35
H_D#19
H_D#52
H_D#45
H_D#48
H_D#3
H_D#15
H_D#39
H_D#0
H_D#38
H_D#23
H_D#46
H_D#36
H_D#56
H_D#27
H_D#40
H_D#44
H_D#31
H_D#61
H_D#13
H_D#2
H_D#50
H_D#29
H_DSTBN#3
H_D#17
H_DSTBN#0
H_D#33
H_DSTBN#1
H_D#9
H_D#11
H_D#58
H_D#21
H_D#30
H_D#14
H_D#42
H_D#60
H_D#12
H_D#28
H_D#25
H_D#1
H_D#55
H_D#32
H_D#16
H_D#4
H_D#8
H_D#5
H_D#59
H_D#22
H_DSTBN#2
H_D#20
H_D#43
H_D#63H_D#62
H_D#24
H_D#47
H_D#18
H_D#6
H_D#49
H_D#51
H_D#34
FAN1
FAN1
EC_SMD_2<44>EC_SMC_2<44>
H_D#[0..63] <7>H_A#[3..31]<7>
H_REQ#[0..4]<7>
H_ADSTB#0<7>H_ADSTB#1<7>
CLK_CPU_BCLK#<15>CLK_CPU_BCLK<15>
H_ADS#<7>H_BNR#<7>
H_BR0#<7>
H_DRDY#<7>H_HIT#<7>
H_HITM#<7>
H_BPRI#<7>
H_DEFER#<7>
H_LOCK#<7>H_RESET#<7>
H_RS#[0..2]<7>
H_TRDY#<7>
H_DBSY#<7>H_DPSLP#<28>
H_DPRSTP#<28,53>H_DPWR#<7>
H_PWRGOOD<28>H_CPUSLP#<7>
H_THERMTRIP#<7,28>
H_DINV#0 <7>H_DINV#1 <7>H_DINV#2 <7>H_DINV#3 <7>
H_DSTBN#[0..3] <7>
H_DSTBP#[0..3] <7>
H_A20M# <28>H_FERR# <28>H_IGNNE# <28>H_INIT# <28>H_INTR <28>H_NMI <28>
H_STPCLK# <28>H_SMI# <28>
ITP_DBRESET#<29>
H_PROCHOT#<53>
OCP# <29>
FAN_SPEED1<44>
EN_FAN1<44>
+VCCP
+3VS
+3VS
+VCCP
+VCCP
+VCCP
+5VS +3VS
+VCCP
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Yonah CPU in mFCPGA479Custom
4 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
H_THERMDA, H_THERMDC routing together.Trace width / Spacing = 10 / 10 mil
Thermal Sensor ADM1032AR
Address:100_1100
This shall place near CPU
FAN control
R4 56_0402_5%1 2
R5 56_0402_5%1 2
C7621000P_0402_50V7K
1
2
R457
56_0402_5%@
12
R6 56_0402_5%1 2
U40
G993P1UF_SOP8
VEN1VIN2
GND 5GND 6
GND 8
VO3VSET4
GND 7
T1PAD
R1 56_0402_5%1 2
R3 56_0402_5%1 2
R456 1K_0402_5%@1 2
C598
0.1U_0402_16V4Z1
2
JP30
ACES_85205-0300
123
R181 200_0402_5%@1 2
D281SS355_SOD323
12
C76
110
00P_
0402
_50V
7K
1
2
U30
ADM1032AR_SOP8
VDD1
ALERT# 6
THERM#4 GND 5
D+2
D-3
SCLK 8
SDATA 7
R458
10K_0402_5%
1 2
T4PAD
ADDR GROUP
CONTROL
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
YONAHJP16A
FOX_PZ47903-2741-42_YONAH
A3#J4A4#L4A5#M3A6#K5A7#M1A8#N2A9#J1A10#N3A11#P5A12#P2A13#L1A14#P4A15#P1A16#R1A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5A23#U2A24#R4A25#T5A26#T3A27#W3A28#W5A29#Y4A30#W2A31#Y1
REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L5
ADSTB0#L2ADSTB1#V4
BCLK0A22BCLK1A21
ADS#H1BNR#E2BPRI#G5BR0#F1DEFER#H5DRDY#F21HIT#G6HITM#E4IERR#D20LOCK#H4RESET#B1
RS0#F3RS1#F4RS2#G3TRDY#G2
BPM0#AD4BPM1#AD3BPM2#AD1BPM3#AC4
DBR#C20DBSY#E1DPSLP#B5
DPWR#D24PRDY#AC2PREQ#AC1PROCHOT#D21
PWRGOODD6SLP#D7TCKAC5TDIAA6TDOAB3TEST1C26TEST2D25TMSAB5TRST#AB6
THERMDAA24THERMDCA25THERMTRIP#C7
D0# E22D1# F24D2# E26D3# H22D4# F23D5# G25D6# E25D7# E23D8# K24D9# G24
D10# J24D11# J23D12# H26D13# F26D14# K22D15# H25D16# N22D17# K25D18# P26D19# R23D20# L25D21# L22D22# L23D23# M23D24# P25D25# P22D26# P23D27# T24D28# R24D29# L26D30# T25D31# N24D32# AA23D33# AB24D34# V24D35# V26D36# W25D37# U23D38# U25D39# U22D40# AB25D41# W22D42# Y23D43# AA26D44# Y26D45# Y22D46# AC26D47# AA24D48# AC22D49# AC23D50# AB22D51# AA21D52# AB21D53# AC25D54# AD20D55# AE22D56# AF23D57# AD24D58# AE21D59# AD21D60# AE25D61# AF25D62# AF22D63# AF26
DINV0# J26DINV1# M26DINV2# V23DINV3# AC20
DSTBN0# H23DSTBN1# M24DSTBN2# W24DSTBN3# AD23DSTBP0# G22DSTBP1# N25DSTBP2# Y25DSTBP3# AE24
A20M# A6FERR# A5
IGNNE# C4INIT# B3
LINT0 C6LINT1 B4
STPCLK# D5SMI# A3
DPRSTP#E5
R55110K_0402_5%
12
D22BAS16_SOT23
1
3 2
T2PAD
R1875_0402_5% 1 2
C592
2200P_0402_50V7K
1 2
C76
310
U_0
805_
10V4
Z
1
2
R455 51_0402_5% 1 2
R2 56_0402_5%1 2
R436
56_0402_5%@
1 2
R1756_0402_5%
1 2
EB
C
Q35MMBT3904_SOT23@
2
3 1
T3PAD
T5PAD
T27PAD
C765 10U_1206_16V4Z 1 2
R437
56_0402_5%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
COMP3COMP2
H_PSI#
COMP1COMP0
CPU_VID1CPU_VID0
CPU_VID3CPU_VID4
CPU_VID2
CPU_VID5CPU_VID6
CPU_BSEL1CPU_BSEL2
CPU_BSEL0
VSSSENSEVCCSENSE
VSSSENSE
VCCSENSE
H_PSI#<53>
CPU_VID0<53>CPU_VID1<53>CPU_VID2<53>CPU_VID3<53>CPU_VID4<53>CPU_VID5<53>CPU_VID6<53>
CPU_BSEL0<15>CPU_BSEL1<15>CPU_BSEL2<15>
VCCSENSE<53>VSSSENSE<53>
+VCCP
+CPU_CORE
+VCCP
V_CPU_GTLREF
V_CPU_GTLREF
+1.5VS
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Yonah CPU in mFCPGA479Custom
5 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.
Close to CPU pin AD26within 500mils.
CPU_BSEL CPU_BSEL2 CPU_BSEL1
133
166
0 0
0 1
CPU_BSEL0
1
1
Length match within 25 milsThe trace width 18 mils space7 mils
Close to CPU pinwithin 500mils.
R4512K_0402_1%
12
C58
60.
01U
_040
2_16
V7K
1
2
R4541K_0402_1%
12
R43
927
.4_0
402_
1%
12
R45
327
.4_0
402_
1%
12
R43
854
.9_0
402_
1%
12
R442100_0402_1%
1 2
POWER, GROUND
YONAH
JP16C
FOX_PZ47903-2741-42_YONAH
VCCAE18VCCAE17VCCAB15VCCAA15VCCAD15VCCAC15VCCAF15VCCAE15VCCAB14VCCAA13VCCAD14VCCAC13VCCAF14VCCAE13VCCAB12VCCAA12VCCAD12VCCAC12VCCAF12VCCAE12VCCAB10VCCAB9VCCAA10VCCAA9VCCAD10VCCAD9VCCAC10VCCAC9VCCAF10VCCAF9VCCAE10VCCAE9VCCAB7VCCAA7VCCAD7VCCAC7VCCB20VCCA20VCCF20VCCE20VCCB18VCCB17VCCA18VCCA17VCCD18VCCD17VCCC18VCCC17VCCF18VCCF17VCCE18VCCE17VCCB15VCCA15VCCD15VCCC15VCCF15VCCE15
VSS K1VSS J2VSS M2VSS N1VSS T1VSS R2VSS V2VSS W1VSS A26VSS D26VSS C25VSS F25VSS B24VSS A23VSS D23VSS E24VSS B21VSS C22VSS F22VSS E21VSS B19VSS A19VSS D19VSS C19VSS F19VSS E19VSS B16VSS A16VSS D16VSS C16VSS F16VSS E16VSS B13VSS A14VSS D13VSS C14VSS F13VSS E14VSS B11VSS A11VSS D11VSS C11VSS F11VSS E11VSS B8VSS A8VSS D8VSS C8VSS F8VSS E8VSS G26VSS K26VSS J25VSS M25VSS N26VSS T26VSS R25VSS V25VSS W26VSS H24VSS G23VSS K23VSS L24VSS P24VSS N23VSS T23VSS U24VSS Y24VSS W23VSS H21VSS J22VSS M22VSS L21VSS P21VSS R22VSS V22VSS U21VSS Y21
VCCB14VCCA13VCCD14VCCC13VCCF14VCCE13VCCB12VCCA12VCCD12VCCC12VCCF12VCCE12VCCB10VCCB9VCCA10VCCA9VCCD10VCCD9VCCC10VCCC9VCCF10VCCF9VCCE10VCCE9VCCB7
VCCF7 VCCA7
R441100_0402_1%
1 2
C58
710
U_0
805_
10V4
Z
1
2
R45
254
.9_0
402_
1%
12
POWER, GROUNG, RESERVED SIGNALS AND NC
YONAH
JP16B
FOX_PZ47903-2741-42_YONAH
PSI#AE6
GTLREFAD26
VCCSENSEAF7
VCCAB26
VCCAB20VCCAA20VCCAF20VCCAE20VCCAB18VCCAB17VCCAA18VCCAA17VCCAD18VCCAD17VCCAC18VCCAC17VCCAF18VCCAF17
RSVDT22
RSVDV3RSVDB2RSVDC3
VSS AB26VSS AA25VSS AD25VSS AE26VSS AB23VSS AC24VSS AF24VSS AE23VSS AA22VSS AD22VSS AC21VSS AF21VSS AB19VSS AA19VSS AD19VSS AC19VSS AF19VSS AE19VSS AB16VSS AA16VSS AD16VSS AC16VSS AF16VSS AE16VSS AB13VSS AA14VSS AD13VSS AC14VSS AF13VSS AE14VSS AB11VSS AA11VSS AD11VSS AC11VSS AF11VSS AE11VSS AB8VSS AA8VSS AD8VSS AC8VSS AF8VSS AE8VSS AA5VSS AD5VSS AC6VSS AF6VSS AB4VSS AC3VSS AF3VSS AE4VSS AB1VSS AA2VSS AD2VSS AE1VSS B6VSS C5VSS F5VSS E6VSS H6VSS J5VSS M5VSS L6VSS P6VSS R5VSS V5VSS U6VSS Y6VSS A4VSS D4VSS E3VSS H3VSS G4VSS K4VSS L3VSS P3VSS N4VSS T4VSS U3VSS Y3VSS W4VSS D1VSS C2VSS F2VSS G1RSVDB25
VSSSENSEAE7
VCCPK6VCCPJ6VCCPM6VCCPN6VCCPT6VCCPR6VCCPK21VCCPJ21VCCPM21VCCPN21VCCPT21VCCPR21VCCPV21VCCPW21VCCPV6VCCPG21
VID0AD6VID1AF5VID2AE5VID3AF4VID4AE3VID5AF2VID6AE2
BSEL0B22BSEL1B23BSEL2C21
COMP0R26COMP1U26COMP2U1COMP3V1
RSVDC23RSVDC24RSVDAA1RSVDAA4RSVDAB2RSVDAA3RSVDM4RSVDN5RSVDT2
RSVDD2RSVDF6RSVDD3RSVDC1RSVDAF1RSVDD22
VCCE7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCP
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
CPU Bypass capacitorsCustom
6 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Mid Frequence Decoupling
ESR <= 1.5m ohmCapacitor > 1980uF
Place these capacitors on L8(North side,Secondary Layer)
South Side Secondary
Place these insidesocket cavity on L8(North sideSecondary)
North Side Secondary
Place these capacitors on L8(North side,Secondary Layer)
Place these capacitors on L8(Sorth side,Secondary Layer)
Place these capacitors on L8(Sorth side,Secondary Layer)
+
C58
433
0U_V
_2.5
VK_
R9
1
2
C440.1U_0402_16V4Z
1
2
C1110U_0805_6.3V6M
1
2
C1310U_0805_6.3V6M
1
2
C210U_0805_6.3V6M
1
2
C3810U_0805_6.3V6M
1
2
C610U_0805_6.3V6M
1
2
C2310U_0805_6.3V6M
1
2
C2110U_0805_6.3V6M
1
2
C1010U_0805_6.3V6M
1
2
C4210U_0805_6.3V6M
1
2
C4010U_0805_6.3V6M
1
2
C4110U_0805_6.3V6M
1
2
C30.1U_0402_16V4Z
1
2
C3410U_0805_6.3V6M
1
2
C1210U_0805_6.3V6M
1
2
C1910U_0805_6.3V6M
1
2
C450.1U_0402_16V4Z
1
2
C1410U_0805_6.3V6M
1
2
+C8
330U
_V_2
.5V
K_R
9@
1
2
C2410U_0805_6.3V6M
1
2
C3510U_0805_6.3V6M
1
2
C3910U_0805_6.3V6M
1
2
C1610U_0805_6.3V6M
1
2
C4810U_0805_6.3V6M
1
2
C1810U_0805_6.3V6M
1
2
C430.1U_0402_16V4Z
1
2
C2710U_0805_6.3V6M
1
2
+
C58
533
0U_V
_2.5
VK_
R9
@1
2
C110U_0805_6.3V6M
1
2
C2810U_0805_6.3V6M
1
2
C3610U_0805_6.3V6M
1
2
+
C57
882
0U_E
9_2_
5V_M
_R7
@
1
2
C3110U_0805_6.3V6M
1
2
C2210U_0805_6.3V6M
1
2
+C591
220U_D2_4VM
1
2
C40.1U_0402_16V4Z
1
2
C50.1U_0402_16V4Z
1
2
+
C58
382
0U_E
9_2_
5V_M
_R7
@
1
2
+
C57
633
0U_V
_2.5
VK_
R9
1
2
C1510U_0805_6.3V6M
1
2
C3010U_0805_6.3V6M
1
2
+
C47
330U
_V_2
.5V
K_R
9
1
2
C3210U_0805_6.3V6M
1
2
C2610U_0805_6.3V6M
1
2
C3310U_0805_6.3V6M
1
2
+
C37
330U
_V_2
.5V
K_R
9
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A AH_SWNG0
H_VREF
PM_EXTTS#0
V_DDR_MCH_REF
DPRSLPVR
H_RS#0
H_ADSTB#1
H_SWNG1
H_XRCOMP
CFG3
DMI_TXP1
H_REQ#0
CFG7
CFG5
DDR_CKE0_DIMMA
M_CLK_DDR3
DMI_RXN2
H_HIT#
H_DSTBP#0
H_REQ#4
H_SWNG0
CFG15
DDR_CKE1_DIMMA
M_OCDOCMP0
DMI_TXN1DMI_TXN0
H_BNR#
H_REQ#2
M_ODT1
DMI_TXP2
H_DSTBP#2
CLK_MCH_3GPLL
CFG13
M_CLK_DDR#0
DMI_RXP2
H_REQ#3
CFG9
H_DINV#2
CLK_MCH_BCLK#
H_REQ#1
H_YSCOMP
ICH_POK
MCH_CLKSEL0
DDR_CKE3_DIMMB
H_BPRI#
H_DINV#0
CFG18
CFG4
M_CLK_DDR#1
DMI_RXP1DMI_RXP0
DMI_TXP0
H_CPUSLP#
H_DPWR#
H_ADS#
H_DSTBP#3
H_DSTBN#3
CFG16
DMI_RXN1
CLK_MCH_BCLK
PLTRST_R#
CFG19
CFG12
DDR_CS1_DIMMA#
SMRCOMPN
H_DSTBP#1
H_DINV#3
H_RS#2
H_ADSTB#0
CFG17
CFG8
CFG6
DDR_CKE2_DIMMB
DMI_RXN0
H_LOCK#
H_RESET#
M_ODT3
M_OCDOCMP1
M_CLK_DDR#2
DMI_TXP3
DMI_TXN3
H_DBSY#
H_BR0#
H_DSTBN#1H_DSTBN#0
CLK_MCH_3GPLL#
CFG20
H_DSTBN#2
H_RS#1
H_XSCOMP
CFG10
MCH_CLKSEL2
DDR_CS0_DIMMA#
SMRCOMPP
M_CLK_DDR#3
PM_BMBUSY#
CFG11
DDR_CS3_DIMMB#
DMI_RXN3
H_HITM#
H_DRDY#
PM_EXTTS#0
DDR_CS2_DIMMB#
M_ODT2
M_ODT0
H_DEFER#
H_TRDY#
H_DINV#1
H_THERMTRIP#
CFG14
M_CLK_DDR2M_CLK_DDR1M_CLK_DDR0
H_VREF
H_YRCOMP
DMI_TXN2
DMI_RXP3
DPRSLPVR
MCH_CLKSEL1
H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7
H_D#11
H_D#13
H_D#9
H_D#14
H_D#8
H_D#15
H_D#12
H_D#10
H_D#19
H_D#21
H_D#17
H_D#22
H_D#16
H_D#23
H_D#20
H_D#18
H_D#27
H_D#29
H_D#25
H_D#30
H_D#24
H_D#31
H_D#28
H_D#26
H_D#35
H_D#37
H_D#33
H_D#38
H_D#32
H_D#39
H_D#36
H_D#34
H_D#43
H_D#45
H_D#41
H_D#46
H_D#40
H_D#47
H_D#44
H_D#42
H_D#51
H_D#53
H_D#49
H_D#54
H_D#48
H_D#52
H_D#50
H_D#55
H_D#59
H_D#61
H_D#57
H_D#62
H_D#56
H_D#63
H_D#60
H_D#58
H_SWNG1
H_A#3H_A#4H_A#5H_A#6H_A#7
H_A#11
H_A#8
H_A#10
H_A#12
H_A#9
H_A#13
H_A#15
H_A#17
H_A#14
H_A#21
H_A#18
H_A#20
H_A#22
H_A#19
H_A#26
H_A#23
H_A#25
H_A#27
H_A#24
H_A#31
H_A#28
H_A#30H_A#29
H_A#16
CLKREQB#
CLK_MCH_DREFCLK#CLK_MCH_DREFCLK
V_DDR_MCH_REF
MCH_SSCDREFCLK#MCH_SSCDREFCLK
H_D#[0..63]<4> H_A#[3..31] <4>
H_REQ#[0..4] <4>
H_ADSTB#1 <4>H_ADSTB#0 <4>
CLK_MCH_BCLK# <15>CLK_MCH_BCLK <15>H_DSTBN#[0..3] <4>
H_DSTBP#[0..3] <4>
H_DINV#0 <4>H_DINV#1 <4>H_DINV#2 <4>H_DINV#3 <4>
H_RESET# <4>H_ADS# <4>H_TRDY# <4>H_DPWR# <4>H_DRDY# <4>H_DEFER# <4>
H_BR0# <4>H_BNR# <4>H_BPRI# <4>H_DBSY# <4>H_CPUSLP# <4>
H_HITM# <4>H_HIT# <4>H_LOCK# <4>
H_RS#[0..2] <4>
DMI_TXN0<29>DMI_TXN1<29>DMI_TXN2<29>DMI_TXN3<29>
DMI_TXP0<29>DMI_TXP1<29>DMI_TXP2<29>DMI_TXP3<29>
DMI_RXN0<29>DMI_RXN1<29>DMI_RXN2<29>DMI_RXN3<29>
DMI_RXP0<29>DMI_RXP1<29>DMI_RXP2<29>DMI_RXP3<29>
M_CLK_DDR0<13>M_CLK_DDR1<13>M_CLK_DDR2<14>M_CLK_DDR3<14>
M_CLK_DDR#0<13>M_CLK_DDR#1<13>M_CLK_DDR#2<14>M_CLK_DDR#3<14>
DDR_CS0_DIMMA#<13>DDR_CS1_DIMMA#<13>DDR_CS2_DIMMB#<14>DDR_CS3_DIMMB#<14>
DDR_CKE0_DIMMA<13>DDR_CKE1_DIMMA<13>DDR_CKE2_DIMMB<14>DDR_CKE3_DIMMB<14>
M_ODT0<13>M_ODT1<13>M_ODT2<14>M_ODT3<14>
PM_BMBUSY#<29>
H_THERMTRIP#<4,28>
PLT_RST#<27,31,32,34,37>
MCH_ICH_SYNC#<27>
V_DDR_MCH_REF<13,14>
MCH_CLKSEL0 <15>
CFG5 <11>
CFG7 <11>
CFG9 <11>
CFG12 <11>CFG13 <11>
MCH_CLKSEL2 <15>MCH_CLKSEL1 <15>
CFG16 <11>
CFG18 <11>CFG19 <11>CFG20 <11>
CLK_MCH_3GPLL <15>CLK_MCH_3GPLL# <15>
CLKREQB# <15>
CLK_MCH_DREFCLK# <15>CLK_MCH_DREFCLK <15>
MCH_SSCDREFCLK# <15>MCH_SSCDREFCLK <15>
CFG11 <11>
ICH_POK<29,44>
PM_EXTTS#0<13,14>DPRSLPVR<29,53>
+VCCP
+VCCP+VCCP
+VCCP
+3VS
+1.8V
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Calistoga (1/6)Custom
7 60Friday, December 16, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Layout Note:H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /H_SWNG1 trace width and spacing is 10/20.
Description at page15.
Layout Note: V_DDR_MCH_REFtrace width andspacing is 20/20.
T8PAD
R42
200_
0402
_1%
12
T17 PAD
R46
154
.9_0
402_
1%
12
T14PAD
R481
100_0402_1%
12 R79
10K_0402_5%@1 2
T10PAD
DM
ID
DR
MU
CFG
PM
CLK
NC
RES
ERVE
D
U31B
CALISTOGA_FCBGA1466~D
DMIRXN0AE35DMIRXN1AF39DMIRXN2AG35DMIRXN3AH39
DMIRXP0AC35DMIRXP1AE39DMIRXP2AF35DMIRXP3AG39
DMITXN0AE37DMITXN1AF41DMITXN2AG37DMITXN3AH41
DMITXP0AC37DMITXP1AE41DMITXP2AF37DMITXP3AG41
SM_CK0AY35SM_CK1AR1SM_CK2AW7SM_CK3AW40
SM_CK0#AW35SM_CK1#AT1SM_CK2#AY7SM_CK3#AY40
SM_OCDCOMP0AL20SM_OCDCOMP1AF10
SM_ODT0BA13SM_ODT1BA12SM_ODT2AY20SM_ODT3AU21
SM_RCOMPNAV9SM_RCOMPPAT9
SM_VREF0AK1SM_VREF1AK41
SM_CKE0AU20SM_CKE1AT20SM_CKE2BA29SM_CKE3AY29
SM_CS0#AW13SM_CS1#AW12SM_CS2#AY21SM_CS3#AW21
CFG16 G18
CFG1 K18CFG2 J18CFG3 F18CFG4 E15CFG5 F15CFG6 E18CFG7 D19CFG8 D16CFG9 G16
CFG10 E16CFG11 D15CFG12 G15CFG13 K15CFG14 C15CFG15 H16
CFG0 K16
CFG17 H15CFG18 J25CFG19 K27CFG20 J26
G_CLKP AG33G_CLKN AF33
D_REF_CLKN A27D_REF_CLKP A26
D_REF_SSCLKN C40D_REF_SSCLKP D41
NC0 A3NC1 A39NC2 A4NC3 A40NC4 AW1NC5 AW41NC6 AY1NC7 BA1NC8 BA2NC9 BA3
NC10 BA39NC11 BA40NC12 BA41NC13 C1NC14 AY41NC15 B2NC16 B41NC17 C41NC18 D1
PM_BMBUSY#G28PM_EXTTS0#F25PM_EXTTS1#H26PM_THERMTRIP#G6PWROKAH33RSTIN#AH34
RESERVED1 T32RESERVED2 R32RESERVED3 F3RESERVED4 F7RESERVED5 AG11RESERVED6 AF11RESERVED7 H7RESERVED8 J19RESERVED9 A41
RESERVED10 A34RESERVED11 D28RESERVED12 D27RESERVED13 A35
ICH_SYNC#K28
CLK_REQ# H32
T16PAD
C82
0.1U
_040
2_16
V4Z
1
2
R46
424
.9_0
402_
1%
12
R45
100_
0402
_1%
12
T11 PAD
R38
221_
0603
_1%
12
R7110K_0402_5%
12
C87
0.1U
_040
2_16
V4Z
1
2
R98 100_0402_1%
12
T7PAD
R37
100_
0402
_1%
12
R46
254
.9_0
402_
1%
12
T9PAD
C66
30.
1U_0
402_
16V4
Z
1
2
R46
624
.9_0
402_
1%
12
R46
3
221_
0603
_1%
12
T6PAD
HOST
U31A
CALISTOGA_FCBGA1466~D
HD0#F1HD1#J1HD2#H1HD3#J6HD4#H3HD5#K2HD6#G1HD7#G2HD8#K9HD9#K1HD10#K7HD11#J8HD12#H4HD13#J3HD14#K11HD15#G4HD16#T10HD17#W11HD18#T3HD19#U7HD20#U9HD21#U11HD22#T11HD23#W9HD24#T1HD25#T8HD26#T4HD27#W7HD28#U5HD29#T9HD30#W6HD31#T5HD32#AB7HD33#AA9HD34#W4HD35#W3HD36#Y3HD37#Y7HD38#W5HD39#Y10HD40#AB8HD41#W2HD42#AA4HD43#AA7HD44#AA2HD45#AA6HD46#AA10HD47#Y8HD48#AA1HD49#AB4HD50#AC9HD51#AB11HD52#AC11HD53#AB3HD54#AC2HD55#AD1HD56#AD9HD57#AC1HD58#AD7HD59#AC6HD60#AB5HD61#AD10HD62#AD4HD63#AC8
HVREF1K13HXRCOMPE1HXSCOMPE2HYRCOMPY1HYSCOMPU1HXSWINGE4HYSWINGW1
HA3# H9HA4# C9HA5# E11HA6# G11HA7# F11HA8# G12HA9# F9
HA10# H11HA11# J12HA12# G14HA13# D9HA14# J14HA15# H13HA16# J15HA17# F14HA18# D12HA19# A11HA20# C11HA21# A12HA22# A13HA23# E13HA24# G13HA25# F12HA26# B12HA27# B14HA28# C12HA29# A14HA30# C14HA31# D14
HREQ#0 D8HREQ#1 G8HREQ#2 B8HREQ#3 F8HREQ#4 A8
HADSTB#0 B9HADSTB#1 C13
HRS0# B4HRS1# E6HRS2# D6
HCLKN AG1HCLKP AG2
HDINV#0 J7HDINV#1 W8HDINV#2 U3HDINV#3 AB10
HDSTBN#0 K4HDSTBN#1 T7HDSTBN#2 Y5HDSTBN#3 AC4HDSTBP#0 K3HDSTBP#1 T6HDSTBP#2 AA5HDSTBP#3 AC5
HCPURST# B7HADS# E8
HTRDY# E7HDPWR# J9HDRDY# H8
HDEFER# C3HHITM# D4
HHIT# D3HLOCK# B3
HBREQ0# C7HBNR# C6HBPRI# F6
HDBSY# A7HCPUSLP# E3
HVREF0J13
C60
10.
1U_0
402_
16V4
Z
1
2
R483
100_0402_1%
12
T12PAD
R40 80.6_0402_1%
1 2
R46
5
100_
0402
_1%
12
R41 80.6_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_D11
DDR_B_D57
DDR_B_D46
DDR_B_D7
DDR_B_D0
DDR_B_D44
DDR_B_D40
DDR_B_D30
DDR_B_D27
DDR_B_D15
DDR_B_D3
DDR_B_D35
DDR_B_D25
DDR_B_D23
DDR_B_D49
DDR_B_D37
DDR_B_D19
DDR_B_D48DDR_B_D47
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D62
DDR_B_D60
DDR_B_D9
DDR_B_D2
DDR_B_D52
DDR_B_D50
DDR_B_D22
DDR_B_D56
DDR_B_D51
DDR_B_D39
DDR_B_D28
DDR_B_D17
DDR_B_D45
DDR_B_D6
DDR_B_D61
DDR_B_D58
DDR_B_D1
DDR_B_D54
DDR_B_D41
DDR_B_D31
DDR_B_D12
DDR_B_D5
DDR_B_D38
DDR_B_D32
DDR_B_D20
DDR_B_D16
DDR_B_D14
DDR_B_D33
DDR_B_D63
DDR_B_D59
DDR_B_D42
DDR_B_D55
DDR_B_D53
DDR_B_D43
DDR_B_D29
DDR_B_D26
DDR_B_D13
DDR_B_D4
DDR_B_BS#2
DDR_B_D34
DDR_B_D24
DDR_B_D21
DDR_B_D10
DDR_B_WE#DDR_B_RAS#
DDR_A_D35
DDR_A_D15DDR_A_D14
DDR_A_D21
DDR_A_BS#2
DDR_A_D28
DDR_A_D11
DDR_A_D7
DDR_A_WE#
DDR_A_D31
DDR_A_D16
DDR_A_D59
DDR_A_D56
DDR_A_D42
DDR_A_D25
DDR_A_D9
DDR_A_D60
DDR_A_D55
DDR_A_D13
DDR_A_D0
DDR_A_D62
DDR_A_D3
DDR_A_D1
DDR_A_D41
DDR_A_D20
DDR_A_D43
DDR_A_D24
DDR_A_CAS#
DDR_A_D54
DDR_A_D52
DDR_A_D33
DDR_A_D12
DDR_A_D19
DDR_A_D46
DDR_A_D23
DDR_A_D18
DDR_A_D63
DDR_A_D34
DDR_A_D26
DDR_A_D22
SA_RCVENIN#SA_RCVENOUT#
SB_RCVENIN#SB_RCVENOUT#
DDR_A_D27
DDR_A_D2
DDR_A_D32
DDR_A_D6
DDR_A_D49
DDR_A_D47
DDR_A_D58
DDR_A_D40
DDR_A_D36
DDR_A_D5
DDR_A_D48
DDR_A_D10
DDR_A_D8
DDR_A_D57
DDR_A_D39
DDR_A_D37
DDR_A_D30
DDR_A_D4
DDR_A_D45
DDR_A_D53
DDR_A_D51
DDR_A_D17
DDR_A_D38
DDR_A_D29
DDR_A_D44
DDR_A_D50
DDR_A_D61
DDR_A_DQS6DDR_B_DQS7
DDR_B_MA9
DDR_A_MA13
DDR_A_MA7
DDR_A_DM1
DDR_A_MA5
DDR_A_DM7
DDR_B_MA0
DDR_A_DQS7
DDR_A_DM5
DDR_B_MA7
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DM3
DDR_B_DQS1
DDR_B_DM1
DDR_A_BS#0
DDR_A_DQS#6
DDR_B_DQS5
DDR_B_DM0
DDR_A_MA4
DDR_A_MA8
DDR_A_DQS#7
DDR_A_MA10
DDR_A_DQS5
DDR_A_DM2
DDR_A_DQS0
DDR_B_MA2
DDR_B_MA13
DDR_B_DM5
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_BS#1
DDR_A_DQS#1
DDR_A_MA2
DDR_B_MA4
DDR_A_DQS#5
DDR_B_DM6
DDR_B_DQS4
DDR_A_DQS1
DDR_A_MA9
DDR_A_DQS4
DDR_A_DM0
DDR_A_MA0
DDR_B_MA5
DDR_A_DM4
DDR_A_DQS#2
DDR_A_DQS3
DDR_B_MA3
DDR_A_MA11 DDR_B_MA11
DDR_B_BS#0
DDR_A_DM6
DDR_B_MA6DDR_A_MA6
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_A_DQS#0
DDR_A_DM3
DDR_A_MA3
DDR_A_MA12
DDR_B_MA8
DDR_A_DQS2
DDR_B_DQS#0
DDR_B_MA10
DDR_B_DM7
DDR_A_MA1
DDR_B_MA12
DDR_B_DQS#2
DDR_B_DM4
DDR_B_DQS#6
DDR_B_MA1
DDR_B_DQS2
DDR_B_DQS6
DDR_B_DM2
DDR_A_DQS#3DDR_A_DQS#4
DDR_A_RAS#DDR_B_CAS#
DDR_A_BS#1DDR_A_BS#0<13>DDR_A_BS#1<13>DDR_A_BS#2<13>
DDR_A_DM[0..7]<13>
DDR_A_DQS[0..7]<13>
DDR_A_DQS#[0..7]<13>
DDR_A_MA[0..13]<13>
DDR_A_CAS#<13>DDR_A_RAS#<13>DDR_A_WE#<13>
DDR_B_BS#0<14>DDR_B_BS#1<14>DDR_B_BS#2<14>
DDR_B_DM[0..7]<14>
DDR_B_DQS[0..7]<14>
DDR_B_DQS#[0..7]<14>
DDR_B_MA[0..13]<14>
DDR_B_CAS#<14>DDR_B_RAS#<14>DDR_B_WE#<14>
DDR_A_D[0..63] <13> DDR_B_D[0..63] <14>
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Calistoga (2/6)Custom
8 60Friday, December 16, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
DDR SYS MEMORY A
U31D
CALISTOGA_FCBGA1466~D
SA_DQ0 AJ35SA_DQ1 AJ34SA_DQ2 AM31SA_DQ3 AM33SA_DQ4 AJ36SA_DQ5 AK35SA_DQ6 AJ32SA_DQ7 AH31SA_DQ8 AN35SA_DQ9 AP33
SA_DQ10 AR31SA_DQ11 AP31SA_DQ12 AN38SA_DQ13 AM36SA_DQ14 AM34SA_DQ15 AN33SA_DQ16 AK26SA_DQ17 AL27SA_DQ18 AM26SA_DQ19 AN24SA_DQ20 AK28SA_DQ21 AL28SA_DQ22 AM24SA_DQ23 AP26SA_DQ24 AP23SA_DQ25 AL22SA_DQ26 AP21SA_DQ27 AN20SA_DQ28 AL23SA_DQ29 AP24SA_DQ30 AP20SA_DQ31 AT21SA_DQ32 AR12SA_DQ33 AR14SA_DQ34 AP13SA_DQ35 AP12SA_DQ36 AT13SA_DQ37 AT12SA_DQ38 AL14SA_DQ39 AL12SA_DQ40 AK9SA_DQ41 AN7SA_DQ42 AK8SA_DQ43 AK7SA_DQ44 AP9SA_DQ45 AN9SA_DQ46 AT5SA_DQ47 AL5SA_DQ48 AY2SA_DQ49 AW2SA_DQ50 AP1SA_DQ51 AN2SA_DQ52 AV2SA_DQ53 AT3SA_DQ54 AN1SA_DQ55 AL2SA_DQ56 AG7SA_DQ57 AF9SA_DQ58 AG4SA_DQ59 AF6SA_DQ60 AG9SA_DQ61 AH6SA_DQ62 AF4SA_DQ63 AF8
SA_BS0AU12SA_BS1AV14SA_BS2BA20
SA_CAS#AY13SA_RAS#AW14SA_WE#AY14SA_RCVENIN#AK23SA_RCVENOUT#AK24
SA_DM0AJ33SA_DM1AM35SA_DM2AL26SA_DM3AN22SA_DM4AM14SA_DM5AL9SA_DM6AR3SA_DM7AH4
SA_DQS0AK33SA_DQS1AT33SA_DQS2AN28SA_DQS3AM22SA_DQS4AN12SA_DQS5AN8SA_DQS6AP3SA_DQS7AG5
SA_DQS0#AK32SA_DQS1#AU33SA_DQS2#AN27SA_DQS3#AM21SA_DQS4#AM12SA_DQS5#AL8SA_DQS6#AN3SA_DQS7#AH5
SA_MA0AY16SA_MA1AU14SA_MA2AW16SA_MA3BA16SA_MA4BA17SA_MA5AU16SA_MA6AV17SA_MA7AU17SA_MA8AW17SA_MA9AT16SA_MA10AU13SA_MA11AT17SA_MA12AV20SA_MA13AV12
T13 PADT19 PADT18 PAD
T15 PAD
DDR SYS MEMORY B
U31E
CALISTOGA_FCBGA1466~D
SB_DQ0 AK39SB_DQ1 AJ37SB_DQ2 AP39SB_DQ3 AR41SB_DQ4 AJ38SB_DQ5 AK38SB_DQ6 AN41SB_DQ7 AP41SB_DQ8 AT40SB_DQ9 AV41
SB_DQ10 AU38SB_DQ11 AV38SB_DQ12 AP38SB_DQ13 AR40SB_DQ14 AW38SB_DQ15 AY38SB_DQ16 BA38SB_DQ17 AV36SB_DQ18 AR36SB_DQ19 AP36SB_DQ20 BA36SB_DQ21 AU36SB_DQ22 AP35SB_DQ23 AP34SB_DQ24 AY33SB_DQ25 BA33SB_DQ26 AT31SB_DQ27 AU29SB_DQ28 AU31SB_DQ29 AW31SB_DQ30 AV29SB_DQ31 AW29SB_DQ32 AM19SB_DQ33 AL19SB_DQ34 AP14SB_DQ35 AN14SB_DQ36 AN17SB_DQ37 AM16SB_DQ38 AP15SB_DQ39 AL15SB_DQ40 AJ11SB_DQ41 AH10SB_DQ42 AJ9SB_DQ43 AN10SB_DQ44 AK13SB_DQ45 AH11SB_DQ46 AK10SB_DQ47 AJ8SB_DQ48 BA10SB_DQ49 AW10SB_DQ50 BA4SB_DQ51 AW4SB_DQ52 AY10SB_DQ53 AY9SB_DQ54 AW5SB_DQ55 AY5SB_DQ56 AV4SB_DQ57 AR5SB_DQ58 AK4SB_DQ59 AK3SB_DQ60 AT4SB_DQ61 AK5SB_DQ62 AJ5SB_DQ63 AJ3
SB_BS0AT24SB_BS1AV23SB_BS2AY28
SB_CAS#AR24SB_RAS#AU23SB_WE#AR27SB_RCVENIN#AK16SB_RCVENOUT#AK18
SB_DM0AK36SB_DM1AR38SB_DM2AT36SB_DM3BA31SB_DM4AL17SB_DM5AH8SB_DM6BA5SB_DM7AN4
SB_DQS0AM39SB_DQS1AT39SB_DQS2AU35SB_DQS3AR29SB_DQS4AR16SB_DQS5AR10SB_DQS6AR7SB_DQS7AN5
SB_DQS0#AM40SB_DQS1#AU39SB_DQS2#AT35SB_DQS3#AP29SB_DQS4#AP16SB_DQS5#AT10SB_DQS6#AT7SB_DQS7#AP5
SB_MA0AY23SB_MA1AW24SB_MA2AY24SB_MA3AR28SB_MA4AT27SB_MA5AT28SB_MA6AU27SB_MA7AV28SB_MA8AV27SB_MA9AW27SB_MA10AV24SB_MA11BA27SB_MA12AY27SB_MA13AR23
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEGCOMP
CRT_R
CRT_G
LVDSB1+
LVDSB1-
LVDSBC+LVDSBC-
LVDSA0+
LVDSA0-
LVDSAC-LVDSAC+
LVDSA2-
LVDSA2+
LVDSB2+
LVDSB2-
LVDSA1-
LVDSA1+
LVDSB0+
LVDSB0-
TV_COMPSTV_LUMATV_CRMA
CRT_HSYNCCRT_VSYNC
CRT_B
3VDDCDA3VDDCCL
EDID_DAT_LCDEDID_CLK_LCD
PEG_TXP15PEG_TXP14PEG_TXP13PEG_TXP12
PEG_TXP8PEG_TXP9PEG_TXP10PEG_TXP11
PEG_TXP4PEG_TXP5PEG_TXP6PEG_TXP7
PEG_TXP0PEG_TXP1PEG_TXP2PEG_TXP3
PEG_M_TXP5PEG_M_TXP4PEG_M_TXP3
PEG_M_TXP10
PEG_M_TXP6
PEG_M_TXP2
PEG_M_TXP7
PEG_M_TXP12
PEG_M_TXP9
PEG_M_TXP11
PEG_M_TXP8
PEG_M_TXP14
PEG_M_TXP1
PEG_M_TXP15
PEG_M_TXP0
PEG_M_TXP13
PEG_M_TXN5PEG_M_TXN4PEG_M_TXN3PEG_M_TXN2
PEG_M_TXN6
PEG_M_TXN9PEG_M_TXN8
PEG_M_TXN10
PEG_M_TXN7
PEG_M_TXN13PEG_M_TXN12
PEG_M_TXN14
PEG_M_TXN11
PEG_M_TXN15
PEG_M_TXN1PEG_M_TXN0
PEG_TXN12PEG_TXN13
PEG_TXN10
PEG_TXN14
PEG_TXN4
PEG_TXN6
PEG_TXN1PEG_TXN0
PEG_TXN15
PEG_TXN7PEG_TXN8
PEG_TXN2PEG_TXN3
PEG_TXN5
PEG_TXN9
PEG_TXN11
PEG_RXN7PEG_RXN8PEG_RXN9PEG_RXN10PEG_RXN11PEG_RXN12PEG_RXN13PEG_RXN14PEG_RXN15
PEG_RXN0PEG_RXN1PEG_RXN2PEG_RXN3PEG_RXN4PEG_RXN5PEG_RXN6
PEG_RXP0PEG_RXP1PEG_RXP2PEG_RXP3PEG_RXP4PEG_RXP5PEG_RXP6PEG_RXP7PEG_RXP8PEG_RXP9PEG_RXP10PEG_RXP11PEG_RXP12PEG_RXP13PEG_RXP14PEG_RXP15
GMCH_ENBKL
GMCH_LVDDEN
PEG_RXP[0..15] <18>
PEG_RXN[0..15] <18>
PEG_M_TXP[0..15] <18>
PEG_M_TXN[0..15] <18>
LVDSB1+<16>
LVDSB1-<16>
LVDSBC-<16>LVDSBC+<16>
LVDSA0+<16>
LVDSA0-<16>
LVDSAC+<16>LVDSAC-<16>
LVDSA2-<16>
LVDSA2+<16>
LVDSB2-<16>
LVDSB2+<16>
LVDSA1-<16>
LVDSA1+<16>
LVDSB0-<16>
LVDSB0+<16>
TV_COMPS<17>TV_LUMA<17>TV_CRMA<17>
CRT_HSYNC<17>CRT_VSYNC<17>
CRT_R<17>
CRT_G<17>
CRT_B<17>
3VDDCDA<17>3VDDCCL<17>
EDID_CLK_LCD<16>EDID_DAT_LCD<16>
GMCH_ENBKL<16>
GMCH_LVDDEN<16>
+1.5VS_PCIE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Calistoga (3/6)Custom
9 60Friday, December 16, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
R65255_0402_1%
12
C230 0.1U_0402_16V4ZG71@
C228 0.1U_0402_16V4ZG71@
R482 1.5K_0402_1% 12
C250 0.1U_0402_16V4ZG71@C649 0.1U_0402_16V4ZG71@
LVDS
TV
CR
T
PCI-EXPRESS GRAPHICS
U31C
CALISTOGA_FCBGA1466~D
SDVOCTRL_CLKH28 SDVOCTRL_DATAH27
LA_DATA0B37LA_DATA1B34LA_DATA2A36
LVREFHC33LVREFLC32
TVDAC_AA16TVDAC_BC18TVDAC_CA19
TV_IREFJ20
TV_IRTNAB16TV_IRTNBB18TV_IRTNCB19
DDCCLKC26DDCDATAC25
LA_DATA#0C37LA_DATA#1B35LA_DATA#2A37
LB_DATA0F30LB_DATA1D29LB_DATA2F28
LB_DATA#0G30LB_DATA#1D30LB_DATA#2F29
LA_CLKA32LA_CLK#A33LB_CLKE26LB_CLK#E27
LBKLT_CTLD32LBKLT_ENJ30LCTLA_CLKH30LCTLB_DATAH29LDDC_CLKG26LDDC_DATAG25LVDD_ENF32LIBGB38LVBGC35
VSYNCH23HSYNCG23BLUEE23BLUE#D23GREENC22GREEN#B22REDA21RED#B21
CRT_IREFJ22
EXP_COMPI D40EXP_COMPO D38
EXP_RXN0 F34EXP_RXN1 G38EXP_RXN2 H34EXP_RXN3 J38EXP_RXN4 L34EXP_RXN5 M38EXP_RXN6 N34EXP_RXN7 P38EXP_RXN8 R34EXP_RXN9 T38
EXP_RXN10 V34EXP_RXN11 W38EXP_RXN12 Y34EXP_RXN13 AA38EXP_RXN14 AB34EXP_RXN15 AC38
EXP_RXP0 D34EXP_RXP1 F38EXP_RXP2 G34EXP_RXP3 H38EXP_RXP4 J34EXP_RXP5 L38EXP_RXP6 M34EXP_RXP7 N38EXP_RXP8 P34EXP_RXP9 R38
EXP_RXP10 T34EXP_RXP11 V38EXP_RXP12 W34EXP_RXP13 Y38EXP_RXP14 AA34EXP_RXP15 AB38
EXP_TXN0 F36EXP_TXN1 G40EXP_TXN2 H36EXP_TXN3 J40EXP_TXN4 L36EXP_TXN5 M40EXP_TXN6 N36EXP_TXN7 P40EXP_TXN8 R36EXP_TXN9 T40
EXP_TXN10 V36EXP_TXN11 W40EXP_TXN12 Y36EXP_TXN13 AA40EXP_TXN14 AB36EXP_TXN15 AC40
EXP_TXP0 D36EXP_TXP1 F40EXP_TXP2 G36EXP_TXP3 H40EXP_TXP4 J36EXP_TXP5 L40EXP_TXP6 M36EXP_TXP7 N40EXP_TXP8 P36EXP_TXP9 R40
EXP_TXP10 T36EXP_TXP11 V40EXP_TXP12 W36EXP_TXP13 Y40EXP_TXP14 AA36EXP_TXP15 AB40
TV_DCONSEL1J29TV_DCONSEL0K30
C650 0.1U_0402_16V4ZG71@
R584.99K_0402_1%
12
C231 0.1U_0402_16V4ZG71@
C237 0.1U_0402_16V4ZG71@
C677 0.1U_0402_16V4ZG71@
C238 0.1U_0402_16V4ZG71@
C659 0.1U_0402_16V4ZG71@
C651 0.1U_0402_16V4ZG71@
C249 0.1U_0402_16V4ZG71@
C656 0.1U_0402_16V4ZG71@C234 0.1U_0402_16V4ZG71@
C660 0.1U_0402_16V4ZG71@
C655 0.1U_0402_16V4ZG71@
C232 0.1U_0402_16V4ZG71@
C239 0.1U_0402_16V4ZG71@
C229 0.1U_0402_16V4ZG71@
C653 0.1U_0402_16V4ZG71@
C235 0.1U_0402_16V4ZG71@
R8924.9_0402_1%
1 2
C648 0.1U_0402_16V4ZG71@
C233 0.1U_0402_16V4ZG71@
C236 0.1U_0402_16V4ZG71@
C661 0.1U_0402_16V4ZG71@
C678 0.1U_0402_16V4ZG71@
C652 0.1U_0402_16V4ZG71@
C658 0.1U_0402_16V4ZG71@
C662 0.1U_0402_16V4ZG71@
C657 0.1U_0402_16V4ZG71@
C664 0.1U_0402_16V4ZG71@
C654 0.1U_0402_16V4ZG71@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCH_D2
MCH_A6
MC
H_A
B1
+2.5VS_CRTDAC
+1.5VS
+2.5VS+1.5VS_PCIE
+1.5VS
+1.5VS+1.5VS_3GPLL
+1.5VS_DPLLB+1.5VS_DPLLA
+1.5VS_HPLL
+3VS
+2.5VS
+3VS_TVBG
+1.5VS_MPLL
+1.5VS
+3VS_TVDACA
+1.5VS_3GPLL
+1.5VS
+VCCP
+1.5VS_MPLL +1.5VS_HPLL
+1.5VS+1.5VS
+2.5VS
+2.5VS
+1.5VS_TVDAC
+1.5VS_TVDAC +1.5VS
+2.5VS
+3VS+3VS_TVDACA+3VS+3VS_TVDACB+3VS+3VS_TVDACC
+3VS_TVDACB
+3VS_TVDACC
+3VS+3VS_TVBG
+2.5VS
+1.5VS_DPLLA +1.5VS_DPLLB
+1.5VS+1.5VS
+2.5VS
+VCCP
+2.5VS
+3VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Calistoga (4/6)Custom
10 60Friday, December 16, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
W=40 mils
45mA Max. 45mA Max.
close pin G41
PCI-E/MEM/PSB PLL decoupling
CRTDAC: Route caps within250mil of Alviso. Route FBwithin 3" of Calistoga
close pin A38
C10
50.
1U_0
402_
16V
4Z
@
1
2
C81
0.22
U_0
603_
10V
7K
1
2
+
C68
2
220U
_D2_
4VM
1
2
R55
0_0805_5%
12
C66
5
10U
_120
6_6.
3V6M
1
2
C11
222
00P
_040
2_50
V7K
1
2
R520
10_0402_5%@
12
R39
0_0805_5%
12
R4900_0805_5%
12
C22
50.
1U_0
402_
16V
4Z
1
2
C61
32.
2U_0
805_
16V
4Z
1
2
C24
810
U_1
206_
6.3V
6M
1
2
C60
5
0.1U
_040
2_16
V4Z
1
2
C61
422
00P
_040
2_50
V7K
1
2
R52
0_0805_5%
12
C21
50.
1U_0
402_
16V
4Z
1
2
C59
70.
22U
_060
3_10
V7K
1
2
R80
10_0402_5%@
12
C12
40.
1U_0
402_
16V
4Z
1
2
C60
4
0.1U
_040
2_16
V4Z
1
2
+
C616
330U_V
_2.5VK
_R9
UM
A@1
2
C61
510
U_1
206_
6.3V
6M
1
2
R990_0603_5%
12
C10
722
00P
_040
2_50
V7K
1
2
D5
CH751H-40_SC76@
21
R460_0603_5%
12
L28MBK160808_0603
12
C16
30.
1U_0
402_
16V
4Z 1
2
C17
40.
1U_0
402_
16V
4Z
1
2
R4600_0603_5%
12
D19
CH751H-40_SC76@
21
C61
24.
7U_0
805_
10V
4Z
1
2
C226
0.1U_0402_16V
4Z
1
2
C16
00.
01U
_040
2_16
V7K
1
2
C59
3
10U
_120
6_6.
3V6M
1
2
C10
90.
1U_0
402_
16V
4Z
1
2
C11
70.
1U_0
402_
16V
4Z
1
2C
115
2200
P_0
402_
50V
7K
1
2
C138
0.1U_0402_16V
4Z
1
2
C11
60.
1U_0
402_
16V
4Z
1
2
C66
6
10U
_120
6_6.
3V6M
1
2
C11
30.
1U_0
402_
16V
4Z
1
2
C59
4
10U
_120
6_6.
3V6M
1
2
C10
60.
1U_0
402_
16V
4Z
1
2
C28
00.
1U_0
402_
16V
4Z
@
1
2
C11
422
00P
_040
2_50
V7K
1
2
+
C645
330U_V
_2.5VK
_R9
UM
A@1
2
R4590_0603_5%
12
P O W E R
U31H
CALISTOGA_FCBGA1466~D
VCC_SYNC H22
VCCTX_LVDS0 B30VCCTX_LVDS1 C30
VCC3G0 AB41VCC3G1 AJ41VCC3G2 L41VCC3G3 N41VCC3G4 R41VCC3G5 V41VCC3G6 Y41
VCCA_3GBG G41VSSA_3GBG H41
VCCA_3GPLL AC33
VCCTX_LVDS2 A30
VCCA_LVDS A38VSSA_LVDS B39
VCCA_MPLL AF2
VCCA_TVBG H20VSSA_TVBG G20
VCCA_TVDACA0 E19VCCA_TVDACA1 F19VCCA_TVDACB0 C20VCCA_TVDACB1 D20VCCA_TVDACC0 E20VCCA_TVDACC1 F20
VCCAUX1 AF31VCCAUX2 AE31VCCAUX3 AC31VCCAUX4 AL30VCCAUX5 AK30VCCAUX6 AJ30VCCAUX7 AH30VCCAUX8 AG30VCCAUX9 AF30
VCCAUX10 AE30VCCAUX11 AD30VCCAUX12 AC30VCCAUX13 AG29VCCAUX14 AF29VCCAUX15 AE29VCCAUX16 AD29VCCAUX17 AC29VCCAUX18 AG28VCCAUX19 AF28VCCAUX20 AE28
VTT0AC14VTT1AB14VTT2W14VTT3V14VTT4T14VTT5R14VTT6P14VTT7N14VTT8M14VTT9L14VTT10AD13VTT11AC13VTT12AB13VTT13AA13VTT14Y13VTT15W13VTT16V13VTT17U13VTT18T13VTT19R13VTT20N13VTT21M13VTT22L13VTT23AB12VTT24AA12VTT25Y12VTT26W12VTT27V12VTT28U12VTT29T12VTT30R12VTT31P12VTT32N12VTT33M12VTT34L12VTT35R11VTT36P11VTT37N11VTT38M11VTT39R10VTT40P10VTT41N10VTT42M10VTT43P9VTT44N9VTT45M9VTT46R8VTT47P8VTT48N8VTT49M8VTT50P7VTT51N7VTT52M7VTT53R6VTT54P6VTT55M6VTT56A6VTT57R5
VTT59N5VTT60M5VTT61P4VTT62N4VTT63M4VTT64R3VTT65P3VTT66N3VTT67M3VTT68R2VTT69P2VTT70M2VTT71D2VTT72AB1VTT73R1VTT74P1VTT75N1VTT76M1
VCCA_CRTDAC0 E21VCCA_CRTDAC1 F21VSSA_CRTDAC2 G21
VCCA_DPLLA B26VCCA_DPLLB C39
VCCA_HPLL AF1
VCCD_HMPLL0 AH1VCCD_HMPLL1 AH2
VCCD_LVDS0 A28VCCD_LVDS1 B28VCCD_LVDS2 C28
VCCD_TVDAC D21VCCDQ_TVDAC H19
VCCHV0 A23VCCHV1 B23 VCCHV2 B25
VCCAUX21 AH22VCCAUX22 AJ21VCCAUX23 AH21VCCAUX24 AJ20VCCAUX25 AH20VCCAUX26 AH19VCCAUX27 P19VCCAUX28 P16VCCAUX29 AH15VCCAUX30 P15VCCAUX31 AH14
VCCAUX32AG14VCCAUX33AF14VCCAUX34AE14VCCAUX35Y14VCCAUX36AF13VCCAUX37AE13VCCAUX38AF12VCCAUX39AE12VCCAUX40AD12
VCCAUX0 AK31
VTT58P5
L29MBK160808_0603
12L7 BLM11A601S_0603
1 2
+
C61
022
0U_D
2_4V
M
1
2
C11
10.
1U_0
402_
16V
4Z
1
2
C1620.1U_0402_16V4Z
1 2
C60
70.
47U
_060
3_10
V7K
1
2
C11
022
00P
_040
2_50
V7K
1
2
C59
60.
47U
_060
3_10
V7K
1
2
R44
0_0805_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCH_AM41MCH_AT41
CFG18<7>
CFG13<7>
CFG19<7>
CFG16<7>
CFG9<7>
CFG20<7>
CFG11<7>
CFG12<7>
CFG5<7>
CFG7<7>
+VCCP+1.5VS+VCCP
+1.8V+VCCP
+1.8V
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Calistoga (5/6)Custom
11 60Friday, December 16, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Place near pin BA15
Place near pin BA23
Place near pin AT41 & AM41
Place near pin AV1 & AJ1
CFG[13:12]
1 = PCIE/SDVO are operatingsimu.
CFG7
CFG19
(Default)
CFG20
0 = DMI x 2
CFG10 CFG18
CFG[19:18] have internal pull down
*
Strap Pin Table
*
10 = All Z Mode Enabled
0 = Reserved
(Default)
1 = Normal Operation
CFG5
SDVO_CTRLDATA
*
1 = DMI Lane Reversal Enable
(Default)
*
1 = Dynamic ODT Enabled (Default)
*
(Default)
00 = Reserved
01 = 1.5V
*
*
1 = DMI x 4
CFG[3:17] have internal pull up
0 = No SDVO Device Present
(Default)
*
*
(Default)
(Default)
0 = Normal Operation
(Default)
0 = Only PCIE or SDVO isoperational.
0 = Dynamic ODT Disabled
(PCIE/SDVO select)
01 = XOR Mode Enabled
001 = 533MT/s FSB
CFG16
10 = 1.05V
011 = 667MT/s FSB
0 = Lane Reversal Enable CFG9
1 = SDVO Device Present
CFG[2:0]
1 = Mobile Yonah CPU
11 = Normal Operation
CFG6
PSB 4X CLK Enable 1 = Calistoga
0 = Reserved
*
R47 2.2K_0402_5%@1 2
C60
010
U_1
206_
6.3V
6M
1
2
C12
50.
47U
_060
3_10
V7K
1
2
C60
20.
47U
_060
3_10
V7K
1
2
R82 1K_0402_5%@1 2
C64
110
U_1
206_
6.3V
6M
1
2
+
C59
522
0U_D
2_4V
M@
1
2
R49 2.2K_0402_5%@1 2
C12
8
0.1U
_040
2_16
V4Z
1
2
R51 2.2K_0402_5%@1 2
C66
80.
47U
_060
3_10
V7K
1
2
C10
40.
47U
_060
3_10
V7K
1
2
C84
0.1U
_040
2_16
V4Z
1
2
C60
910
U_1
206_
6.3V
6M
1
2
R87 1K_0402_5%@1 2
C66
90.
47U
_060
3_10
V7K
1
2
C86
0.22
U_0
603_
10V7
K
1
2
R48 2.2K_0402_5%@1 2
P O
W E
R
U31F
CALISTOGA_FCBGA1466~D
VCC_NCTF1AC27VCC_NCTF2AB27VCC_NCTF3AA27VCC_NCTF4Y27VCC_NCTF5W27VCC_NCTF6V27VCC_NCTF7U27
VCCAUX_NCTF52 Y15
VCC_NCTF9R27VCC_NCTF10AD26VCC_NCTF11AC26VCC_NCTF12AB26VCC_NCTF13AA26VCC_NCTF14Y26VCC_NCTF15W26VCC_NCTF16V26VCC_NCTF17U26VCC_NCTF18T26VCC_NCTF19R26VCC_NCTF20AD25VCC_NCTF21AC25VCC_NCTF22AB25VCC_NCTF23AA25VCC_NCTF24Y25VCC_NCTF25W25
VCCAUX_NCTF53 W15
VCC_NCTF27U25VCC_NCTF28T25VCC_NCTF29R25VCC_NCTF30AD24VCC_NCTF31AC24VCC_NCTF32AB24VCC_NCTF33AA24VCC_NCTF34Y24VCC_NCTF35W24VCC_NCTF36V24
VCCAUX_NCTF54 V15
VCC_NCTF38T24VCC_NCTF39R24VCC_NCTF40AD23VCC_NCTF41V23VCC_NCTF42U23VCC_NCTF43T23VCC_NCTF44R23VCC_NCTF45AD22VCC_NCTF46V22VCC_NCTF47U22VCC_NCTF48T22VCC_NCTF49R22VCC_NCTF50AD21VCC_NCTF51V21VCC_NCTF52U21VCC_NCTF53T21VCC_NCTF54R21VCC_NCTF55AD20VCC_NCTF56V20VCC_NCTF57U20VCC_NCTF58T20
VCCAUX_NCTF55 U15
VCC_NCTF60AD19VCC_NCTF61V19VCC_NCTF62U19VCC_NCTF63T19VCC_NCTF64AD18VCC_NCTF65AC18VCC_NCTF66AB18VCC_NCTF67AA18VCC_NCTF68Y18VCC_NCTF69W18VCC_NCTF70V18VCC_NCTF71U18VCC_NCTF72T18
VCC_NCTF0AD27 VCCAUX_NCTF0 AG27VCCAUX_NCTF1 AF27VCCAUX_NCTF2 AG26VCCAUX_NCTF3 AF26VCCAUX_NCTF4 AG25VCCAUX_NCTF5 AF25VCCAUX_NCTF6 AG24VCCAUX_NCTF7 AF24VCCAUX_NCTF8 AG23VCCAUX_NCTF9 AF23
VCCAUX_NCTF10 AG22VCCAUX_NCTF11 AF22VCCAUX_NCTF12 AG21VCCAUX_NCTF13 AF21VCCAUX_NCTF14 AG20VCCAUX_NCTF15 AF20VCCAUX_NCTF16 AG19VCCAUX_NCTF17 AF19VCCAUX_NCTF18 R19VCCAUX_NCTF19 AG18VCCAUX_NCTF20 AF18VCCAUX_NCTF21 R18VCCAUX_NCTF22 AG17VCCAUX_NCTF23 AF17VCCAUX_NCTF24 AE17VCCAUX_NCTF25 AD17VCCAUX_NCTF26 AB17VCCAUX_NCTF27 AA17VCCAUX_NCTF28 W17VCCAUX_NCTF29 V17VCCAUX_NCTF30 T17VCCAUX_NCTF31 R17VCCAUX_NCTF32 AG16VCCAUX_NCTF33 AF16VCCAUX_NCTF34 AE16VCCAUX_NCTF35 AD16VCCAUX_NCTF36 AC16VCCAUX_NCTF37 AB16VCCAUX_NCTF38 AA16VCCAUX_NCTF39 Y16VCCAUX_NCTF40 W16VCCAUX_NCTF41 V16VCCAUX_NCTF42 U16VCCAUX_NCTF43 T16VCCAUX_NCTF44 R16VCCAUX_NCTF45 AG15VCCAUX_NCTF46 AF15VCCAUX_NCTF47 AE15VCCAUX_NCTF48 AD15VCCAUX_NCTF49 AC15VCCAUX_NCTF50 AB15
VSS_NCTF0 AE27
VCCAUX_NCTF51 AA15
VSS_NCTF1 AE26
VCC_NCTF59R20
VCCAUX_NCTF56 T15
VSS_NCTF2 AE25VSS_NCTF3 AE24VSS_NCTF4 AE23VSS_NCTF5 AE22VSS_NCTF6 AE21VSS_NCTF7 AE20VSS_NCTF8 AE19VSS_NCTF9 AE18
VSS_NCTF10 AC17VSS_NCTF11 Y17VSS_NCTF12 U17
VCC_NCTF26V25
VCCAUX_NCTF57 R15
VCC_NCTF37U24
VCC_NCTF8T27
VCC100M19VCC101L19VCC102N18VCC103M18VCC104L18VCC105P17VCC106N17VCC107M17VCC108N16VCC109M16VCC110L16
VCC_SM100 AR6VCC_SM101 AP6VCC_SM102 AN6VCC_SM103 AL6VCC_SM104 AK6VCC_SM105 AJ6VCC_SM106 AV1VCC_SM107 AJ1
+
C59
933
0U_V
_2.5
VK_
R9
1
2
C22
2
0.1U
_040
2_16
V4Z
1
2
+
C60
622
0U_D
2_4V
M@
1
2
R53 2.2K_0402_5%@1 2
R74 1K_0402_5%@ 1 2
P O W E R
U31G
CALISTOGA_FCBGA1466~D
VCC0AA33VCC1W33VCC2P33VCC3N33VCC4L33VCC5J33VCC6AA32VCC7Y32VCC8W32VCC9V32VCC10P32VCC11N32VCC12M32VCC13L32VCC14J32VCC15AA31VCC16W31VCC17V31VCC18T31VCC19R31VCC20P31VCC21N31VCC22M31VCC23AA30VCC24Y30VCC25W30VCC26V30VCC27U30VCC28T30VCC29R30VCC30P30VCC31N30VCC32M30VCC33L30VCC34AA29VCC35Y29VCC36W29VCC37V29VCC38U29VCC39R29VCC40P29VCC41M29VCC42L29VCC43AB28VCC44AA28VCC45Y28
VCC_SM5 AY34VCC_SM6 AW34VCC_SM7 AV34VCC_SM8 AU34VCC_SM9 AT34
VCC_SM10 AR34VCC_SM11 BA30VCC_SM12 AY30VCC_SM13 AW30VCC_SM14 AV30VCC_SM15 AU30VCC_SM16 AT30VCC_SM17 AR30VCC_SM18 AP30VCC_SM19 AN30VCC_SM20 AM30VCC_SM21 AM29VCC_SM22 AL29VCC_SM23 AK29VCC_SM24 AJ29VCC_SM25 AH29VCC_SM26 AJ28VCC_SM27 AH28VCC_SM28 AJ27VCC_SM29 AH27VCC_SM30 BA26VCC_SM31 AY26VCC_SM32 AW26VCC_SM33 AV26VCC_SM34 AU26VCC_SM35 AT26VCC_SM36 AR26VCC_SM37 AJ26VCC_SM38 AH26VCC_SM39 AJ25VCC_SM40 AH25VCC_SM41 AJ24VCC_SM42 AH24VCC_SM43 BA23VCC_SM44 AJ23VCC_SM45 BA22VCC_SM46 AY22VCC_SM47 AW22VCC_SM48 AV22VCC_SM49 AU22VCC_SM50 AT22VCC_SM51 AR22VCC_SM52 AP22VCC_SM53 AK22VCC_SM54 AJ22VCC_SM55 AK21VCC_SM56 AK20VCC_SM57 BA19VCC_SM58 AY19VCC_SM59 AW19VCC_SM60 AV19VCC_SM61 AU19VCC_SM62 AT19VCC_SM63 AR19VCC_SM64 AP19VCC_SM65 AK19VCC_SM66 AJ19VCC_SM67 AJ18VCC_SM68 AJ17VCC_SM69 AH17VCC_SM70 AJ16VCC_SM71 AH16VCC_SM72 BA15
VCC_SM3 AU40VCC_SM4 BA34
VCC_SM73 AY15VCC_SM74 AW15VCC_SM75 AV15VCC_SM76 AU15VCC_SM77 AT15VCC_SM78 AR15VCC_SM79 AJ15VCC_SM80 AJ14VCC_SM81 AJ13VCC_SM82 AH13VCC_SM83 AK12VCC_SM84 AJ12VCC_SM85 AH12VCC_SM86 AG12VCC_SM87 AK11VCC_SM88 BA8VCC_SM89 AY8VCC_SM90 AW8VCC_SM91 AV8VCC_SM92 AT8VCC_SM93 AR8VCC_SM94 AP8VCC_SM95 BA6VCC_SM96 AY6VCC_SM97 AW6VCC_SM98 AV6VCC_SM99 AT6
VCC_SM1 AT41VCC_SM0 AU41
VCC_SM2 AM41
VCC46V28VCC47U28VCC48T28VCC49R28VCC50P28VCC51N28VCC52M28VCC53L28VCC54P27VCC55N27VCC56M27VCC57L27VCC58P26VCC59N26VCC60L26VCC61N25VCC62M25VCC63L25VCC64P24VCC65N24VCC66M24VCC67AB23VCC68AA23VCC69Y23VCC70P23VCC71N23VCC72M23VCC73L23VCC74AC22VCC75AB22VCC76Y22VCC77W22VCC78P22VCC79N22VCC80M22VCC81L22VCC82AC21VCC83AA21VCC84W21VCC85N21VCC86M21VCC87L21VCC88AC20VCC89AB20VCC90Y20VCC91W20VCC92P20VCC93N20VCC94M20VCC95L20VCC96AB19VCC97AA19VCC98Y19VCC99N19
R54 2.2K_0402_5%@1 2
C83
0.1U
_040
2_16
V4Z
1
2
C17
310
U_1
206_
6.3V
6M
1
2
C60
30.
47U
_060
3_10
V7K
1
2
C85
0.22
U_0
603_
10V7
K
1
2
C13
91U
_060
3_10
V4Z
1
2
C16
40.
22U
_060
3_10
V7K
1
2
R50 2.2K_0402_5%@ 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Calistoga (6/6)Custom
12 60Friday, December 16, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
P O W E R
U31J
CALISTOGA_FCBGA1466~D
VSS200AN21VSS201AL21VSS202AB21VSS203Y21VSS204P21VSS205K21VSS206J21VSS207H21VSS208C21VSS209AW20VSS210AR20VSS211AM20VSS212AA20VSS213K20VSS214B20VSS215A20VSS216AN19VSS217AC19VSS218W19VSS219K19VSS220G19VSS221C19VSS222AH18VSS223P18VSS224H18VSS225D18VSS226A18VSS227AY17VSS228AR17VSS229AP17VSS230AM17VSS231AK17VSS232AV16VSS233AN16VSS234AL16VSS235J16VSS236F16VSS237C16VSS238AN15VSS239AM15VSS240AK15VSS241N15VSS242M15VSS243L15VSS244B15VSS245A15VSS246BA14VSS247AT14VSS248AK14VSS249AD14VSS250AA14VSS251U14VSS252K14VSS253H14VSS254E14VSS255AV13VSS256AR13VSS257AN13VSS258AM13VSS259AL13VSS260AG13VSS261P13VSS262F13
VSS266AC12VSS267K12VSS268H12VSS269E12VSS270AD11VSS271AA11VSS272Y11VSS273J11VSS274D11VSS275B11VSS276AV10VSS277AP10VSS278AL10VSS279AJ10
VSS265D13VSS264B13VSS263AY12
VSS285 AW9VSS286 AR9VSS287 AH9VSS288 AB9VSS289 Y9VSS290 R9VSS292 G9VSS291 E9VSS293 A9VSS294 AG8VSS295 AD8VSS296 AA8VSS297 U8VSS298 K8VSS299 C8VSS300 BA7VSS301 AV7VSS302 AP7VSS303 AL7VSS304 AJ7VSS305 AH7VSS306 AF7VSS307 AC7VSS308 R7VSS309 G7VSS310 D7VSS311 AG6VSS312 AD6VSS313 AB6VSS314 Y6
VSS317 K6VSS318 H6VSS319 B6VSS320 AV5VSS321 AF5VSS322 AD5VSS323 AY4VSS324 AR4VSS325 AP4VSS326 AL4VSS327 AJ4VSS328 Y4VSS329 U4VSS330 R4VSS331 J4VSS332 F4VSS333 C4VSS334 AY3VSS335 AW3VSS336 AV3VSS337 AL3
VSS341 AD3
VSS345 AT2VSS346 AR2VSS347 AP2VSS348 AK2
VSS351 AB2VSS352 Y2VSS353 U2VSS354 T2VSS355 N2VSS356 J2VSS357 H2
VSS359 C2VSS360 AL1
VSS358 F2
VSS349 AJ2VSS350 AD2
VSS344 G3VSS343 AA3VSS342 AC3
VSS340 AF3
VSS338 AH3
VSS280 AG10VSS281 AC10VSS282 W10VSS283 U10VSS284 BA9
VSS315 U6VSS316 N6
VSS339 AG3
P O W E R
U31I
CALISTOGA_FCBGA1466~D
VSS0AC41VSS1AA41VSS2W41VSS3T41VSS4P41VSS5M41VSS6J41VSS7F41VSS8AV40VSS9AP40VSS10AN40VSS11AK40
VSS13AH40VSS14AG40VSS15AF40VSS16AE40VSS17B40VSS18AY39VSS19AW39
VSS21AR39VSS22AN39
VSS24AC39VSS25AB39VSS26AA39VSS27Y39VSS28W39VSS29V39VSS30T39VSS31R39VSS32P39VSS33N39VSS34M39VSS35L39VSS36J39VSS37H39
VSS20AV39
VSS23AJ39
VSS12AJ40
VSS38G39
VSS40D39VSS41AT38VSS42AM38VSS43AH38VSS44AG38VSS45AF38VSS46AE38VSS47C38VSS48AK37VSS49AH37VSS50AB37VSS51AA37VSS52Y37VSS53W37VSS54V37VSS55T37VSS56R37VSS57P37VSS58N37VSS59M37VSS60L37VSS61J37VSS62H37VSS63G37VSS64F37VSS65D37VSS66AY36VSS67AW36VSS68AN36VSS69AH36VSS70AG36VSS71AF36VSS72AE36VSS73AC36VSS74C36VSS75B36VSS76BA35VSS77AV35VSS78AR35VSS79AH35VSS80AB35VSS81AA35VSS82Y35VSS83W35VSS84V35VSS85T35VSS86R35VSS87P35VSS88N35VSS89M35VSS90L35VSS91J35VSS92H35VSS93G35VSS94F35VSS95D35VSS96AN34VSS97AK34VSS98AG34VSS99AF34
VSS39F39
VSS100 AE34VSS101 AC34VSS102 C34VSS103 AW33VSS104 AV33VSS105 AR33VSS106 AE33VSS107 AB33VSS108 Y33VSS109 V33VSS110 T33VSS111 R33VSS112 M33VSS113 H33VSS114 G33VSS115 F33VSS116 D33VSS117 B33VSS118 AH32VSS119 AG32VSS120 AF32VSS121 AE32VSS122 AC32VSS123 AB32VSS124 G32VSS125 B32VSS126 AY31VSS127 AV31VSS128 AN31VSS129 AJ31VSS130 AG31VSS131 AB31VSS132 Y31VSS133 AB30VSS134 E30VSS135 AT29VSS136 AN29VSS137 AB29VSS138 T29VSS139 N29VSS140 K29VSS141 G29VSS142 E29VSS143 C29VSS144 B29VSS145 A29VSS146 BA28VSS147 AW28VSS148 AU28VSS149 AP28VSS150 AM28VSS151 AD28VSS152 AC28VSS153 W28VSS154 J28VSS155 E28VSS156 AP27VSS157 AM27VSS158 AK27VSS159 J27VSS160 G27VSS161 F27VSS162 C27VSS163 B27VSS164 AN26VSS165 M26VSS166 K26VSS167 F26VSS168 D26VSS169 AK25VSS170 P25VSS171 K25VSS172 H25VSS173 E25VSS174 D25VSS175 A25VSS176 BA24VSS177 AU24VSS178 AL24VSS179 AW23VSS180 AT23VSS181 AN23VSS182 AM23VSS183 AH23VSS184 AC23VSS185 W23VSS186 K23VSS187 J23VSS188 F23VSS189 C23VSS190 AA22VSS191 K22VSS192 G22VSS193 F22VSS194 E22VSS195 D22VSS196 A22VSS197 BA21VSS198 AV21VSS199 AR21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA11
V_DDR_MCH_REF
DDR_CKE1_DIMMA
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#0
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
CLK_SMBCLK
DDR_A_MA1
DDR_A_MA10
DDR_A_MA3
DDR_A_MA9 DDR_A_MA7DDR_A_MA12
DDR_A_MA5
DDR_A_WE#
DDR_A_D8
DDR_A_D17DDR_A_D16
DDR_A_D27DDR_A_D26
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DM0
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
CLK_SMBDATA
DDR_CKE0_DIMMA
DDR_A_MA8
DDR_CS1_DIMMA#
DDR_A_MA11
DDR_A_MA2DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_CAS#
DDR_A_BS#1DDR_A_RAS#
DDR_A_D20DDR_A_D21
DDR_A_D53DDR_A_D52
DDR_A_D55
DDR_A_DM6
DDR_A_DM4
DDR_A_DM5
DDR_A_DM7
DDR_A_MA13
DDR_A_DQS5
DDR_A_BS#0
DDR_A_BS#2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA4
DDR_A_BS#2
DDR_A_BS#1
DDR_A_MA6
DDR_A_MA9
DDR_CKE0_DIMMA
DDR_A_MA2
DDR_A_MA12
DDR_A_MA5
DDR_A_MA1
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS#0
DDR_A_MA8
DDR_A_MA3
DDR_A_MA10
DDR_CS0_DIMMA#
M_ODT1DDR_CS1_DIMMA#
M_ODT1
DDR_A_WE#
M_ODT0DDR_A_MA13
DDR_A_MA7
M_ODT0
DDR_A_D51DDR_A_D54DDR_A_D50
DDR_A_D49DDR_A_D48
DDR_A_D42
DDR_A_D35
DDR_A_D22DDR_A_D23
DDR_A_D12DDR_A_D13
DDR_A_D15 DDR_A_D10DDR_A_D9 DDR_A_D11
DDR_A_D14
DDR_A_D0DDR_A_D1
DDR_A_D3DDR_A_D2
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D18DDR_A_D19
DDR_A_D31DDR_A_D30
DDR_A_D28DDR_A_D29DDR_A_D25DDR_A_D24
DDR_A_D36
DDR_A_D32
DDR_A_D37
DDR_A_D33
DDR_A_D39DDR_A_D38
DDR_A_D34
DDR_A_D44DDR_A_D40
DDR_A_D45
DDR_A_D41
DDR_A_D43
DDR_A_D46DDR_A_D47
DDR_A_D60DDR_A_D61 DDR_A_D57
DDR_A_D56
DDR_A_D58DDR_A_D63
DDR_A_D59DDR_A_D62
DDR_A_DQS#[0..7]<8>
DDR_A_DQS[0..7]<8>
DDR_A_D[0..63]<8>
DDR_A_DM[0..7]<8>
DDR_A_MA[0..13]<8>
DDR_CKE0_DIMMA<7>
DDR_A_BS#2<8>
DDR_A_BS#0<8>DDR_A_WE#<8>
DDR_A_CAS#<8>
M_ODT1<7>
DDR_CS1_DIMMA#<7>
M_CLK_DDR0 <7>M_CLK_DDR#0 <7>
DDR_CKE1_DIMMA <7>
DDR_A_BS#1 <8>DDR_A_RAS# <8>DDR_CS0_DIMMA# <7>
M_CLK_DDR#1 <7>
M_ODT0 <7>
V_DDR_MCH_REF <7,14>
CLK_SMBDATA<14,15>CLK_SMBCLK<14,15>
M_CLK_DDR1 <7>
PM_EXTTS#0 <7,14>
+1.8V
+0.9VS
+3VS
+1.8V
+1.8V
+0.9VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
DDRII-SODIMM SLOT1Custom
13 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Layout Note:Place these resistorclosely JP41,alltrace length Max=1.5"
Layout Note:Place near JP41
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9VS
REVERSESO-DIMM A
Top side
RP15 56_0404_4P2R_5%1423
C131
2.2U_0805_16V4Z
1
2
C175
0.1U_0402_16V4Z
1
2
RP3 56_0404_4P2R_5%1423
C192
0.1U_0402_16V4Z
1
2 C628
0.1U_0402_16V4Z
1
2
RP24
56_0404_4P2R_5%
1 42 3
RP21
56_0404_4P2R_5%
1 42 3
C145
0.1U_0402_16V4Z
1
2
C143
0.1U_0402_16V4Z
1
2
C130
2.2U_0805_16V4Z
1
2
R35
10K_
0402
_5%
12
C642
0.1U_0402_16V4Z
1
2 C166
0.1U_0402_16V4Z
1
2
RP22
56_0404_4P2R_5%
1 42 3
C629
0.1U_0402_16V4Z
1
2
C368
2.2U_0805_16V4Z
1
2
RP12 56_0404_4P2R_5%1423
C136
0.1U_0402_16V4Z
1
2
RP9 56_0404_4P2R_5%1423
C640
0.1U_0402_16V4Z
1
2
C187
0.1U_0402_16V4Z
1
2
C369
0.1U_0402_16V4Z
1
2
C193
0.1U_0402_16V4Z
1
2
C180
0.1U_0402_16V4Z
1
2
RP26 56_0404_4P2R_5%1423
RP23
56_0404_4P2R_5%
1 42 3
RP6
56_0404_4P2R_5%
1 42 3
C206
2.2U_0805_16V4Z
1
2
C158
0.1U_0402_16V4Z
1
2
C204
2.2U_0805_16V4Z
1
2
C80
0.1U_0402_16V4Z
1
2
C129
2.2U_0805_16V4Z
1
2
RP18 56_0404_4P2R_5%1423
R33
10K_
0402
_5%
12
RP25
56_0404_4P2R_5%
1 42 3
C630
0.1U_0402_16V4Z
1
2
JP21
FOX_ASOA426-M4R-TRCONN@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
RP27 56_0404_4P2R_5%1423
C643
0.1U_0402_16V4Z
1
2 C639
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_MA1
DDR_B_BS#0
DDR_B_CAS#
DDR_B_MA3
DDR_B_MA10
DDR_B_BS#2DDR_CKE2_DIMMB
DDR_B_MA9
DDR_B_MA5
DDR_B_MA12
DDR_B_MA8
M_ODT3DDR_CS3_DIMMB#
DDR_B_WE#
DDR_B_DQS#4
DDR_B_D14
DDR_B_DQS4
DDR_B_BS#2
DDR_B_MA2
DDR_CKE2_DIMMB
DDR_B_D8
DDR_B_DM3
CLK_SMBDATA
DDR_B_D53
DDR_B_D45
DDR_B_MA3
DDR_B_D32
DDR_B_D40
DDR_B_D6
DDR_B_MA7
DDR_B_D13
DDR_B_D1
DDR_B_DQS#0
DDR_CS3_DIMMB#
M_ODT3
DDR_B_MA11
DDR_B_D47
DDR_B_WE#
DDR_B_D7
DDR_B_D11
DDR_B_MA10
DDR_B_D55
DDR_B_D34
DDR_B_D41
DDR_B_DQS5
M_ODT2
DDR_B_DQS2
DDR_B_DQS#7
DDR_B_MA6
DDR_B_D9
DDR_B_D44
DDR_B_D63
DDR_B_DM7
DDR_B_BS#0
DDR_B_MA5
DDR_B_D60
DDR_B_DQS#3
DDR_B_D10
DDR_B_D12
DDR_B_D18
DDR_B_D48
DDR_B_D33
DDR_B_DQS7
DDR_B_D42
DDR_B_D36
DDR_CKE3_DIMMB
DDR_B_DQS0
DDR_B_D46
DDR_B_MA1
DDR_B_MA8
DDR_B_DQS#2
DDR_B_DQS#5
DDR_B_MA12
DDR_B_DQS3
DDR_B_RAS#
DDR_B_MA4
DDR_B_DM5
DDR_B_D35
CLK_SMBCLK
DDR_B_D43
DDR_B_D2
DDR_B_MA13
DDR_B_D37
DDR_B_DQS1
DDR_B_BS#1
DDR_B_D62
DDR_B_DQS#6
DDR_B_D54
DDR_B_DM4
DDR_B_DQS6
DDR_B_DQS#1
DDR_B_D52
DDR_B_MA9
DDR_B_MA0
DDR_B_D3
DDR_B_D15
DDR_B_CAS#
DDR_B_D19
DDR_CS2_DIMMB#
DDR_B_DM0
DDR_B_DM1
DDR_B_D0
DDR_B_DM6
DDR_B_D56
DDR_B_D49
DDR_B_DM2
DDR_B_D50DDR_B_D51
DDR_B_D38DDR_B_D39
DDR_B_D31DDR_B_D30
DDR_B_D27
DDR_B_D28
DDR_B_D20DDR_B_D21DDR_B_D17DDR_B_D16
M_CLK_DDR2M_CLK_DDR#2
M_CLK_DDR3M_CLK_DDR#3
DDR_B_D5DDR_B_D4
DDR_B_D23DDR_B_D22
DDR_B_D26DDR_B_D24DDR_B_D25
DDR_B_D29
DDR_B_D61 DDR_B_D57
DDR_B_D58DDR_B_D59
M_ODT2DDR_B_MA13
DDR_B_RAS#DDR_CS2_DIMMB#
DDR_B_MA0DDR_B_BS#1
DDR_B_MA4DDR_B_MA2
DDR_B_MA7DDR_B_MA6
DDR_CKE3_DIMMBDDR_B_MA11
V_DDR_MCH_REF
DDR_B_DQS#[0..7]<8>
DDR_B_DQS[0..7]<8>
DDR_B_D[0..63]<8>
DDR_B_MA[0..13]<8>
DDR_B_DM[0..7]<8>
DDR_CKE3_DIMMB <7>
DDR_CS2_DIMMB# <7>
V_DDR_MCH_REF <7,13>
CLK_SMBCLK<13,15>CLK_SMBDATA<13,15>
DDR_B_WE#<8>
DDR_B_BS#1 <8>DDR_B_RAS# <8>
DDR_B_CAS#<8>
M_ODT3<7>
DDR_CKE2_DIMMB<7>
DDR_CS3_DIMMB#<7>
DDR_B_BS#2<8>
DDR_B_BS#0<8>
M_ODT2 <7>
M_CLK_DDR2 <7>M_CLK_DDR#2 <7>
M_CLK_DDR3 <7>M_CLK_DDR#3 <7>
PM_EXTTS#0 <7,13>
+0.9VS
+1.8V
+3VS+3VS
+1.8V
+1.8V
+0.9VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
DDRII-SODIMM SLOT2
14 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
SO-DIMM BSTANDARD
Bottom side
Layout Note:Place near JP42
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9VS
Layout Note:Place these resistorclosely JP42,alltrace length Max=1.5"
C157
2.2U_0805_16V4Z
1
2
R34
10K_0402_5%
12
RP14 56_0404_4P2R_5%1423
RP8
56_0404_4P2R_5%
1 42 3
C179
0.1U_0402_16V4Z
1
2 C144
0.1U_0402_16V4Z
1
2
C132
2.2U_0805_16V4Z
1
2
RP5
56_0404_4P2R_5%
1 42 3
RP16 56_0404_4P2R_5%1423
RP4
56_0404_4P2R_5%
1 42 3
C165
0.1U_0402_16V4Z
1
2
RP2 56_0404_4P2R_5%1423
C169
0.1U_0402_16V4Z
1
2
RP7
56_0404_4P2R_5%
1 42 3
RP1
56_0404_4P2R_5%
1 42 3
R32
10K_0402_5%
1 2
RP10
56_0404_4P2R_5%
1 42 3
C191
0.1U_0402_16V4Z
1
2C147
0.1U_0402_16V4Z
1
2
C142
0.1U_0402_16V4Z
1
2
C159
2.2U_0805_16V4Z
1
2
C140
0.1U_0402_16V4Z
1
2
JP24
FOX_ASOA426-M4R-TRCONN@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
C156
0.1U_0402_16V4Z
1
2 C133
0.1U_0402_16V4Z
1
2C170
0.1U_0402_16V4Z
1
2C146
0.1U_0402_16V4Z
1
2
RP13 56_0404_4P2R_5%1423
C141
0.1U_0402_16V4Z
1
2
C205
2.2U_0805_16V4Z
1
2
C137
0.1U_0402_16V4Z
1
2 C168
0.1U_0402_16V4Z
1
2
C366
2.2U_0805_16V4Z
1
2
C367
0.1U_0402_16V4Z
1
2
C176
0.1U_0402_16V4Z
1
2
RP11 56_0404_4P2R_5%1423
RP17 56_0404_4P2R_5%1423
RP19
56_0404_4P2R_5%
1423
C79
0.1U_0402_16V4Z
1
2
C202
0.1U_0402_16V4Z
1
2
C214
2.2U_0805_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CK_VDD_REF
+CK_VDD_48
+CK_VDD_48
CLKREF1
FSB
FSA
FSB
CLK_48M_CB
CLKREF1
H_STP_CPU#H_STP_PCI#
CLK_ENABLE#
CLK_ENABLE#
CLK_PCI_ICH PCI_ICH
FSA
CLK_SMBDATA
CLK_SMBCLK
PCI_SIO
PCI_EC
CLK_CPU_BCLK
CPU_BCLK#
CPU_XDP
CLK_MCH_BCLK#
CLK_CPU_XDP
CPU_BCLK
CLK_MCH_BCLK
MCH_BCLK#
MCH_BCLK
CLK_CPU_BCLK#
CLK_XTAL_IN
CLK_XTAL_OUT
CLKREQA#
CLK_MCH_BCLK#
CLK_MCH_BCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
PCI_PCM
PCI_ICH PCI_MINI
CLK_PCIE_ICH#PCIE_ICH#
CLK_PCIE_ICHPCIE_ICH
CPU_XDP# CLK_CPU_XDP#
CLK_PCIE_NC1PCIE_NC1
PCIE_NC1#
CLKREQC#
CLK_14M_ICH
CLKREQB#
CLK_PCIE_NC2#PCIE_NC2#
CLK_PCIE_NC2PCIE_NC2
CLKREQD#
CLK_48M_ICH
CLKIREF
+CK_VDD_REF
MCH_DREFCLK#
MCH_DREFCLK
CLK_MCH_DREFCLK#
CLK_MCH_DREFCLK
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
SSCDREFCLK
SSCDREFCLK#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_MCARD#
CLK_PCIE_MCARD
PCIE_MCARD#
PCIE_MCARD
MCH_SSCDREFCLK#
MCH_SSCDREFCLK
CLK_PCIE_MCARD
CLK_PCIE_MCARD#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_MCH_DREFCLK#
CLK_MCH_DREFCLK
CLK_PCIE_ICH#
CLK_PCIE_ICH
CLK_CPU_XDP
CLK_CPU_XDP#
CLK_PCIE_NC1#
CLK_PCIE_NC1
CLK_PCIE_NC2#
CLK_PCIE_NC2
CLK_SMBDATA
CLK_SMBCLK
CLK_PCIE_NC1#
PCI_MINI
PCIE_VGA CLK_PCIE_VGA
CLK_PCIE_VGA#PCIE_VGA#
MCH_3GPLL
MCH_3GPLL#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_SATA
PCIE_SATA#
PCI_PCM
CLKREQA#
CLKREQB#
CLKREQC#
CLKREQD#
CPU_BSEL2<5>
MCH_CLKSEL2 <7>
CPU_BSEL1<5>
MCH_CLKSEL1 <7>
CPU_BSEL0<5>
MCH_CLKSEL0 <7> CLK_48M_CB<32>CLK_48M_ICH<29>
H_STP_PCI#<29>H_STP_CPU#<29>
CLK_PCI_ICH<27>
CLK_PCI_SIO<42>
CLK_SMBDATA<13,14>
CLK_SMBCLK<13,14>
CLK_CPU_BCLK# <4>
CLK_CPU_BCLK <4>
CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>
CLKREQA# <37>
CLK_PCIE_ICH <29>
CLK_PCIE_ICH# <29>
CLK_PCIE_NC1 <34>
CLKREQC# <34>
CLK_PCI_PCM<32>
CLK_PCI_EC<44>
CLK_14M_ICH<29>
CLKREQB# <7>
CLK_ENABLE#<53>
CLK_PCIE_NC2# <34>
CLK_PCIE_NC2 <34>
CLKREQD# <34>
CLK_MCH_DREFCLK<7>
CLK_MCH_DREFCLK#<7>
MCH_SSCDREFCLK <7>
MCH_SSCDREFCLK# <7>
CLK_PCIE_MCARD# <37>
CLK_PCIE_MCARD <37>
ICH_SMBDATA<29,34,37>
ICH_SMBCLK<29,34,37>
CLK_PCIE_NC1# <34>
CLK_PCI_MINI<36>
CLK_PCIE_VGA# <18>
CLK_PCIE_VGA <18>
CLK_MCH_3GPLL <7>
CLK_MCH_3GPLL# <7>
CLK_PCIE_SATA# <28>
CLK_PCIE_SATA <28>
+3VS
+CK_VDD_MAIN2
+CK_VDD_MAIN1
+3VS
+VCCP
+VCCP
+VCCP
+3VS
+3VS
+3VS +3VS
+3VS
+CK_VDD_MAIN1
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Clock generator
15 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
1
1000
CLKSEL1
100
0
PCIMHz
133
0
Table : ICS954306
SRCMHz
33.3
CPUMHzCLKSEL2
33.31
FSLACLKSEL0
166
FSLC
1
FSLB
Place near U54Place these componentsnear each pin within 40mils.
Place crystal within500 mils of CK410
CLK_Ra
CLK_Rb
CLK_Rc
CLK_Rd
CLK_Re
CLK_Rf
CLK_Rc
Stuff
CLK_Rf
CLK_Ra
CLK_Re
CLK_Re
Stuff
CLK_Ra
FSB Frequency Selet:
No Stuff
CLK_Rb
No Stuff
533MHzCLK_Rf
CLK_Rc
CLK_Re
CLK_Rd
CLK_Rf
CLK_Ra
CLK_Rd
CLK_RcCPU Driven
No Stuff
CLK_Rb
Stuff
CLK_Rd
CLK_Rb
667MHz
*(Default)
LCD clock select
High:Pin18/19 = 100MHzLow:Pin18/19 = 96MHz Low:Pin44/45 = CPUCLK2_ITP
High:Pin44/45 = CLKREQ
Pin44/45 function select
**
R282 10_0402_5%
1 2
R324 0_0805_5%
1 2
R228
1K_0402_5%@
12
R297 10_0402_5%
1 2
C424
0.1U_0402_16V4Z
1
2
C418
0.1U_0402_16V4Z
1
2
R299
2.2K_0402_5%
R247 10_0402_5%
1 2
R310 10_0402_5%15.4@1 2
R288 10_0402_5% 1 2
R174 0_0805_5%
1 2
* Internal Pull-Up Resistor** Internal Pull-Down Resistor
U13
ICS954306_TSSOP64
*SEL_PCI1/PCICLK31
**SEL_SATA1/PCICLK42
**SEL_SATA2/PCICLK53
GND4
VDDPCI5
PCI/SRC_STOP#8
PCICLK66
**SEL_LCDCLK#/PCICLK_F17
FSLA/USB_48MHz11
SATACLKT 28
DOTT_96MHz13
VDD4810
Vtt_PwrGd#/PD9
SRCCLKC3 27
SRCCLKT3 26
SATACLKC 29
GND17
GND12
SRCCLKC1 21
SRCCLKT1 20
LCDCLK_SSC/SRCCLKC0 19
LCDCLK_SST/SRCCLKT0 18
SRCCLKT2 22
CPUCLKC0 51
CPU_STOP#61
REF0/PCICLK160
FSLC/TEST_SEL/REF159
VDDREF55
VDDCPU50
VDD16
FSLB/TEST_MODE15
DOTC_96MHz14
X2 56
X1 57
SCLK53
CPUCLKT0 52
*REQ_SEL/PCICLK262
*CLKREQB# 63
*CLKREQA# 64
GNDSRC40
SATA1/SRCCLKC4 31
SATA1/SRCCLKT4 30
SDATA54
CPUCLKT1 49
CPUCLKC1 48
VDDSRC24
GNDSRC25
GNDCPU47
SRCCLKC2 23
IREF46
*CPUCLKT2_ITP/CLKREQC# 45
*CPUCLKC2_ITP/CLKREQD# 44
SRCCLKT8 43
SRCCLKC8 42
GNDSATA32
VDDSRC41
GND58
SRCCLKT7 39
SRCCLKC7 38
SRCCLKT6 37
SRCCLKC6 36
SATA2/SRCCLKT5 35
SATA2/SRCCLKC5 34
VDDSATA33
C441
0.1U_0402_16V4Z
1
2
R270 10_0402_5%UMA@1 2
R183
0_0402_5%
@
12
R296 49.9_0402_1%@1 2
R258 10_0402_5%
1 2R254 10_0402_5%
1 2
R20633_0402_5% 12
R323
2.2K_0402_5%
Y214.31818MHZ_20P_1BX14318BE1A
12
R309 10_0402_5%15.4@1 2
R202
1K_0402_5%@
12 R286 49.9_0402_1%@
12
R291 49.9_0402_1%@1 2
R253 10_0402_5%UMA@1 2
R1881_0805_1%
1 2
C422
0.1U_0402_16V4Z
1
2
R283 49.9_0402_1%@1 2
R301 10_0402_5%
1 2
R311 0_0402_5%9LP@ 1 2
R21533_0402_5% 12
C425
0.1U_0402_16V4Z
1
2
R284 10_0402_5%
1 2
R259 49.9_0402_1%@12
C417
0.1U_0402_16V4Z
1
2
C802 1000P_0402_50V7K 1 2
R22533_0402_5%@ 12
C803 1000P_0402_50V7K 1 2
R2310_0402_5%
1 2
R589
100K_0402_5%
12
R257 10_0402_5%UMA@1 2
C431
0.1U_0402_16V4Z
1
2
R2001K_0402_5%
1 2
R22433_0402_5% 12
R275 49.9_0402_1%@1 2
R305 0_0402_5%9LP@ 1 2
R218 10K_0402_5%@12
R22933_0402_5%
12
R240 49.9_0402_1%@12
R1872.2_0805_1%
1 2
R235
10K_0402_5%
12
R318 49.9_0402_1%@1 2
R21610K_0402_5% 12
R201
1K_0402_5%@
12
R278 10_0402_5%@1 2
C416
10U_0805_10V4Z
1
2
R2058.2K_0402_5%
12
C430
0.1U_0402_16V4Z
1
2
C456
10U_0805_10V4Z
1
2
C440
0.1U_0402_16V4Z
1
2
R23256_0402_5%@
12
R303 49.9_0402_1%@1 2
R243 12_0402_5%
12
R239 10_0402_5%
1 2
R267 49.9_0402_1%@1 2
C804 1000P_0402_50V7K 1 2
R271 10_0402_5%@1 2
R255 49.9_0402_1%@12
R312
10K_0402_5%
12
R230 33_0402_5%
12
R292 10_0402_5% 1 2
R252 49.9_0402_1%@1 2
R226 10K_0402_5%@12
R295 49.9_0402_1%@1 2
C421 22P_0402_50V8J12
R289 10_0402_5%17@1 2
R273 10K_0402_5% 12
R1910_0402_5%
1 2
R269 49.9_0402_1%@1 2
R199
0_0402_5%
@
12
R233
10K_0402_5%@
12
R294 10_0402_5%
1 2
R290 49.9_0402_1%@12
R248 49.9_0402_1%@12
R268 10_0402_5%G71@1 2
R2662.4K_0402_1%
1 2
R276 10_0402_5%G71@1 2
R279 49.9_0402_1% @12
R281 49.9_0402_1%@1 2
C805 1000P_0402_50V7K 1 2
R246 10_0402_5%UMA@1 2
R302 49.9_0402_1%@1 2
G
D S
Q122N7002_SOT23
2
1 3
R236 12_0402_5%
12
R1841K_0402_5%
1 2 R319 49.9_0402_1%@1 2
R1770_0402_5%
1 2
C419 22P_0402_50V8J
12
R2378.2K_0402_5%
12
C450
0.1U_0402_16V4Z
1
2
R2271K_0402_5%
1 2
R256 49.9_0402_1%@1 2
R308
10K_0402_5%@
12
R238
10K_0402_5%
12
R272 49.9_0402_1%@12
R304 10_0402_5%
1 2
R277 10K_0402_5% 12
G
D S
Q152N7002_SOT23
2
1 3
R285 10_0402_5%17@1 2
R245 49.9_0402_1%@1 2
R287 49.9_0402_1%@1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
WL_LED#
LCD_I2C_DAT_CLCD_I2C_CLK_C
DAC_BRIGINVT_PWMDISPOFF#
EDID_DAT_LCD
EDID_CLK_LCD
ENVDD
LVDSA2+
LVDS_B0+LVDS_B0-
LVDS_BC+LVDS_BC-
LVDS_A2+LVDS_A2-
LVDS_AC-LVDS_AC+
LVDS_A1+
LVDS_B2+LVDS_B2-
LVDS_A1-
LVDS_B1+LVDS_B1-
LVDS_A0+LVDS_A0-
LVDSAC-
LVDSA0+
WL_LED#
LVDSBC+LVDSBC-
LVDSB0-
LVDSA2-
LVDSA1+
LVDSA0-
INVT_PWM
LVDSB2-
EDID_CLK_LCD
DAC_BRIG
EDID_DAT_LCD
LVDSB2+
DISPOFF#
LVDSA1-
LVDSAC+
LVDSB1+
DISPOFF#
LVDSB1-
LVDSB0+
GMCH_ENBKL<9>
BKOFF#<44>
ENVDD<18>
INVT_PWM<44>
EDID_CLK_LCD<9>EDID_DAT_LCD<9>
DAC_BRIG<44>
LCD_I2C_CLK_C<18>LCD_I2C_DAT_C<18>
GMCH_LVDDEN<9>
LVDSA0+ <9>LVDSA0- <9>
LVDSA1- <9>LVDSA1+ <9>
LVDSA2- <9>LVDSA2+ <9>
LVDSAC+ <9>LVDSAC- <9>
LVDSB0- <9>LVDSB0+ <9>LVDSB1+ <9>LVDSB1- <9>
LVDSB2- <9>LVDSB2+ <9>
LVDSBC- <9>LVDSBC+ <9>
LVDS_B0- <18>LVDS_B0+ <18>
LVDS_BC- <18>LVDS_BC+ <18>
LVDS_A2- <18>LVDS_A2+ <18>
LVDS_AC+ <18>LVDS_AC- <18>
LVDS_A1- <18>LVDS_A1+ <18>
LVDS_B2- <18>LVDS_B2+ <18>
LVDS_B1+ <18>LVDS_B1- <18>
LVDS_A0+ <18>LVDS_A0- <18>
WL_LED#<37,42> +3VS
INVPWR_B+B+
+3VS+LCDVDD
+LCDVDD +5VALW
INVPWR_B+
+5VS
+3VS
+LCDVDD
INVPWR_B+
+5VS
+3VS
+3VS
+LCDVDD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
LVDS ConnectorCustom
16 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
LCD Panel & inverter Connector
UMA
Discrete L25 FBMA-L10-201209-301LMT
1 2
C574
0.1U_0402_16V4Z
1
2
L24 FBMA-L10-201209-301LMT@ 1 2
R431100K_0402_5%UMA@
12
D17CH751H-40_SC76
21
G
D
SQ32
2N7002_SOT23
2
13
R428
100K_0402_5% 1
2
R430
4.7K_0402_5%
12
D16CH751H-40_SC76UMA@
21
JP2
ACES_88107-4000G
13579111315171921232527293133353739
2468
10121416182022242628303234363840
G
D S
Q33SI2301BDS_SOT23
2
1 3
C5734.7U_0805_10V4Z
1
2
JP1
ACES_88107-4000G
13579111315171921232527293133353739
2468
10121416182022242628303234363840
C806
0.1U_0402_16V4Z
1
2
R4330_0402_5%UMA@
12
R429
100_0402_1%
12
R434
10K_0402_5% 1 2
C572
0.047U_0402_16V4Z
1
2Q31DTC124EK_SC59
2
13
C575
4.7U_0805_10V4Z
1
2
C807
68P_0402_50V8K
1
2
R435
10K_0402_5% 1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
COMPS_CL
TVCRMA
TVLUMA
CRMA_CL
LUMA_CL
TVGND
CRTHSYNC
CRTVSYNC
CRTG
CRTB
CRT_VSYNCRFL
CRT_HSYNC_R
CRT_VSYNC_R
3V_DDCDA
3V_DDCCL
TVCOMPS
TVLUMA
TVCRMA
TVCOMPS
CRTL_G
CRTL_B
CRT_HSYNCRFL
+CRTVDD
CRTR CRTL_RM_SEN#
CRT_R<9>
CRT_G<9>
CRT_B<9>
M_RED<18>
M_GRN<18>
M_BLU<18>
M_HSYNC<18>
CRT_HSYNC<9>
CRT_VSYNC<9>
M_VSYNC<18>
3VDDCDA <9>
3VDDCCL <9>
M_DDCDATA <18>
M_DDCCLK <18>
TV_LUMA<9>
TV_CRMA<9>
TV_COMPS<9>
TVLUMA <46>
TVCRMA <46>
TVCOMPS <46>
M_LUMA<18>
M_CRMA<18>
M_COMP<18>
+3VS
+CRTVDD
+5VS
+R_CRT_VCC+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
CRT & TVout ConnectorCustom
17 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
S-VideoTV-Out Connector
CRT CONNECTOR
+R_CRT_VCC , +CRTVDD (40mils)
CLOSE TO JP3
EMI
EMI
EMI
EMI
F1
1.1A_6VDC_FUSE
21
C25
33P_
0402
_25V
8K
1
2
C50
330P
_040
2_50
V7K
1
2
C57
722
0P_0
402_
25V8
K
1
2
R446
0_0402_5%G71@1 2
JP3ALLTO_C10510-115A5-L_15P-s
611
17
1228
1339
144
1015
5
1617
R25
0_0402_5%G71@1 2
R15
0_0402_5%G71@1 2
L3MBK2012800YZF
1 2
R449
0_0402_5%UMA@1 2
L2MBK2012800YZF
1 2
U28
74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1
G3
P5
R27
0_0402_5%G71@1 2
U29
74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1
G3
P5
D1
RB411D_SOT23
2 1
C20
10P_
0402
_50V
8K
@
1
2
R8
0_0402_5%G71@1 2
R12
0_0402_5%UMA@1 2
L4MBC1608121YZF_0603
1 2
C74
330P
_040
2_50
V7K
1
2
R445
0_0402_5%UMA@1 2
L1MBK2012800YZF
1 2
R447
0_0402_5%UMA@1 2
L27FBM-L11-160808-800LMT_0603
1 2
C9
10P_
0402
_50V
8K
@
1
2
R16
4.7K
_040
2_5%
R10
75_0
402_
5%
12
R444
2.2K_0402_5%
D46
NZQA5V6AXV5T1_SOT533-5
2
1 5
43
R13
0_0402_5%UMA@1 2
R20
0_0402_5%G71@1 2
C77
270P
_040
2_50
V7K
1
2
R19
2.2K_0402_5%
R31
0_0402_5%UMA@1 2
C58
110
P_04
02_5
0V8K
1
2
C29
10P_
0402
_50V
8K
@
1
2
C5820.1U_0402_16V4Z
1
2
L26FBM-L11-160808-800LMT_0603
1 2
C75
270P
_040
2_50
V7K
1
2
R26
0_0402_5%UMA@1 2
C76
330P
_040
2_50
V7K
1
2
R450
0_0402_5%G71@1 2
R28
75_0
402_
5%
12
JP17
SUYIN_030107FR007G317ZR
11223344556677 GND 8
GND 9
C49
270P
_040
2_50
V7K
1
2
R448
0_0402_5%G71@1 2
R23
75_0
402_
5%
12
C57
910
P_04
02_5
0V8K
1
2
C7
33P_
0402
_25V
8K
1
2
G
D S
Q12N7002_SOT23
2
1 3
R29
75_0
402_
5%
12
L5MBC1608121YZF_0603
1 2
G
D S
Q342N7002_SOT23
2
1 3
R11
0_0402_5%G71@1 2
R14
75_0
402_
5%
12
R44
34.
7K_0
402_
5%
R21
0_0402_5%UMA@1 2
C17
33P_
0402
_25V
8K
1
2
R24
0_0402_5%UMA@1 2
R7
75_0
402_
5%
12
R22
0_0805_5%
1 2
C580
0.1U_0402_16V4Z
1 2
C46
220P
_040
2_25
V8K
1
2
R9
0_0402_5%UMA@1 2
R30
0_0402_5%G71@1 2
L6MBC1608121YZF_0603
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_DDCDATA
PEX_PLL_TERM
LCD_I2C_CLK_C
DACBVREF
VGA_RST#
PEX_CFG0
PEX_CFG1PEX_CFG2
PCI_DEVID0PCI_DEVID1
PCI_DEVID2CRYSTAL_0
CRYSTAL_1
M_BLUM_GRN
M_RED
XTALINXTALOUT
DACAVREF
ENVDD
M_CRMA
M_LUMA
M_DDCCLK
NV_ENBKL
LCD_I2C_DAT_C
SUB_VENDOR
THER_ALERT#
THER_ALERT#
LCD_I2C_CLK_C
LCD_I2C_DAT_C
D-D+
M_COMP
PEG_RXN[0:15]
PEG_RXP[0:15]
DVI_SCLKDVI_SDATA
I2CH_SCLI2CH_SDA
D+
D-
RAM_CFG0RAM_CFG1
PCI_DEVID3
RAM_CFG2RAM_CFG3
MOBILE_MODE
DVI_SCLKDVI_SDATA
LCD_I2C_CLK_C
I2CH_SCLI2CH_SDA
M_VSYNCM_HSYNC
CLK_PCIE_VGA#CLK_PCIE_VGA
LCD_I2C_DAT_C
PEG_M_TXP[0..15]
PEG_M_TXN[0..15]
DACB_RSET
DACB_RSET
GPIO11
GPIO11
PEG_M_TXP15
PEG_M_TXN13
PEG_M_TXN8
PEG_M_TXP1
PEG_M_TXP0
PEG_M_TXN10
PEG_M_TXN4
PEG_M_TXP7
PEG_M_TXP4
PEG_M_TXP13
PEG_M_TXP8
PEG_M_TXP10
PEG_M_TXP6PEG_M_TXN6
PEG_M_TXN12
PEG_M_TXN3
PEG_M_TXN14
PEG_M_TXN9
PEG_M_TXN11
PEG_M_TXN5
PEG_M_TXP12
PEG_M_TXN2
PEG_M_TXN15
PEG_M_TXP3
PEG_M_TXP14
PEG_M_TXP9
PEG_M_TXN1
PEG_M_TXP11
PEG_M_TXN7
PEG_M_TXP5
PEG_M_TXP2
PEG_M_TXN0
PEG_RXP1
PEG_RXP2
PEG_RXN0PEG_RXP0
PEG_RXN3
PEG_RXN1
PEG_RXN2
PEG_RXP4PEG_RXN4PEG_RXP5
PEG_RXP3
PEG_RXN5
PEG_RXP7
PEG_RXP6
PEG_RXN7
PEG_RXN6
PEG_RXN8
PEG_RXN11
PEG_RXP9PEG_RXN9PEG_RXP10PEG_RXN10
PEG_RXP12
PEG_RXN13PEG_RXP13PEG_RXN12
PEG_RXP11
PEG_RXP15PEG_RXN14PEG_RXP14
PEG_RXN15
PEG_DTXP0PEG_DTXN0PEG_DTXP1PEG_DTXN1PEG_DTXP2PEG_DTXN2PEG_DTXP3PEG_DTXN3PEG_DTXP4PEG_DTXN4PEG_DTXP5PEG_DTXN5PEG_DTXP6PEG_DTXN6PEG_DTXP7PEG_DTXN7PEG_DTXP8PEG_DTXN8PEG_DTXP9PEG_DTXN9PEG_DTXP10PEG_DTXN10PEG_DTXP11PEG_DTXN11PEG_DTXP12PEG_DTXN12PEG_DTXP13PEG_DTXN13PEG_DTXP14PEG_DTXN14PEG_DTXP15PEG_DTXN15
PEG_RXP8
CLK_PCIE_VGA<15>CLK_PCIE_VGA#<15>
VGA_RST#<27>
OSC_SPREAD <26>OSC_OUT <26>
M_DDCCLK <17>M_DDCDATA <17>
LCD_I2C_CLK_C <16>LCD_I2C_DAT_C <16>
M_CRMA <17>M_COMP <17>M_LUMA <17>
M_RED <17>M_BLU <17>M_GRN <17>
PCI_DEVID3 <26>
CRYSTAL_0 <26>PCI_DEVID2 <26>PCI_DEVID0 <26>PCI_DEVID1 <26>CRYSTAL_1 <26>
ENVDD <16>NV_ENBKL <44>
PEX_PLL_TERM <26>SUB_VENDOR <26>
PEX_CFG1 <26>PEX_CFG2 <26>
PEX_CFG0 <26>
PEG_RXP[0:15] <9>
PEG_RXN[0:15] <9>
RAM_CFG2 <26>RAM_CFG3 <26>
MOBILE_MODE <26>
RAM_CFG0 <26>RAM_CFG1 <26>
M_VSYNC <17>M_HSYNC <17>
LVDS_A2-<16>LVDS_A2+<16>
LVDS_A0+<16>
LVDS_A1-<16>LVDS_A1+<16>
LVDS_AC-<16>LVDS_AC+<16>
LVDS_A0-<16>
LVDS_B0+<16>LVDS_BC-<16>LVDS_BC+<16>
LVDS_B0-<16>
LVDS_B2-<16>LVDS_B2+<16>LVDS_B1-<16>LVDS_B1+<16>
PEG_M_TXP[0..15] <9>
PEG_M_TXN[0..15] <9>
+3VS
+3VS
+3VS
+3VS
MIOA_VDDQ
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G72/73VGA BoardCustom
18 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
I2C address1001 100x
For VDD_CORE voltage select
Thermal sensor
Close to Sensor
If Spread spectrum not stuff than stuff resistor
FAE recommand 6/29
DVI pull-high close to GPU
R1178 R1180 are optional 、trim resistor to provide finer control of the RSET value
G
D
S
Q62N7002_SOT23@
2
13
C1220.1U_0402_16V4Z128@ 1 2
R106 2.2K_0402_5%128@1 2
R85124_0402_5%
128@1 2
C930.1U_0402_16V4Z128@ 1 2
C6260.1U_0402_16V4Z128@ 1 2
C980.1U_0402_16V4Z128@ 1 2
C890.1U_0402_16V4Z128@ 1 2
R145124_0402_5%128@
12
R101 2K_0402_5%@1 2
C646
22P_0402_50V8J128@
1
2
C1270.1U_0402_16V4Z128@ 1 2
Part 4 of 6
LVD
S/TM
DS
NCG
ENER
AL
SERIAL
U33D
NV72/73M_BGA820G71@
IFPA_TXC_NAJ9 IFPA_TXCAK9 NC_0 B32NC_1 C20NC_2 D1NC_3 J6NC_4 U3NC_5 U4NC_6 U5NC_7 U6NC_8 V1NC_9 V3
NC_10 V4NC_11 V5NC_12 V6NC_13 W1NC_14 W3NC_15 W4NC_16 W5NC_17 Y5NC_18 Y6NC_19 Y30NC_20 AC26NC_21 AG12NC_22 AH13NC_23 AM8NC_24 AM9NC_25 AM10
IFPA_TXD0AH6IFPA_TXD0_NAJ6IFPA_TXD1AH8IFPA_TXD1_NAH7IFPA_TXD2AJ8IFPA_TXD2_NAK8IFPA_TXD3AJ5IFPA_TXD3_NAH5IFPB_TXCAK4IFPB_TXC_NAL4IFPB_TXD4AM6IFPB_TXD4_NAM5IFPB_TXD5AM7IFPB_TXD5_NAL7IFPB_TXD6AK6IFPB_TXD6_NAK5IFPB_TXD7AK7IFPB_TXD7_NAL8
IFPAB_RSETAL5
IFPC_TXCAM2IFPC_TXC_NAM3IFPC_TXD0AE2IFPC_TXD0_NAE1IFPC_TXD1AF1IFPC_TXD1_NAF2IFPC_TXD2AG1IFPC_TXD2_NAH1IFPD_TXCAG3IFPD_TXC_NAH2IFPD_TXD4AK1IFPD_TXD4_NAJ1IFPD_TXD5AL2IFPD_TXD5_NAL1IFPD_TXD6AJ2IFPD_TXD6_NAJ3
IFPCD_RSETAH3
BUFRST_N F3MEMSTRAPSEL0 AE26
STEREO T3STRAP F1
MEMSTRAPSEL1 AD26MEMSTRAPSEL2 AH31MEMSTRAPSEL3 AH32
SWAPRDY_A M6THERMDN J1THERMDP K1
ROM_SCLK AA7ROM_SI W2
ROM_SO AA6ROMCS_N AA4
C2700.01U_0402_16V7K128@
1 2
C950.1U_0402_16V4Z128@ 1 2
C970.1U_0402_16V4Z128@ 1 2
C1030.1U_0402_16V4Z128@ 1 2
R48910K_0402_5% @
12
C6190.1U_0402_16V4Z128@ 1 2
C900.1U_0402_16V4Z128@ 1 2
R81 10K_0402_5% 1 2
R504200_0402_5%128@
12
R467
1K_0402_5%@1 2
R57 10K_0402_5%@1 2
R502 2.2K_0402_5%128@1 2
DVO
/ G
PIO
PCI E
XPR
ESS
TEST
CLK
Part 1 of 6
DACs
I2C
U33A
NV72/73M_BGA820G71@
PEX_RX0AK13PEX_RX0_NAK14PEX_RX1AM14PEX_RX1_NAM15PEX_RX2AL15PEX_RX2_NAL16PEX_RX3AK16PEX_RX3_NAK17PEX_RX4AL17PEX_RX4_NAL18PEX_RX5AM18PEX_RX5_NAM19PEX_RX6AK19PEX_RX6_NAK20PEX_RX7AL20PEX_RX7_NAL21PEX_RX8AM21PEX_RX8_NAM22PEX_RX9AK22PEX_RX9_NAK23PEX_RX10AL23PEX_RX10_NAL24PEX_RX11AM24PEX_RX11_NAM25PEX_RX12AK25PEX_RX12_NAK26PEX_RX13AL26PEX_RX13_NAL27PEX_RX14AM27PEX_RX14_NAM28PEX_RX15AL28PEX_RX15_NAL29
PEX_TX0AJ15PEX_TX0_NAK15PEX_TX1AH16PEX_TX1_NAG16PEX_TX2AG17PEX_TX2_NAH17PEX_TX3AG18PEX_TX3_NAH18PEX_TX4AK18PEX_TX4_NAJ18PEX_TX5AJ19PEX_TX5_NAH19PEX_TX6AG20PEX_TX6_NAH20PEX_TX7AG21PEX_TX7_NAH21PEX_TX8AK21PEX_TX8_NAJ21PEX_TX9AJ22PEX_TX9_NAH22PEX_TX10AG23PEX_TX10_NAH23PEX_TX11AK24PEX_TX11_NAJ24PEX_TX12AJ25PEX_TX12_NAH25PEX_TX13AH26PEX_TX13_NAG26PEX_TX14AK27PEX_TX14_NAJ27PEX_TX15AJ28PEX_TX15_NAH27
PEX_REFCLKAH14PEX_REFCLK_NAJ14
PEX_RST_NAH15
XTALINU1XTALOUTU2
XTALOUTBUFFT2
XTALSSINT1
GPIO0 K3GPIO1 H1GPIO2 K5GPIO3 G5GPIO4 E2GPIO5 J5GPIO6 G6GPIO7 K6GPIO8 E1GPIO9 D2
GPIO10 H5GPIO11 F4GPIO12 E3
MIOAD0 P2MIOAD1 N2MIOAD2 N1MIOAD3 N3MIOAD4 M1MIOAD5 M3MIOAD6 P5MIOAD7 N6MIOAD8 N5MIOAD9 M4
MIOAD10 L4MIOAD11 L5
MIOA_HSYNC R3MIOA_VSYNC R1
MIOA_DE P1MIOA_CTL3 P3
MIOA_CLKIN M5MIOA_CLKOUT R4
MIOA_CLKOUT_N P4
MIOA_VREF L2
MIOBD0 AC3MIOBD1 AC1MIOBD2 AC2MIOBD3 AB2MIOBD4 AB1MIOBD5 AA1MIOBD6 AB3MIOBD7 AA3MIOBD8 AC5MIOBD9 AB5
MIOBD10 AB4MIOBD11 AA5
MIOB_HSYNC AF3MIOB_VSYNC AE3
MIOB_DE AD1MIOB_CTL3 AD3
MIOB_CLKIN AE4MIOB_CLKOUT AD4
MIOB_CLKOUT_N AD5
MIOB_VREF Y2
DACA_HSYNC AF10DACA_VSYNC AK10
DACA_RED AH11DACA_BLUE AH12
DACA_GREEN AJ12DACA_IDUMP AG9DACA_RSET AH9
DACA_VREF AH10
DACC_HSYNC AG7DACC_VSYNC AG5
DACC_RED AF6DACC_BLUE AE5
DACC_GREEN AG6DACC_IDUMP AG4DACC_RSET AF5
DACC_VREF AH4
DACB_RED R6DACB_BLUE T6
DACB_GREEN T5DACB_IDUMP V7DACB_RSET R7
DACB_VREF R5
I2CA_SCL K2I2CA_SDA J3I2CB_SCL H4I2CB_SDA J4I2CC_SCL G2I2CC_SDA G1I2CH_SCL G3I2CH_SDA H3
IFPAB_VPROBEAM4IFPCD_VPROBEAK3
JTAG_TCKAJ11JTAG_TDIAK12JTAG_TDOAL12JTAG_TMSAK11JTAG_NAL13
TESTMEMCLKA26TESTMODEH2
PEX_TSTCLK_OUTAM12PEX_TSTCLK_OUT_NAM11
C1010.1U_0402_16V4Z128@ 1 2
C6170.1U_0402_16V4Z128@ 1 2
C1520.1U_0402_16V4Z128@
1 2
C990.1U_0402_16V4Z128@ 1 2
C171 0.01U_0402_16V7K128@1 2
R14688.7_0402_1%@
12
R90 10K_0402_5%128@12
R4992.2K_0402_5%128@
12
C1230.1U_0402_16V4Z128@ 1 2
C910.1U_0402_16V4Z128@ 1 2
R496
22_0402_5%128@
1 2
C6200.1U_0402_16V4Z128@ 1 2
C6250.1U_0402_16V4Z128@ 1 2
U34
MAX6649MUA_8UMAX128@
VDD1
D+2
D-3
OVERT#4
SCLK 8
SDATA 7
ALERT# 6
GND 5
C880.1U_0402_16V4Z128@ 1 2
R110 2.2K_0402_5%128@1 2
C940.1U_0402_16V4Z128@ 1 2
Y5
27MHz_16PF_6P27000126128@
GND4
IN1
OUT 3
GND 2
C1020.1U_0402_16V4Z128@ 1 2
C6220.1U_0402_16V4Z128@ 1 2
C1260.1U_0402_16V4Z128@ 1 2
C960.1U_0402_16V4Z128@ 1 2
R49210K_0402_5%@1
2
C6860.1U_0402_16V4Z128@
1
2R5032.2K_0402_5%
128@
12
R100 2K_0402_5%@1 2
R115
10K_0402_5%128@12
R105
10K_0402_5%128@
1 2
R130 2.2K_0402_5%128@1 2R128 2.2K_0402_5%128@1 2
C680
22P_0402_50V8J128@
1
2
C1000.1U_0402_16V4Z128@ 1 2
C1350.1U_0402_16V4Z128@ 1 2
C6832200P_0402_25V7K128@
1
2
C6210.1U_0402_16V4Z128@ 1 2
C920.1U_0402_16V4Z128@ 1 2
R139316_0402_1%@1 2
C1610.1U_0402_16V4Z@
1 2
R512 10K_0402_5%128@1 2
R140316_0402_1%@1 2
R113 10K_0402_5%128@1 2
C6240.1U_0402_16V4Z128@ 1 2
R56 10K_0402_5%@1 2
C6180.1U_0402_16V4Z128@ 1 2
R88 1K_0402_5%@1 2
C6230.1U_0402_16V4Z128@ 1 2
R501 0_0402_5%128@1 2
R77 10K_0402_5% 1 2
R500 2.2K_0402_5%128@1 2
C1340.1U_0402_16V4Z128@ 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBAD62FBAD63
FBAA3FBAA0FBAA2
FBAWE#
FBAA1
FBARAS#
FBAD0
FBAA11FBAA10
FBAD1
FBAA8
FBAD2FBAD3FBAD4FBAD5FBAD6FBAD7FBAD8FBAD9FBAD10
FBAA9FBAA6
FBAD11
FBAA5
FBAD12FBAD13FBAD14FBAD15FBAD16
FBACS0#FBACS1#
FBAD17FBAD18FBAD19FBAD20
FBAA7
FBAD21FBAD22FBAD23FBAD24FBAD25FBAD26FBAD27
FBA_VREF1
FBAD28FBAD29FBAD30FBAD31FBAD32FBAD33 DQMA#5FBAD34
DQMA#0
DQMA#4
DQMA#2DQMA#1
DQMA#3
DQMA#7DQMA#6
FBAD35FBAD36FBAD37FBAD38FBAD39
FBAA4
FBAD40
FBACAS#
FBAD41FBAD42FBAD43FBAD44FBAD45FBAD46FBAD47FBAD48FBAD49FBAD50
FBA_BA0
FBA_BA1
DQMA#[7..0]
DQSA#[7..0]
FBAA[12..0]
FBAD[63..0]
FBAD51FBAD52FBAD53FBAD54FBAD55FBAD56FBAD57FBAD58FBAD59FBAD60FBAD61
FBCD38FBCD39FBCD40FBCD41FBCD42FBCD43FBCD44FBCD45FBCD46FBCD47FBCD48FBCD49FBCD50FBCD51FBCD52FBCD53FBCD54FBCD55FBCD56FBCD57FBCD58FBCD59FBCD60FBCD61
FBCD0
FBCD62FBCD63
FBCD1FBCD2FBCD3FBCD4FBCD5FBCD6FBCD7FBCD8FBCD9FBCD10FBCD11FBCD12FBCD13FBCD14FBCD15FBCD16FBCD17FBCD18FBCD19FBCD20FBCD21FBCD22FBCD23FBCD24FBCD25FBCD26FBCD27FBCD28FBCD29FBCD30FBCD31FBCD32FBCD33FBCD34FBCD35FBCD36FBCD37
FBCA[12..0]
FBCD[63..0]
DQMC#[7..0]
DQSC#[7..0]
FBCA3FBCA0FBCA2FBCA1
FBCWE#FBC_BA0
CLKC0CLKC0#CLKC1CLKC1#
FBCA11FBCA10
FBCA9FBCA6FBCA5
FBCA8
FBCA7FBCA4FBCCAS#
FBA_VREF2
FBCRAS#
FBC_BA1
DQMC#3
DQMC#1DQMC#2
DQMC#0
DQMC#4
DQMC#6DQMC#5
DQMC#7
FBC_CKE
FBCCS0#FBCCS1#
FBAA12 FBCA12
ODTA0 ODTC0
FBA_CKEODTA0 ODTC0
ODTA0ODTC0
FBBA3FBBA4FBBA5
FBBA2
FBDA3FBDA4FBDA5
FBDA2
FBDA[2..5]FBBA[2..5]
DQSA[7..0]DQSC[7..0]
DQSA2DQSA1
DQSA3DQSA4
DQSA6DQSA5
DQSA7
DQSA0
DQSA#2DQSA#1
DQSA#3DQSA#4
DQSA#6DQSA#5
DQSA#7
DQSA#0DQSC#1
DQSC#3
DQSC#6DQSC#7
DQSC#5DQSC#4
DQSC#0
DQSC#2
DQSC7
DQSC0
DQSC3
DQSC6
DQSC1
DQSC5DQSC4
DQSC2
CLKA1#
CLKA0#CLKA0
CLKA1
FBAD[63..0] <22,23>
FBAA[12..0] <22,23>
DQSA#[7..0] <22,23>
DQMA#[7..0] <22,23>
FBACS0# <22,23>FBAWE# <22,23>FBA_BA0 <22,23>
FBA_CKE <22,23>
FBARAS# <22,23>
FBA_BA1 <22,23>
FBACAS# <22,23>
DQSA[7..0] <22,23>
ODTA0 <22,23> ODTC0 <24,25>
FBBA[2..5] <23>
FBCD[63..0] <24,25>
FBCA[12..0] <24,25>
FBDA[2..5] <25>
DQSC#[7..0] <24,25>
DQSC[7..0] <24,25>
DQMC#[7..0] <24,25>
CLKA0 <22>CLKA0# <22>CLKA1 <23>CLKA1# <23>
+1.8VS+1.8VS
+1.8VS+1.8VS
FBCCS0# <24,25>FBCWE# <24,25>FBC_BA0 <24,25>
FBC_CKE <24,25>
FBCRAS# <24,25>
FBC_BA1 <24,25>
FBCCAS# <24,25>
CLKC0 <24>CLKC0# <24>CLKC1 <25>CLKC1# <25>
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G72/73VGA BoardCustom
19 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
10mil10mil 10mil
T24PAD
C687
0.1U_0402_16V4Z
1
2
T21PAD
C355
0.1U_0402_16V4Z@
1
2
R1431K_0402_1%@
12
R16010K_0402_5%256@
12
MEM
OR
Y IN
TER
FAC
E B
Part 3 of 6
U33C
NV72/73M_BGA820G71@
FBCD0B7FBCD1A7FBCD2C7FBCD3A2FBCD4B2FBCD5C4FBCD6A5FBCD7B5FBCD8F9FBCD9F10FBCD10D12FBCD11D9FBCD12E12FBCD13D11FBCD14E8FBCD15D8FBCD16E7FBCD17F7FBCD18D6FBCD19D5FBCD20D3FBCD21E4FBCD22C3FBCD23B4FBCD24C10FBCD25B10FBCD26C8FBCD27A10FBCD28C11FBCD29C12FBCD30A11FBCD31B11FBCD32B28FBCD33C27FBCD34C26FBCD35B26FBCD36C30FBCD37B31FBCD38C29FBCD39A31FBCD40D28FBCD41D27FBCD42F26FBCD43D24FBCD44E23FBCD45E26FBCD46E24FBCD47F23FBCD48B23FBCD49A23FBCD50C25FBCD51C23FBCD52A22FBCD53C22FBCD54C21FBCD55B22FBCD56E22FBCD57D22FBCD58D21FBCD59E21FBCD60E18FBCD61D19FBCD62D18FBCD63E19
FBC_CMD0 C13FBC_CMD1 A16FBC_CMD2 A13FBC_CMD3 B17FBC_CMD4 B20FBC_CMD5 A19FBC_CMD6 B19FBC_CMD7 B14FBC_CMD8 E16FBC_CMD9 A14
FBC_CMD10 C15FBC_CMD11 B16FBC_CMD12 F17FBC_CMD13 C19FBC_CMD14 D15FBC_CMD15 C17FBC_CMD16 A17FBC_CMD17 C16FBC_CMD18 D14FBC_CMD19 F16FBC_CMD20 C14FBC_CMD21 C18FBC_CMD22 E14FBC_CMD23 B13FBC_CMD24 E15FBC_CMD25 F15FBC_CMD26 A20
FBCDQM0 A4FBCDQM1 E11FBCDQM2 F5FBCDQM3 C9FBCDQM4 C28FBCDQM5 F24FBCDQM6 C24FBCDQM7 E20
FBCDQS_RN0 C6FBCDQS_RN1 E9FBCDQS_RN2 E6FBCDQS_RN3 A8FBCDQS_RN4 B29
FBC_DEBUG F12
FBCDQS_RN5 E25FBCDQS_RN6 A25FBCDQS_RN7 F21
FBCDQS_WP0 C5FBCDQS_WP1 E10FBCDQS_WP2 E5FBCDQS_WP3 B8FBCDQS_WP4 A29FBCDQS_WP5 D25FBCDQS_WP6 B25FBCDQS_WP7 F20
FB_VREF2 A28
FBC_CLK0 E13FBC_CLK0_N F13
FBC_CLK1 F18FBC_CLK1_N E17FBC_REFCLK B1
FBC_REFCLK_N C1
R5061K_0402_1%
12
R1381K_0402_1%@
12
R16110K_0402_5%@
12
R94 0_0402_5%@1 2
R960_0402_5%128@
1 2
R9710K_0402_5%128@
12
R48710K_0402_5%@
12
R141 0_0402_5%@1 2
R48410K_0402_5%128@
12
MEM
OR
Y IN
TER
FAC
E A
Part 2 of 6
U33B
NV72/73M_BGA820G71@
FBAD0N27FBAD1M27FBAD2N28FBAD3L29FBAD4K27FBAD5K28FBAD6J29FBAD7J28FBAD8P30FBAD9N31FBAD10N30FBAD11N32FBAD12L31FBAD13L30FBAD14J30FBAD15L32FBAD16H30FBAD17K30FBAD18H31FBAD19F30FBAD20H32FBAD21E31FBAD22D30FBAD23E30FBAD24H28FBAD25H29FBAD26E29FBAD27J27FBAD28F27FBAD29E27FBAD30E28FBAD31F28FBAD32AD29FBAD33AE29FBAD34AD28FBAD35AC28FBAD36AB29FBAD37AA30FBAD38Y28FBAD39AB30FBAD40AM30FBAD41AF30FBAD42AJ31FBAD43AJ30FBAD44AJ32FBAD45AK29FBAD46AM31FBAD47AL30FBAD48AE32FBAD49AE30FBAD50AE31FBAD51AD30FBAD52AC31FBAD53AC32FBAD54AB32FBAD55AB31FBAD56AG27FBAD57AF28FBAD58AH28FBAD59AG28FBAD60AG29FBAD61AD27FBAD62AF27FBAD63AE28
FBA_CMD0 P32FBA_CMD1 U27FBA_CMD2 P31FBA_CMD3 U30FBA_CMD4 Y31FBA_CMD5 W32FBA_CMD6 W31FBA_CMD7 T32FBA_CMD8 V27FBA_CMD9 T28
FBA_CMD10 T31FBA_CMD11 U32FBA_CMD12 W29FBA_CMD13 W30FBA_CMD14 T27FBA_CMD15 V28FBA_CMD16 V30FBA_CMD17 U31FBA_CMD18 R27FBA_CMD19 V29FBA_CMD20 T30FBA_CMD21 W28FBA_CMD22 R29FBA_CMD23 R30FBA_CMD24 P29FBA_CMD25 U28FBA_CMD26 Y32
FBADQM0 M29FBADQM1 M30FBADQM2 G30FBADQM3 F29FBADQM4 AA29FBADQM5 AK30FBADQM6 AC30FBADQM7 AG30
FBADQS_RN0 M28FBADQS_RN1 K32FBADQS_RN2 G31FBADQS_RN3 G27FBADQS_RN4 AA28FBADQS_RN5 AL31FBADQS_RN6 AF31FBADQS_RN7 AH29
FBADQS_WP0 L28FBADQS_WP1 K31FBADQS_WP2 G32FBADQS_WP3 G28FBADQS_WP4 AB28FBADQS_WP5 AL32FBADQS_WP6 AF32FBADQS_WP7 AH30
FB_VREF1 E32
FBA_CLK0 P28FBA_CLK0_N R28
FBA_CLK1 Y27FBA_CLK1_N AA27FBA_REFCLK D32
FBA_REFCLK_N D31FBA_DEBUG AC27
R5051K_0402_1%
12
R13510K_0402_5%256@
12
R1420_0402_5%256@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IFPAB_PLLVDD
PEX_PLLAVDD
VID_PLLVDD
DACA_VDD
NV
MIOA_VDDQ
IFPB_IOVDD
PEX_PLLDVDD
DACB_VDD
MIOA_VDDQ
FBC_PLLAVDD
VID_PLLVDD
IFPA_IOVDD
MIOACAL_PD_VDDQ
PLLVDD
FBC_PLLAVDD
FBA_PLLAVDD
DACA_VDD
MIOB_VDDQ
NV
PLLVDD
MIOB_VDDQ
MIOBCAL_PD_VDDQ
FBA_PLLAVDD
+VGA_FBVTT
DACB_VDD
FBA_PLLVDD
FBC_PLLVDD
FBA_PLLVDDFBC_PLLVDD
+VGA_CORE
+3VS
+1.8VS
+1.8VS
+1.2VS
+1.2VS
+1.2VS
+1.2VS
+1.8VS
+2.5VS
+3VS
+3VS
PEX_PLLAVDD
MIOA_VDDQ
MIOB_VDDQ
+2.5VS
+2.5VS
+1.8VS
+1.2VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G72/73VGA BoardCustom
20 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
1808mA
20mA180mA
120mA
40mA
70mA
40mA
(+1.1VS)
140mA
40mA
40mA
VID_PLLVDD、PLLVDD、IFPAB_PLLVDD at G71/72 is +2.5VS
IFPA_IOVDD IFPB_IOVDD、at G71/72 is +1.8VSat NV43/44 is +LCDVDD
C271
0.022U_0402_16V7K
128@
1
2
C288
0.022U_0402_16V7K
128@
1
2
C285
4.7U_0805_10V4Z
128@
1
2
C203
4700P_0402_25V7K
128@1
2
C216
0.1U_0402_16V4Z128@
1
2
Part 5 of 6
POW
ER
U33E
NV72/73M_BGA820G71@
VDD_27W14VDD_28W16VDD_29W17VDD_30W19VDD_31Y13VDD_32Y14VDD_33Y16VDD_34Y17VDD_35Y19VDD_36Y20
VDD_17T15 VDD_16T14 VDD_15T13 VDD_14R17 VDD_13R16 VDD_12P19
VDD_26W13
VDD_6N19
VDD_10P16
VDD_5N17 VDD_4N16 VDD_3N14 VDD_2N13 VDD_1K17 VDD_0K16
VDD_11P17
VDD_18T18VDD_19T19VDD_20U13VDD_21U14VDD_22U15VDD_23U19VDD_24V16VDD_25V17
VDD_9P14
PEX_IOVDD_0 AD23PEX_IOVDD_1 AF23PEX_IOVDD_2 AF24PEX_IOVDD_3 AF25PEX_IOVDD_4 AG24
VDD_7N20VDD_8P13
PEX_IOVDD_5 AG25
VDD_LP_0P20VDD_LP_1T20VDD_LP_2T23VDD_LP_3U20VDD_LP_4U23VDD_LP_5W20
VDD33_0H7VDD33_1J7VDD33_2K7VDD33_3L7VDD33_4L8VDD33_5L10VDD33_6M10VDD33_7AC11VDD33_8AC12VDD33_9AC24VDD33_10AD24VDD33_11AE11VDD33_12AE12
VID_PLLVDDT10PLLVDDT9
FBA_PLLAVDDG25FBC_PLLAVDDG10FBA_PLLVDDG23FBC_PLLVDDG8FBCAL_PD_VDDQK26
FBVTT_0H16FBVTT_1H17FBVTT_2J9FBVTT_3J10FBVTT_4J23FBVTT_5J24FBVTT_6K9FBVTT_7K11FBVTT_8K12
FBVTT_10K22FBVTT_11K24FBVTT_12L23FBVTT_13M23FBVTT_14T25FBVTT_15U25FBVTT_16AA23FBVTT_17AB23
FBVTT_9K21
PEX_IOVDDQ_0 AC16PEX_IOVDDQ_1 AC17PEX_IOVDDQ_2 AC21PEX_IOVDDQ_3 AC22PEX_IOVDDQ_4 AE18PEX_IOVDDQ_5 AE21PEX_IOVDDQ_6 AE22PEX_IOVDDQ_7 AF12PEX_IOVDDQ_8 AF18PEX_IOVDDQ_9 AF21
PEX_IOVDDQ_10 AF22
PEX_PLLAVDD AF15PEX_PLLDVDD AE15
MIOA_VDDQ_0 M7MIOA_VDDQ_1 M8MIOA_VDDQ_2 R8MIOA_VDDQ_3 T8MIOA_VDDQ_4 U9MIOB_VDDQ_0 AA8MIOB_VDDQ_1 AB7MIOB_VDDQ_2 AB8MIOB_VDDQ_3 AC6MIOB_VDDQ_4 AC7
MIOACAL_PD_VDDQ L1MIOBCAL_PD_VDDQ Y1
IFPA_IOVDD AF9IFPB_IOVDD AF8IFPC_IOVDD AD6IFPD_IOVDD AE7
IFPAB_PLLVDD AC9IFPCD_PLLVDD AA10
DACA_VDD AD10DACB_VDD V8DACC_VDD AD7
FBVDD_0 A3FBVDD_1 A6FBVDD_2 A9FBVDD_3 A12FBVDD_4 A15FBVDD_5 A18FBVDD_6 A21FBVDD_7 A24FBVDD_8 A27FBVDD_9 A30
FBVDD_10 C32FBVDD_11 F32FBVDD_12 J32FBVDD_13 M32FBVDD_14 R32FBVDD_15 V32FBVDD_16 AA32FBVDD_17 AD32FBVDD_18 AG32FBVDD_19 AK32
FBVDDQ_0 G11FBVDDQ_1 G12FBVDDQ_2 G15FBVDDQ_3 G18FBVDDQ_4 G21FBVDDQ_5 G22FBVDDQ_6 H11FBVDDQ_7 H12FBVDDQ_8 H15FBVDDQ_9 H18
FBVDDQ_10 H21FBVDDQ_11 L25FBVDDQ_12 L26FBVDDQ_13 M25FBVDDQ_14 M26FBVDDQ_15 R25FBVDDQ_16 R26FBVDDQ_17 V25FBVDDQ_18 V26FBVDDQ_19 AA25FBVDDQ_20 AA26FBVDDQ_21 AB25FBVDDQ_22 AB26FBVDDQ_23 H22
VDD_37U18
CLAMPF6
C255470P_0402_50V7K128@
1
2
L17
BLM11A121SPT_0603128@
1 2
C172
0.022U_0402_16V7K
128@
1
2+
C706
330U_V_2.5VK_R9
128@
1
2
C2764700P_0402_25V7K
128@1
2
C254
10U_0805_10V4Z128@
1
2
L19
BLM11A121SPT_0603128@
1 2
C242
10U_0805_10V4Z
128@
1
2
L18
BLM11A121SPT_0603128@
1 2
L20
BLM11A121SPT_0603@1 2
C198
0.01U_0402_16V7K
128@
1
2
C343
0.1U_0402_16V4Z128@
1
2
C241
100P_0402_50V8J
128@
1
2
C2910.022U_0402_16V7K
128@1
2
L14
BLM11A121SPT_0603128@
1 2
C289
0.1U_0402_16V4Z
128@1
2
L21
BLM11A121SPT_0603@1 2
C3420.1U_0402_16V4Z
128@1
2
C210
470P_0402_50V7K
128@
1
2
C278
4700P_0402_25V7K128@
1
2
C227
2.2U_0603_6.3V6K128@
1
2
C3220.1U_0402_16V4Z
128@1
2
C197
0.022U_0402_16V7K
128@ 1
2
C2174700P_0402_25V7K
128@1
2
C269
0.1U_0402_16V4Z
128@
1
2
C264
220P_0402_50V7K
128@
1
2
C2680.1U_0402_16V4Z128@
1
2
T22PAD
C188
4700P_0402_25V7K128@
1
2
C1840.01U_0402_16V7K
128@1
2
C190
2.2U_0603_6.3V6K128@
1
2
C186
4700P_0402_25V7K128@
1
2
C324
0.022U_0402_16V7K128@
1
2
C218
2.2U_0603_6.3V6K128@
1
2
C325
0.1U_0402_16V4Z128@
1
2
L16
BLM11A121SPT_0603128@
1 2
C2230.022U_0402_16V7K
128@1
2
+
C627
330U_V_2.5VK_R9
128@
1
2
C26010U_0805_10V4Z
128@1
2
C220
0.022U_0402_16V7K
128@
1
2
C200
470P_0402_50V7K128@
1
2
C279470P_0402_50V7K128@
1
2
C290
1U_0603_10V4Z128@
1
2
C3464700P_0402_25V7K@
1
2
C178
0.022U_0402_16V7K
128@
1
2
L8
BLM11A121SPT_0603128@
1 2
C1830.01U_0402_16V7K
128@1
2
L11
BLM11A121SPT_0603128@
1 2
C189
470P_0402_50V7K
128@1
2
C2960.022U_0402_16V7K
128@1
2
L15
BLM11A121SPT_0603128@
1 2
R9310K_0402_5%128@1 2
C243
220P_0402_50V7K
128@1
2
C208
4700P_0402_25V7K128@
1
2
C345
0.1U_0402_16V4Z128@
1
2
C340
0.1U_0402_16V4Z128@
1
2
C267
2.2U_0603_6.3V6K128@
1
2
C319
4700P_0402_25V7K
128@
1
2
C182
0.01U_0402_16V7K
128@
1
2C212
0.01U_0402_16V7K
128@
1
2
L13
BLM11A121SPT_0603128@
1 2
C2400.1U_0402_16V4Z
128@1
2
C2012.2U_0603_6.3V6K
128@1
2
C294
2.2U_0603_6.3V6K@
1
2
C253
4700P_0402_25V7K
128@
1
2
C339
4700P_0402_25V7K@
1
2
C321
220P_0402_50V7K128@
1
2
C257
100P_0402_50V8J
128@1
2
C195
0.022U_0402_16V7K
128@ 1
2
R61 10K_0402_5%128@ 1 2
L22
BLM11A121SPT_0603128@
1 2
C284
220P_0402_50V7K
128@1
2
R9110K_0402_5%128@
12
C277
10U_0805_10V4Z128@
1
2
C1770.01U_0402_16V7K
128@1
2
C247
4700P_0402_25V7K128@
1
2
C3380.022U_0402_16V7K
128@1
2
C2820.022U_0402_16V7K
128@1
2
T20PAD
C263
100P_0402_50V8J
128@
1
2
C207
4.7U_0603_6.3V6M128@1
2
C258100P_0402_50V8J
128@1
2
L9
BLM11A121SPT_0603128@
1 2
C196
2.2U_0603_6.3V6K128@
1
2
C2614700P_0402_25V7K128@
1
2
C336
4700P_0402_25V7K128@
1
2
C262
0.1U_0402_16V4Z
128@
1
2
C281
100P_0402_50V8J
128@1
2
C320
220P_0402_50V7K
128@1
2
R10240.2_0603_1%128@
1 2
C317
2.2U_0603_6.3V6K@
1
2
C185
470P_0402_50V7K128@
1
2
R1040_0402_5%@
1 2
C337 4700P_0402_25V7K@1
2
C219
0.022U_0402_16V7K
128@
1
2
C221
2.2U_0603_6.3V6K128@
1
2
L12
BLM11A121SPT_0603128@
1 2C119
2.2U_0603_6.3V6K
128@ 1
2
C332
2.2U_0603_6.3V6K128@
1
2
C3260.022U_0402_16V7K
128@1
2
C2110.1U_0402_16V4Z128@
1
2
C1212.2U_0603_6.3V6K
128@1
2
C334
4700P_0402_25V7K128@
1
2
R62 10K_0402_5%128@ 1 2
L10
BLM11A121SPT_0603
128@1 2
C2920.1U_0402_16V4Z
128@1
2
C245
220P_0402_50V7K
128@
1
2
C252
470P_0402_50V7K128@
1
2
C2094700P_0402_25V7K
128@1
2
C251
220P_0402_50V7K128@
1
2
C306
2.2U_0603_6.3V6K128@
1
2
C1994700P_0402_25V7K128@
1
2
C244
0.1U_0402_16V4Z128@
1
2
C120
2.2U_0603_6.3V6K
128@ 1
2
C213
470P_0402_50V7K128@
1
2
C287
0.1U_0402_16V4Z
128@1
2
C3354700P_0402_25V7K128@
1
2
C293
4700P_0402_25V7K
128@
1
2C256 4700P_0402_25V7K128@
1
2
R95
0_0603_5%128@
1 2
C266
0.1U_0402_16V4Z
128@
1
2
C344
4700P_0402_25V7K@
1
2
C265
0.1U_0402_16V4Z
128@1
2
C7884700P_0402_25V7K128@
1
2
T33PAD
C6674.7U_0805_10V4Z
128@1
2
C286
0.1U_0402_16V4Z
128@
1
2
C283
0.022U_0402_16V7K128@
1
2
C181
4700P_0402_25V7K
128@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G72/73VGA BoardCustom
21 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
For NV73 R116 change to 40.2_0603_1%(SD014402A80)
R103 40.2_0402_1%128@ 1 2
GN
D
Part 6 of 6
U33F
NV72/73M_BGA820G71@
GND_0B3GND_1B6GND_2B9GND_3B12GND_4B15GND_5B18GND_6B21GND_7B24GND_8B27GND_9B30GND_10C2GND_11C31GND_12D4GND_13D7GND_14D10GND_15D13GND_16D17GND_17D20GND_18D23GND_19D26GND_20D29GND_21F2GND_22F8GND_23F11GND_24F14GND_25F19GND_26F22GND_27F25GND_28F31GND_29G4GND_30G7GND_31G26GND_32G29GND_33H27GND_34H6GND_35J2GND_36J16GND_37J17GND_38J31GND_39K10GND_40K23GND_41K29GND_42K4GND_43L6GND_44L27GND_45M2GND_46M12GND_47M21GND_48M31GND_49N4GND_50N15GND_51N18GND_52N29GND_53P6GND_54P15GND_55P18GND_56P27GND_57R2GND_58R13GND_59R14GND_60R15GND_61R18GND_62R19GND_63R20GND_64R31GND_65T4GND_66T16GND_67T17GND_68T24GND_69T29GND_70U8GND_71U16GND_72U17GND_73U24GND_74U29GND_75V2GND_76V13GND_77V14GND_78V15GND_79V18GND_80V19GND_81V20GND_82V31
FBCAL_PU_GND H26FBCAL_TERM_GND J26
FBA_PLLGND G24FBC_PLLGND G9
PLLGND U10
PEX_PLLGND AE16
MIOACAL_PU_GND L3MIOBCAL_PU_GND Y3
IFPAB_PLLGND AD9IFPCD_PLLGND AB10
GND_83W6
GND_85 W18GND_86 Y4GND_87 Y15GND_88 Y18GND_89 Y29GND_90 AA2GND_91 AA12GND_92 AA21GND_93 AA31GND_94 AB6GND_95 AB27GND_96 AC4GND_97 AC10GND_98 AC23GND_99 AC29
GND_100 AD2GND_101 AD16GND_102 AD17GND_103 AD31GND_104 AE6GND_105 AE17GND_106 AE27GND_107 AF4GND_108 AF7GND_109 AF11GND_110 AF26GND_111 AF29GND_112 AG2GND_113 AG8GND_114 AG10GND_115 AG11GND_116 AG13GND_117 AG14GND_118 AG15GND_119 AG19GND_120 AG22GND_121 AG31GND_122 AH24GND_123 AJ4GND_124 AJ7GND_125 AJ10GND_126 AJ13GND_127 AJ16GND_128 AJ17GND_129 AJ20GND_130 AJ23GND_131 AJ26GND_132 AJ29GND_133 AK2GND_134 AL3GND_135 AL6GND_136 AL9GND_137 AL10GND_138 AK28GND_139 AK31GND_140 AL11GND_141 AL14GND_142 AL19GND_143 AL22GND_144 AL25GND_145 AM13GND_146 AM16GND_147 AM17GND_148 AM20GND_149 AM23GND_150 AM26GND_151 AM29GND_152 D16GND_153 W27GND_154 W15
R116 30_0603_1%128@ 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBA_CKE
ODTA0
FBAA2FBAA1FBAA0
FBAA3FBAA4FBAA5
FBAA8FBAA7
FBAA10FBAA9
FBAA11
FBA_BA1FBA_BA0
FBAA6
CLKA0
FBA_CKE
CLKA0#
FBACS0#
FBACAS#
FBAWE#
FBARAS#
ODTA0
DQMA#3DQMA#2
FBA_CKE
DQSA#0
DQSA#2 DQSA#1
FBACS0#
FBACAS#
FBAWE#
FBA_BA1FBA_BA0
CLKA0CLKA0#
ODTA0
FBAA12
FBARAS#
FBACAS#
DQSA0
FBARAS#
DQSA3
DQSA2 DQSA1
FBAWE#DQMA#1DQMA#0
FBACS0#
FBAD29
FBAD20
FBAD5
FBAD7
FBAD28
FBAD8
FBAD22
FBAD17
FBAD11
FBAD6
FBAD30
FBAD1
FBAD4
FBAD18
FBAD2
FBAD12
FBAD3
FBAD10FBAD16
FBAD24
FBAD26
FBAD19
FBAD31
FBAD25
FBAD13
FBAD21
FBAD23
FBAD27
FBAD9
FBAD14
FBAD0
FBAD15
DQSA#3
FBAA2FBAA1FBAA0
FBAA3FBAA4FBAA5
FBAA8FBAA7
FBAA10FBAA9
FBAA11
FBAA6
FBAA12
FBA_BA[1..0]
CLKA0#
CLKA0
DQSA[7..0]
DQMA#[7..0]
DQSA#[7..0]
FBAA[12..0]
FBAD[63..0]
ODTA0<19,23>
FBA_CKE<19,23>
FBARAS#<19,23>
FBACAS#<19,23>
FBAWE#<19,23>
FBACS0#<19,23>
FBA_BA[1..0]<19,23>
CLKA0<19>
CLKA0#<19>
FBAD[63..0]<19,23>
FBAA[12..0]<19,23>
DQSA#[7..0]<19,23>
DQMA#[7..0]<19,23>
DQSA[7..0]<19,23>
+1.8VS +1.8VS
+1.8VS
+1.8VS+1.8VS
+1.8VS
VRAM_VREFA VRAM_VREFA
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G72/73VGA BoardCustom
22 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
DDR2 BGA MEMORY
(SSTL-1.8) VREF = .5*VDDQ
DDR2 BGA MEMORY
(SSTL-1.8) VREF = .5*VDDQ
Close to U10
Close to U76 Close to U77
For NV73 R510 change to 481_0402_1%(SD00000CA80)
C3601000P_0402_50V7K
128@1
2
R4861K_0402_1%
128@ R515120_0402_5%@
12
C6741000P_0402_50V7K
128@1
2
C3540.01U_0402_16V7K128@
1
2
C2741U_0402_6.3V4Z128@
1
2
C3650.1U_0402_16V4Z@
1
2
C7020.01U_0402_16V7K128@
1
2
C3590.1U_0402_16V4Z128@
1
2
C6761U_0402_6.3V4Z128@
1
2
U35
HY5PS561621F-25128@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C3610.01U_0402_16V7K
128@
1
2
C3620.047U_0402_16V4Z128@
C6730.1U_0402_16V4Z
128@
1
2
C6750.1U_0402_16V4Z128@
1
2
C7030.1U_0402_16V4Z
128@
1
2
R510120_0402_5%
128@
12
C6720.047U_0402_16V4Z128@
C6920.01U_0402_16V7K
128@
1
2
R4851K_0402_1%128@
C3640.1U_0402_16V4Z
128@
1
2
U2
HY5PS561621F-25128@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C6840.01U_0402_16V7K128@
1
2
C3630.01U_0402_16V7K
128@
1
2C671
0.1U_0402_16V4Z128@
1
2C704
0.1U_0402_16V4Z128@
1
2
C7051U_0402_6.3V4Z
128@
1
2
R513120_0402_5%@
12
C3581U_0402_6.3V4Z128@
1
2
C3230.01U_0402_16V7K128@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBAWE#
ODTA0
DQSA#6
FBARAS#FBACAS#
FBACS0#
FBAWE#
FBARAS#
FBA_CKE
DQSA#4
FBACAS#
DQSA#5
DQSA#7
DQSA5
DQSA7DQSA4
DQSA6
DQMA#6DQMA#5DQMA#7DQMA#4
FBAD32FBAD59
FBAD62
FBAD44 FBAD53FBAD48
FBAD34
FBAD50
FBAD63
FBAD42
FBAD39
FBAD37
FBAD46
FBAD54
FBAD60
FBAD49
FBAD45
FBAD57
FBAD38
FBAD33
FBAD51
FBAD35
FBAD41
FBAD36
FBAD61
FBAD40
FBAD55
FBAD58
FBAD43
FBAD56
FBAD47 FBAD52
CLKA1#CLKA1
FBA_CKE
CLKA1#CLKA1
ODTA0FBACS0#
ODTA0
FBAWE#
FBARAS#
FBACAS#
FBA_CKE
FBACS0#
FBBA2FBAA1FBAA0
FBBA3FBBA4FBBA5
FBAA8FBAA7
FBAA10FBAA9
FBAA11
FBA_BA1FBA_BA0
FBAA6
FBAA12
FBBA2FBAA1FBAA0
FBBA3FBBA4FBBA5
FBAA8FBAA7
FBAA10FBAA9
FBAA11
FBA_BA1FBA_BA0
FBAA6
FBAA12
FBA_BA[1..0]
FBBA[2..5]
DQSA[7..0]
DQMA#[7..0]
DQSA#[7..0]
FBAA[12..0]
FBAD[63..0]
CLKA1
CLKA1#
FBACAS#<19,22>
FBAWE#<19,22>
FBACS0#<19,22>
FBA_CKE<19,22>
FBARAS#<19,22>
FBA_BA[1..0]<19,22>
ODTA0<19,22>
FBAD[63..0]<19,22>
FBAA[12..0]<19,22>
DQSA#[7..0]<19,22>
DQMA#[7..0]<19,22>
DQSA[7..0]<19,22>
FBBA[2..5]<19>
CLKA1<19>
CLKA1#<19>
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
VRAM_VREFB
+1.8VS
VRAM_VREFB
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G72/73VGA BoardCustom
23 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
DDR BGA MEMORY
(SSTL-1.8) VREF = .5*VDDQ
DDR2 BGA MEMORY
(SSTL-1.8) VREF = .5*VDDQ
Close to U78 Close to U79
Close to U11
For NV73 R75 change to 481_0402_1%(SD00000CA80)
C2750.01U_0402_16V7K128@
1
2
R69120_0402_5%@
12
C6311000P_0402_50V7K128@
1
2
C1531U_0402_6.3V4Z128@
1
2C635
0.01U_0402_16V7K128@
1
2
C6321U_0402_6.3V4Z128@
1
2
C6700.047U_0402_16V4Z128@
C6360.047U_0402_16V4Z128@
C1551000P_0402_50V7K128@
1
2C151
0.1U_0402_16V4Z128@
1
2C149
0.1U_0402_16V4Z128@
1
2
C2720.1U_0402_16V4Z128@
1
2
C2591U_0402_6.3V4Z128@
1
2
R70120_0402_5%@
12
C6370.01U_0402_16V7K128@
1
2
C2731U_0402_6.3V4Z128@
1
2
C6380.1U_0402_16V4Z128@
1
2
C6340.01U_0402_16V7K128@
1
2
R5741K_0402_1%128@
U32
HY5PS561621F-25128@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C1940.1U_0402_16V4Z128@
1
2
C6330.1U_0402_16V4Z128@
1
2
C1540.1U_0402_16V4Z@
1
2
U1
HY5PS561621F-25128@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C1500.01U_0402_16V7K128@
1
2
C1480.01U_0402_16V7K128@
1
2
C2240.01U_0402_16V7K128@
1
2
R5751K_0402_1%
128@
R75120_0402_5%
128@
12
C2460.1U_0402_16V4Z128@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ODTC0
FBCCS0#
FBCCAS#
FBCWE#
FBCRAS#
FBC_CKE
ODTC0
DQSC#2
FBCD19
FBCD12
FBCD2
FBCD23
DQSC#0
FBCD18
FBCD16
FBCD14
FBCD28FBCD5
FBCD31
FBCD29
FBCD8
FBCD15
FBCD4
FBCD7
FBCD21
FBCD30
FBCD22FBCD20
FBCD10FBCD13
FBCD6
FBCD25
FBCD17
FBCD1
FBCD9
FBCD3FBCD0
FBCD11
FBCD24
FBCD27
FBCD26
DQSC#1
CLKC0CLKC0#
CLKC0CLKC0#
DQMC#1 DQMC#2DQMC#3DQMC#0
DQSC#3
ODTC0
FBCCS0#
FBCCAS#
FBCWE#
FBCRAS#
FBC_CKE
DQSC1
DQSC3
DQSC2
DQSC0
FBCCS0#
FBCCAS#
FBCWE#
FBCRAS#
FBC_CKE
FBCA2FBCA1FBCA0
FBCA3FBCA4FBCA5
FBCA8FBCA7
FBCA10FBCA9
FBCA11
FBCA6
FBCA12
FBCA2FBCA1FBCA0
FBCA3FBCA4FBCA5
FBCA8FBCA7
FBCA10FBCA9
FBCA11FBCA12
FBCA6
CLKC0#
CLKC0
FBCA[12..0]
FBCD[63..0]
DQMC#[7..0]
DQSC#[7..0]
DQSC[7..0]
FBC_BA0FBC_BA0FBC_BA1FBC_BA1
FBC_BA[1..0]
ODTC0<19,25>
FBC_CKE<19,25>
FBCRAS#<19,25>
FBCCAS#<19,25>
FBCWE#<19,25>
FBCCS0#<19,25>
CLKC0#<19>
CLKC0<19>
FBCD[63..0]<19,25>
FBCA[12..0]<19,25>
DQSC#[7..0]<19,25>
DQSC[7..0]<19,25>
DQMC#[7..0]<19,25>
FBC_BA[1..0]<19,25>
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
VRAM_VREFC VRAM_VREFC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G71/72VGA BoardCustom
24 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
DDR BGA MEMORY
(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ
DDR2 BGA MEMORY
Close to U14
Close to U80Close to U81
For NV73 R533 change to 481_0402_1%(SD00000CA80)
R534120_0402_5%@
12
C3820.1U_0402_16V4Z256@
1
2
C7530.01U_0402_16V7K256@
1
2C750
0.1U_0402_16V4Z256@
1
2C3830.01U_0402_16V7K256@
1
2
C7520.1U_0402_16V4Z256@
1
2C4110.1U_0402_16V4Z256@
1
2
C4100.01U_0402_16V7K256@
1
2
C3850.1U_0402_16V4Z256@
1
2
C7280.047U_0402_16V4Z256@
C7170.01U_0402_16V7K256@
1
2
R533481_0402_1%
256@
12
R1631K_0402_1%256@
U37
HY5PS561621F-25256@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C3950.1U_0402_16V4Z256@
1
2
C3981000P_0402_50V7K256@
1
2C735
1000P_0402_50V7K256@
1
2
C7330.1U_0402_16V4Z@
1
2C3880.047U_0402_16V4Z256@
C4131U_0402_6.3V4Z256@
1
2
R1621K_0402_1%256@
C3841U_0402_6.3V4Z256@
1
2
C7261U_0402_6.3V4Z256@
1
2
C7250.1U_0402_16V4Z256@
1
2
C7180.01U_0402_16V7K256@
1
2
C7160.01U_0402_16V7K256@
1
2
U7
HY5PS561621F-25256@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C4120.01U_0402_16V7K256@
1
2
R531120_0402_5%@
12
C7511U_0402_6.3V4Z256@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBDA2FBCA1FBCA0
FBDA3FBDA4FBDA5
FBCA8FBCA7
FBCA10FBCA9
FBCA11FBCA12
FBCA6
FBDA2FBCA1FBCA0
FBDA3FBDA4FBDA5
FBCA8FBCA7
FBCA10FBCA9
FBCA11FBCA12
FBCA6
CLKC1CLKC1#
DQSC#6DQSC#4
DQSC#7DQSC#5
ODTC0
FBCCAS#
FBCCS0#
FBCWE#
FBCRAS#
FBC_CKE
FBCD42
FBCD47
FBCD54
FBCD56
FBCD32FBCD37
FBCD51
FBCD45
FBCD61
FBCD53
FBCD63
FBCD41 FBCD60
FBCD40
FBCD38
FBCD49FBCD52FBCD39
FBCD34
FBCD55
FBCD58FBCD46
FBCD59
FBCD48
FBCD57
FBCD62
FBCD36
FBCD44
FBCD43
FBCD33
FBCD35
FBCD50
ODTC0
FBCCAS#
FBCCS0#
FBCWE#
FBCRAS#
FBC_CKE
DQMC#7DQMC#5DQMC#6DQMC#4
DQSC4
DQSC7DQSC5
DQSC6
FBCCAS#
FBCCS0#
FBCWE#
FBCRAS#
FBC_CKE
ODTC0
CLKC1CLKC1#
FBCA[12..0]
DQSC#[7..0]
DQMC#[7..0]
FBCD[63..0]
DQSC[7..0]
FBDA[2..5]
FBC_BA0FBC_BA0FBC_BA1FBC_BA1
FBC_BA[1..0]
CLKC1
CLKC1#
FBCCAS#<19,24>
FBCWE#<19,24>
FBCCS0#<19,24>
ODTC0<19,24>
FBC_CKE<19,24>
FBCRAS#<19,24>
FBC_BA[1..0]<19,24>
FBDA[2..5]<19>
FBCD[63..0]<19,24>
FBCA[12..0]<19,24>
DQSC#[7..0]<19,24>
DQSC[7..0]<19,24>
DQMC#[7..0]<19,24>
CLKC1#<19>
CLKC1<19>
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
VRAM_VREFD
+1.8VS
VRAM_VREFD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G71/72VGA BoardCustom
25 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Close to U82 Close to U83
DDR2 BGA MEMORY
(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ
DDR2 BGA MEMORY
Close to U15
For NV73 R168 change to 481_0402_1%(SD00000CA80)
R5761K_0402_1%256@
R169120_0402_5%@
12
R167120_0402_5%@
12
C3740.1U_0402_16V4Z256@
1
2
R168481_0402_1%
256@
12
C4020.1U_0402_16V4Z256@
1
2
C7130.01U_0402_16V7K256@
1
2
C4090.01U_0402_16V7K256@
1
2
C7491U_0402_6.3V4Z256@
1
2
C3781U_0402_6.3V4Z256@
1
2
C7480.01U_0402_16V7K256@
1
2
U8
HY5PS561621F-25256@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2C7240.047U_0402_16V4Z256@
C7220.1U_0402_16V4Z256@
1
2
U36
HY5PS561621F-25256@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2C3920.047U_0402_16V4Z256@
R5771K_0402_1%
256@
C4061000P_0402_50V7K256@
1
2
C4040.01U_0402_16V7K256@
1
2
C7451000P_0402_50V7K256@
1
2C407
0.01U_0402_16V7K256@
1
2
C3860.1U_0402_16V4Z256@
1
2
C7460.1U_0402_16V4Z256@
1
2
C7191U_0402_6.3V4Z256@
1
2
C3901U_0402_6.3V4Z256@
1
2
C7470.1U_0402_16V4Z256@
1
2C744
0.01U_0402_16V7K256@
1
2
C4050.01U_0402_16V7K256@
1
2
C4030.1U_0402_16V4Z256@
1
2
C7100.1U_0402_16V4Z@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRYSTAL_0
CRYSTAL_1
PCI_DEVID1PCI_DEVID2
PCI_DEVID0
PCI_DEVID3PEX_CFG0
RAM_CFG1RAM_CFG2
RAM_CFG0
PEX_PLL_TERM
SUB_VENDORMOBILE_MODE
PEX_CFG2PEX_CFG1
RAM_CFG3
CRYSTAL_0<18>
CRYSTAL_1<18>
OSC_SPREAD <18>OSC_OUT<18>
RAM_CFG0<18>RAM_CFG1<18>RAM_CFG2<18>RAM_CFG3<18>PCI_DEVID0<18>PCI_DEVID1<18>PCI_DEVID2<18>PCI_DEVID3<18>PEX_CFG0<18>PEX_CFG1<18>PEX_CFG2<18>
PEX_PLL_TERM<18>
SUB_VENDOR<18>MOBILE_MODE<18>
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
G71/72 VGA BoardCustom
26 60Thursday, December 15, 2005
2005/03/01 2006/03/01Compal Electronics, Inc.
EMI request 6/7
Spread spectrum
A01
VBIOS on card (pull high)0VBIOS with system BIOS (pull down)
0011
ROM_TYPE[1:0]
RAM_CFG[3:0]
MIOA_HSYNC
NV72M
PEX_PLL_TERM MIOAD0
CRYSTAL[1:0] 10
01
ValueSTRAPS PIN DESCRIPTION
MIOBD[6,2]
PEX_CFG[2:0]MIOAD[9,8,6]
27MHz=10, 14.318MHz=01, 13.5MHz=00
16Mx16 (1.8V or 2.5V)Hynix X 4pcs
VIPD[5:3]
MIOBD[11:10]
Parallel=00, SERIAL M25P10=01,Serial SST45VF=10
SUB_VENDOR
1000
001
0
MIOAD1
Overridden
16Mx16 (1.8V or 2.5V)Infineon X 4pcs 0010
16Mx16 (1.8V or 2.5V)Samsung X 4pcs 0001
PCI_DEVID[3:0]
16Mx16 (1.8V or 2.5V)Samsung X 8pcs
16Mx16 (1.8V or 2.5V)Infineon X 8pcs
16Mx16 (1.8V or 2.5V)Hynix X 8pcs
1010
1001
1011
NV73M 1000
R63
2K_0402_5%128@
12
U3
ASM3P1819N-SR_SO8128@
XOUT8
REF 5
MODOUT 4XIN1
VDD7
NC 3
PD# 6VSS2
R475
2K_0402_5%@ 1
2
R134 10K_0402_5%@12
R1182K_0402_5%@
12
R83
2K_0402_5%@ 1
2
R66
2K_0402_5%@
12
R73
2K_0402_5%128@
12
R111
2K_0402_5%@
12
C3760.1U_0402_16V4Z
128@
1
2
R470
2K_0402_5%@ 1
2R602K_0402_5%@
12
R4742K_0402_5%@
12
R112
2K_0402_5%@
12
R148 10K_0402_5%@12
R108
2K_0402_5%128@
12
R4932K_0402_5%@
12
R468 2K_0402_5%@1 2
R494
2K_0402_5%128@
12
R117
2K_0402_5%@ 1
2
R473
2K_0402_5%@
12
R59
2K_0402_5%128@ 1
2
R4972K_0402_5%@
12
R107
2K_0402_5%@ 1
2
R4692K_0402_5%@
12
R642K_0402_5%@
12
R133 22_0402_5%128@1 2
R78 2K_0402_5%@1 2
R498
2K_0402_5%128@
12
R477
2K_0402_5%@
12
R72
2K_0402_5%@
12
R4762K_0402_5%@
12
R842K_0402_5%@
12
R472
2K_0402_5%128@
12
R67
2K_0402_5%128@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_ICH
PCI_SERR#
PCI_DEVSEL#PCI_PCIRST#
PCI_CBE#0
PCI_PERR#
PCI_PIRQG#PCI_PIRQB#
PCI_STOP#
PCI_CBE#1
PCI_CBE#3
PCI_PIRQF#PCI_PIRQC#
PCI_REQ2#
PCI_PIRQE#
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_CBE#2
PCI_REQ1#
PCI_REQ0#
PCI_PIRQD#
PCI_PIRQA#
PCI_PAR
PCI_TRDY#
PCI_PIRQH#
PCI_RST#
PCI_PLTRST#CLK_PCI_ICHPCI_PME#
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5
PCI_AD7PCI_AD6
PCI_AD8PCI_AD9
PCI_AD11PCI_AD10
PCI_AD14PCI_AD15
PCI_AD13PCI_AD12
PCI_AD16PCI_AD17
PCI_AD19PCI_AD18
PCI_AD22PCI_AD23
PCI_AD21PCI_AD20
PCI_AD25PCI_AD24
PCI_AD28PCI_AD29
PCI_AD31PCI_AD30
PCI_AD26PCI_AD27
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#
PCI_IRDY#
PCI_PLOCK#
PCI_SERR#
PCI_PERR#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQH#
PCI_PIRQG#
PCI_PIRQF#
PCI_PIRQE#
PCI_REQ0#
PCI_REQ2#
PLT_RST#
PCI_REQ1#
PCI_GNT2#
PCI_REQ4#
PCI_REQ3#
PCI_PCIRST#
PCI_PLTRST#
PCI_REQ3#
PCI_REQ5#
PCI_REQ4#
PCI_REQ5#
PCI_AD[0..31]<32,36>
PCI_CBE#0 <32,36>PCI_CBE#1 <32,36>PCI_CBE#2 <32,36>PCI_CBE#3 <32,36>
PCI_IRDY# <32>PCI_PAR <32>
PCI_DEVSEL# <32>PCI_PERR# <32>
PCI_STOP# <32>PCI_TRDY# <32,36>PCI_FRAME# <32,36>
CLK_PCI_ICH <15>
PCI_SERR# <32>
PCI_PME# <32,44>
PCI_RST# <32,33,36,42,44>
PLT_RST# <7,31,32,34,37>
PCI_GNT2# <32>PCI_REQ2# <32>
PCI_PIRQE# <32>
MCH_ICH_SYNC# <7>
PCI_PIRQG# <32>PCI_PIRQC#<32>PCI_PIRQD#<32>
VGA_RST# <18>
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
ICH7-M(1/4)
27 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Place closely pin A9
R527 8.2K_0402_5%
1 2
R198 8.2K_0402_5%
1 2
R528 8.2K_0402_5%
1 2
R179 8.2K_0402_5%
1 2
U10
TC7SH08FU_SSOP5@
B1
A2 Y 4
P5
G3
R213 8.2K_0402_5%
1 2
R176
10_0402_5% @
12
R192 8.2K_0402_5%
1 2
R212 8.2K_0402_5%
1 2
R529 8.2K_0402_5%
1 2
R1850_0402_5%
12R524 8.2K_0402_5%
1 2
R178 8.2K_0402_5%
1 2
R210 8.2K_0402_5%
1 2
R540 8.2K_0402_5%
1 2
R193 8.2K_0402_5%
1 2
R526 8.2K_0402_5%
1 2
Interrupt I/F
PCI
MISC
U6B
ICH7_BGA652~D
FRAME# F16
GPIO17 / GNT5# D8
TRDY# F14STOP# F15
GPIO2 / PIRQE# G8GPIO3 / PIRQF# F7GPIO4 / PIRQG# F8GPIO5 / PIRQH# G7
C/BE0# B15C/BE1# C12C/BE2# D12C/BE3# C15
IRDY# A7PAR E10
PCIRST# B18DEVSEL# A12
PERR# C9PLOCK# E11
SERR# B10
PIRQC#C5
RSVD[4]AH4
PIRQA#A3
RSVD[5]AD9
RSVD[2]AD5RSVD[3]AG4
PIRQB#B4
PIRQD#B5
RSVD[1]AE5
REQ0# D7GNT0# E7REQ1# C16GNT1# D16REQ2# C17GNT2# D17REQ3# E13GNT3# F13
REQ4# / GPIO22 A13GNT4# / GPIO48 A14GPIO1 / REQ5# C8
AD0E18AD1C18AD2A16AD3F18AD4E16AD5A18AD6E17AD7A17AD8A15AD9C14AD10E14AD11D14AD12B12AD13C13AD14G15AD15G13AD16E12AD17C11AD18D11AD19A11AD20A10AD21F11AD22F10AD23E9AD24D9AD25B9AD26A8AD27A6AD28C7AD29B6AD30E6AD31D6
RSVD[6] AE9RSVD[7] AG8RSVD[8] AH8RSVD[9] F21
MCH_SYNC# AH20
PLTRST# C26PCICLK A9
PME# B19
R538 8.2K_0402_5%
1 2
R195 8.2K_0402_5%
1 2
R197 8.2K_0402_5%
1 2
R203
0_0402_5%
12
R194 8.2K_0402_5%
1 2
R211 8.2K_0402_5%
1 2
R196 8.2K_0402_5%
1 2
C415
8.2P_0402_50V@
1
2
R530 8.2K_0402_5%
1 2
U11
TC7SH08FU_SSOP5@
B1
A2 Y 4
P5
G3
R525 8.2K_0402_5%
1 2
R1860_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_INTVRMEN
ICH_INTVRMEN
CLK_PCIE_SATA#CLK_PCIE_SATA
ICH_RTCRST#
PD_CS#1
PD_A1
PD_D14
PD_A2
PD_D15
PD_D13
PD_D10
PD_D12PD_D11
PD_D9
PD_D6
PD_D8PD_D7
PD_D4PD_D5
PD_DREQPD_IOR#PD_IOW#
PD_D3
PD_DACK#
PD_IORDY
PD_D2
PD_D0PD_D1
H_A20M#
H_INIT#
H_IGNNE#
H_INTR
H_SMI#H_NMI
H_STPCLK#
LPC_AD0
LPC_FRAME#
LPC_AD3
H_DPSLP#
LPC_AD2LPC_AD1
H_PWRGOOD
THRMTRIP_ICH#
SM_INTRUDER#
PD_CS#3
PD_A0
SM_INTRUDER#
DPRSLP#
ICH_RTCX1
IDE_LED#
ACZ_SDOUT
ACZRST#
ACZ_SDIN0
ACZ_SYNC
H_CPUSLP_R#
PD_IRQ
LPC_DRQ0#
PD_D[0..15]
PD_IORDYPD_IRQ
LAN_RXD0LAN_RXD1LAN_RXD2
LAN_TXD0LAN_TXD1LAN_TXD2
LAN_RSTSYNC
LAN_JCLK
PSATA_ITX_DRX_P0_CPSATA_ITX_DRX_N0_CPSATA_IRX_DTX_P0_CPSATA_IRX_DTX_N0_C
SSATA_ITX_DRX_P0_CSSATA_ITX_DRX_N0_CSSATA_IRX_DTX_P0_CSSATA_IRX_DTX_N0_C
PSATA_ITX_DRX_P0_C
PSATA_ITX_DRX_N0_C
SSATA_ITX_DRX_P0_C
SSATA_ITX_DRX_N0_C
PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0
SSATA_ITX_DRX_P0
SSATA_ITX_DRX_N0
ACZ_BITCLK
H_FERR#
GATEA20
KB_RST#
ICH_RTCX2
EEP_CSEEP_SKEEP_DOUTEEP_DIN
EC_RTCRESET
ACZ_RST#<38,44>
ACZ_SDIN0<38>
ACZ_SYNC<38>
ACZ_SDOUT<38>
LPC_AD[0..3] <42,44>
H_A20M# <4>
H_DPSLP# <4>
H_FERR# <4>
H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT# <4>H_INTR <4>
H_SMI# <4>H_NMI <4>
H_STPCLK# <4>
GATEA20 <44>
KB_RST# <44>ACZ_BITCLK<38>
H_THERMTRIP# <4,7>
LPC_DRQ#0 <42>
LPC_FRAME# <42,44>
IDE_LED#<43>
PD_D[0..15] <31>
PD_A0 <31>PD_A1 <31>PD_A2 <31>
PD_DACK#<31>PD_IOW#<31>PD_IOR#<31>
PD_IORDY<31>PD_IRQ<31>
PD_DREQ <31>
PD_CS#1 <31>PD_CS#3 <31>
H_DPRSTP# <4,53>
LAN_RXD0<35>LAN_RXD1<35>LAN_RXD2<35>
LAN_TXD0<35>LAN_TXD1<35>LAN_TXD2<35>
LAN_RSTSYNC<35>
LAN_JCLK<35>
PSATA_ITX_DRX_N0<31>
PSATA_ITX_DRX_P0<31>
SSATA_ITX_DRX_N0<31>
SSATA_ITX_DRX_P0<31>
PSATA_IRX_DTX_N0_C<31>PSATA_IRX_DTX_P0_C<31>
SSATA_IRX_DTX_P0_C<31>SSATA_IRX_DTX_N0_C<31>
CLK_PCIE_SATA#<15>CLK_PCIE_SATA<15>
EC_RTCRESET<44>
+RTCVCC
+RTCVCC
+VCCP
+RTCVCC
+3VS
+3VS
+3VS
+VCCP
+RTCVCC
+3VALW
BATT1.1
LDO3
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
ICH7-M(2/4)Custom
28 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
close ICH7
+ -W=20mils
C37018P_0402_50V8J
12
BATT1
CR2032 RTC BATTERY
R122 10K_0402_5% 12
R119
56_0402_5%
12
R51720K_0402_5%
1 2
R1264.7K_0402_5% 12
R15010_0402_5%@
1 2
C348 3900P_0402_50V7K 1 2
R15533_0402_5%
1 2
T23PAD
R1258.2K_0402_5% 12
C6791U_0603_10V4Z
1
2
D26
DAN202U_SC70
2
31
G
DS
Q522N7002_SOT23@
2
13
R12024.9_0402_1% 1 2
C372
0.1U_0402_16V4Z
1
2
C353 3900P_0402_50V7K 1 2
R488
1K_0402_5%
1 2
R519
332K_0402_1%
12
R608
47K_0402_5%@1 2
C7071U_0603_10V4Z 1 2
JP23
SUYIN_060003FA002TX00NL~D
+1 - 2
R14
410
M_0
402_
5%
12
C381 10P_0402_25V8K@12
CLRP1
SHORT PADS
1 2
C828
0.1U_0402_16V4Z@ 12
U4
AT93C46-10SI-2.7_SO8
CS 1SK 2DI 3
DO 4
VCC8NC7NC6GND5
R121 0_0402_5% 12
C341 3900P_0402_50V7K 1 2
R127
24.9_0402_1%
1 2
RTC
LAN
SATA
AC-97/AZALIA
LPC
CPU
IDE
U6A
ICH7_BGA652~D
RTXC1AB1RTCX2AB2
RTCRST#AA3
INTVRMENW4INTRUDER#Y5
EE_CSW1EE_SHCLKY1EE_DOUTY2EE_DINW3
LAN_CLKV3
LAN_RSTSYNCU3
LAN_RXD0U5LAN_RXD1V4LAN_RXD2T5
LAN_TXD0U7LAN_TXD1V6LAN_TXD2V7
ACZ_BCLKU1ACZ_SYNCR6
ACZ_RST#R5
ACZ_SDIN0T2ACZ_SDIN1T3ACZ_SDIN2T1
ACZ_SDOUTT4
SATALED#AF18
SATA0RXNAF3SATA0RXPAE3SATA0TXNAG2SATA0TXPAH2
SATA2RXNAF7SATA2RXPAE7SATA2TXNAG6SATA2TXPAH6
SATA_CLKNAF1SATA_CLKPAE1
SATARBIASNAH10SATARBIASPAG10
IORDYAG16IDEIRQAH16DDACK#AF16DIOW#AH15DIOR#AF15
LAD0 AA6LAD1 AB5LAD2 AC4LAD3 Y6
LDRQ0# AC3LDRQ1# / GPIO23 AA5
LFRAME# AB3
A20GATE AE22A20M# AH28
CPUSLP# AG27
TP1 / DPRSTP# AF24TP2 / DPSLP# AH25
FERR# AG26
GPIO49 / CPUPWRGD AG24
IGNNE# AG22INIT3_3V# AG21
INIT# AF22INTR AF25
RCIN# AG23
SMI# AF23NMI AH24
STPCLK# AH22
THERMTRIP# AF26
DA0 AH17DA1 AE17DA2 AF17
DCS1# AE16DCS3# AD16
DD0 AB15DD1 AE14DD2 AG13DD3 AF13DD4 AD14DD5 AC13DD6 AD12DD7 AC12DD8 AE12DD9 AF12
DD10 AB13DD11 AC14DD12 AF14DD13 AH13DD14 AH14DD15 AC15
DDREQ AE15
R508 10K_0402_5% 12
C351 3900P_0402_50V7K 1 2
Y1
32.768KHZ_12.5P_1TJS125BJ4A421P
OUT 4
IN 1
NC3
NC2
C35618P_0402_50V8J
12
R516
1M_0402_5%
12
R11456_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LINKALERT#
OCP#
SIRQ
PCI_CLKRUN#
EC_THERM#
CLK_48M_ICH
PM_BMBUSY#
CLK_14M_ICH
H_STP_CPU#
VGATE
SLP_S3#ITP_DBRESET#
CLK_48M_ICH
CLK_14M_ICHICH_RI#
SIRQ
SLP_S5#OCP#
PCI_CLKRUN#
ICH_SMBCLK
SB_SPKR
LINKALERT#
H_STP_PCI#
ICH_SMLINK0ICH_SMLINK1
DPRSLPVR
PWRBTN_OUT#
ICH_POK
ICH_SUSCLK
DPRSLPVR
DMI_TXN3
DMI_TXN0
USBRBIAS
DMI_TXP1
USB_OC#2
USB_OC#4
DMI_TXP2
USB_OC#6
USB_OC#3
DMI_TXN1
DMI_RXN1
USB_OC#1
DMI_TXP3
DMI_RXP1
USB_OC#7
DMI_RXN3
CLK_PCIE_ICH
DMI_RXN2
DMI_RXN0
DMI_TXP0
DMI_RXP3
CLK_PCIE_ICH#
DMI_TXN2
DMI_RXP0
USB_OC#6
DMI_RXP2
USB20_N7USB20_P7
USB20_N6USB20_P6
USB20_N0USB20_P0USB20_N1USB20_P1
USB20_N3USB20_P3USB20_N4USB20_P4USB20_N5USB20_P5
DMI_IRCOMP
PCIE_C_TXP1
PCIE_RXN1PCIE_RXP1PCIE_C_TXN1
PCIE_RXP3
PCIE_C_TXP3
PCIE_RXN3
PCIE_C_TXN3
ICH_PCIE_WAKE#
EC_RSMRST#
PCIE_C_TXP2PCIE_C_TXN2PCIE_RXP2PCIE_RXN2
USB_OC#0
EC_SCI#
USB_OC#5
CPUSB#
LID_OUT#
WL_ONBT_ON#
SPI_CS#
SPI_MISO
ICH_SMBDATA
USB_OC#4
USB_OC#1USB_OC#2
SPI_MISO
SPI_CS#
BT_DET#
BT_DET#
ICH_PCIE_WAKE#
ICH_LOW_BAT#
ICH_LOW_BAT#
EC_SMI#
LAN_RST#
ITP_DBRESET#
WL_ON
SUS_STAT#
USB_OC#7
SPI_MOSI
SPI_MOSI
SLP_S4#
PCBEEP
PCBEEP
EC_FLASH#
H_STP_PCI#<15>H_STP_CPU#<15>
SB_SPKR<38>
PM_BMBUSY#<7>
SIRQ<32,42,44>EC_THERM#<44>
VGATE<44,53>
SLP_S3# <44>
SLP_S5# <44>
DPRSLPVR <7,53>
DMI_RXN0 <7>DMI_RXP0 <7>DMI_TXN0 <7>DMI_TXP0 <7>
DMI_RXN1 <7>DMI_RXP1 <7>DMI_TXN1 <7>DMI_TXP1 <7>
DMI_RXN2 <7>DMI_RXP2 <7>DMI_TXN2 <7>DMI_TXP2 <7>
DMI_RXN3 <7>DMI_RXP3 <7>DMI_TXN3 <7>DMI_TXP3 <7>
CLK_PCIE_ICH# <15>CLK_PCIE_ICH <15>
EC_RSMRST# <44>
PWRBTN_OUT# <44>
ICH_POK <7,44>
CLK_48M_ICH <15>CLK_14M_ICH <15>
USB20_P7 <34>USB20_N7 <34>
USB20_N6 <41>USB20_P6 <41>
USB20_N1 <46>USB20_P1 <46>
USB20_N3 <41>USB20_P3 <41>USB20_N4 <42>USB20_P4 <42>USB20_N5 <42>USB20_P5 <42>
USB20_N0 <41>USB20_P0 <41>
USB_OC#3<41>
ITP_DBRESET#<4>
OCP#<4>
PCIE_RXN1<34>
PCIE_TXN1<34>PCIE_TXP1<34>
PCIE_RXP1<34>
PCIE_RXN3<37>
PCIE_TXN3<37>PCIE_TXP3<37>
PCIE_RXP3<37>
PCIE_TXN2<34>PCIE_RXP2<34>PCIE_RXN2<34>
PCIE_TXP2<34>
USB_OC#4<42>
USB_OC#0<41>
EC_SCI# <44>
CPUSB# <34,44>
LID_OUT# <44>
WL_ON <37>BT_ON# <41>
ICH_SMBDATA<15,34,37>ICH_SMBCLK<15,34,37>
USB_OC#5<42>
BT_DET# <41>
PCI_CLKRUN#<32>
ICH_PCIE_WAKE#<34,37>
LAN_RST# <44>
EC_SMI#<44>
SLP_S4# <44>
PCBEEP <40>
EC_FLASH#<45>
+3VALW
+3VALW
+3VS
+3VALW+3VALW
+1.5VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
ICH7-M(3/4)Custom
29 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Place closely pin B2 Place closely pin AC1
Within 500 mils
Within 500 mils
Need update symbol
RP20
10K_1206_8P4R_5%
1 82 73 64 5
R207
10K_0402_5%
12
R12310K_0402_5% 1 2
R15910K_0402_5% 1 2
C740
4.7P_0402_50V8C@
1
2
C3870.1U_0402_16V4Z 12
C3930.1U_0402_16V4Z 12
R57810K_0402_5% 1 2
SATA
POWER MGT
SYS
SMB
GPIO
Clocks
GPIO
GPIO
U6C
ICH7_BGA652~D
RI#A28
SPKRA19
SYS_RST#A22 SUS_STAT#A27
GPIO0 / BM_BUSY#AB18
GPIO26A21
GPIO27B21GPIO28E23
GPIO32 / CLKRUN#AG18
GPIO33 / AZ_DOCK_EN#AC19GPIO34 / AZ_DOCK_RST#U2
VRMPWRGDAD22
GPIO11 / SMBALERT#B23
SUSCLK C20
SLP_S3# B24SLP_S4# D23SLP_S5# F22
PWROK AA4
GPIO16 / DPRSLPVR AC22
TP0 / BATLOW# C21
PWRBTN# C23
LAN_RST# C19
RSMRST# Y4
GPIO21 / SATA0GP AF19GPIO19 / SATA1GP AH18GPIO36 / SATA2GP AH19GPIO37 / SATA3GP AE19
CLK14 AC1CLK48 B2
GPIO9 E20GPIO10 A20GPIO12 F19GPIO13 E19GPIO14 R4GPIO15 E22GPIO24 R3GPIO25 D20
GPIO35 / SATAREQ# AD21GPIO38 AD20GPIO39 AE20
SMBCLKC22SMBDATAB22LINKALERT#A26SMLINK0B25SMLINK1A25
GPIO18 / STPPCI#AC20GPIO20 / STPCPU#AF21
WAKE#F20SERIRQAH21THRM#AF20
GPIO6AC21GPIO7AC18GPIO8E21
C3910.1U_0402_16V4Z 12
R222
2.2K_0402_5%
1
2
T28 PAD
C3990.1U_0402_16V4Z 12
R507100_0402_5%
1 2
R514 10K_0402_5% 1 2
R165 22.6_0402_1% 1 2
R2098.2K_0402_5%
12
R166 24.9_0402_1%
1 2
R136
10_0402_5%@
12
R1821K_0402_5%
1 2
R1248.2K_0402_5%
1 2
R59010K_0402_5% 1 2
R208
10K_0402_5%
12
R17310K_0402_5% 1 2
R15310K_0402_5% 1 2
C3890.1U_0402_16V4Z 12
R221150_0402_5% 1 2
R539
10_0402_5%@
12
R22310K_0402_5% 1 2
T25PAD
C3960.1U_0402_16V4Z 12
R21910K_0402_5% 1 2
R51110K_0402_5%
1 2
R17510K_0402_5%
1 2
R220
2.2K_0402_5%
12
R509100K_0402_5%@
12
PCI-EXPRESS
DIRECT MEDIA INTERFACE
USB
SPI
U6D
ICH7_BGA652~D
SPI_CLKR2SPI_CS#P6SPI_ARBP1
SPI_MOSIP5SPI_MISOP2
DMI0RXN V26DMI0RXP V25DMI0TXN U28DMI0TXP U27
DMI1RXN Y26DMI1RXP Y25DMI1TXN W28DMI1TXP W27
DMI2RXN AB26DMI2RXP AB25DMI2TXN AA28DMI2TXP AA27
DMI3RXN AD25DMI3RXP AD24DMI3TXN AC28DMI3TXP AC27
DMI_CLKN AE28DMI_CLKP AE27
DMI_ZCOMP C25DMI_IRCOMP D25
PERn1F26PERp1F25PETn1E28PETp1E27
PERn2H26PERp2H25PETn2G28PETp2G27
PERn3K26PERp3K25PETn3J28PETp3J27
PERn4M26PERp4M25PETn4L28PETp4L27
PERn5P26PERp5P25PETn5N28PETp5N27
PERn6T25PERp6T24PETn6R28PETp6R27
OC0#D3OC1#C4OC2#D5OC3#D4OC4#E5OC5# / GPIO29C3OC6# / GPIO30A2OC7# / GPIO31B3
USBP0N F1USBP0P F2USBP1N G4USBP1P G3USBP2N H1USBP2P H2USBP3N J4USBP3P J3USBP4N K1USBP4P K2USBP5N L4USBP5P L5USBP6N M1USBP6P M2USBP7N N4USBP7P N3
USBRBIAS# D2USBRBIAS D1
R172
8.2K_0402_5%
1 2
R15610K_0402_5% 1 2
C350
4.7P_0402_50V8C@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_K7
ICH_V5REF_SUS
ICH_AA2
ICH_V5REF_RUN
ICH_V5REF_RUN
ICH_G20ICH_C28
ICH_Y7
ICH_V5REF_SUS
+1.5VS_DMIPLL
+1.5VS
+RTCVCC
+3VALW
+1.5VS
+1.5VS
+3VS+5VS
+3VALW+5VALW
+1.5VS
+3VS
+3VS
+3VALW
+1.5VS
+1.5VS
+1.5VS_DMIPLLR
+3VS
+1.5VS
+3VS
+VCCP
+3VALW
+1.5VS
+3VS
+VCCP
+3VALW
+3VALW
+1.5VS_DMIPLL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
ICH7-M(4/4)Custom
30 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Place closely pinD28,T28,AD28.
Place closely pin AG28 within 100mlis.
Place closely pin AG5.
Place closely pin AG9.
D18
CH751H-40_SC76
21
C715
0.1U_0402_16V4Z
1
2
C375
0.1U_0402_16V4Z
1
2
R129
0_0805_5%
1 2
C739
0.1U_0402_16V4Z
1
2
T31 PAD
C729
0.1U_0402_16V4Z
1
2C701
0.1U_0402_16V4Z
1
2
R164
10_0402_5%
12
+
C69
3
220U
_D2_
4VM
1
2
C73
00.
1U_0
402_
16V4
Z
1
2
C700
0.1U_0402_16V4Z
1
2
C732
0.1U_0402_16V4Z
1
2
C699 0.1U_0402_16V4Z
1 2
C734
0.1U_0402_16V4Z
1
2
C743
0.1U_0402_16V4Z
1
2
C727
0.1U_0402_16V4Z
1
2
C6940.1U_0402_16V4Z
1 2
C69
8
0.1U
_040
2_16
V4Z
1
2
C695
0.1U_0402_16V4Z
1 2
T26PAD
C34
910
U_0
805_
10V4
Z
1
2
C696
1U_0603_10V4Z
1
2
C720
0.1U_0402_16V4Z
1
2
C697
0.1U_0402_16V4Z
1
2
D8
CH751H-40_SC76
21
C711
0.1U_0402_16V4Z
1
2
T30 PAD
C68
80.
1U_0
402_
16V4
Z
1
2
C714
0.1U_0402_16V4Z
1
2
C738
0.1U_0402_16V4Z
1
2
T29PAD
U6F
ICH7_BGA652~D
V5REF[1]G10
V5REF[2]AD17
V5REF_SusF6
Vcc1_5_B[1]AA22Vcc1_5_B[2]AA23Vcc1_5_B[3]AB22Vcc1_5_B[4]AB23Vcc1_5_B[5]AC23Vcc1_5_B[6]AC24Vcc1_5_B[7]AC25Vcc1_5_B[8]AC26Vcc1_5_B[9]AD26Vcc1_5_B[10]AD27Vcc1_5_B[11]AD28Vcc1_5_B[12]D26Vcc1_5_B[13]D27Vcc1_5_B[14]D28Vcc1_5_B[15]E24Vcc1_5_B[16]E25Vcc1_5_B[17]E26Vcc1_5_B[18]F23Vcc1_5_B[19]F24Vcc1_5_B[20]G22Vcc1_5_B[21]G23Vcc1_5_B[22]H22Vcc1_5_B[23]H23Vcc1_5_B[24]J22Vcc1_5_B[25]J23Vcc1_5_B[26]K22Vcc1_5_B[27]K23Vcc1_5_B[28]L22Vcc1_5_B[29]L23Vcc1_5_B[30]M22Vcc1_5_B[31]M23Vcc1_5_B[32]N22Vcc1_5_B[33]N23Vcc1_5_B[34]P22Vcc1_5_B[35]P23Vcc1_5_B[36]R22Vcc1_5_B[37]R23Vcc1_5_B[38]R24Vcc1_5_B[39]R25
Vcc1_5_B[41]T22Vcc1_5_B[42]T23Vcc1_5_B[43]T26Vcc1_5_B[44]T27Vcc1_5_B[45]T28Vcc1_5_B[46]U22Vcc1_5_B[47]U23Vcc1_5_B[48]V22Vcc1_5_B[49]V23Vcc1_5_B[50]W22
Vcc1_5_B[52]Y22Vcc1_5_B[53]Y23
Vcc1_5_B[51]W23
Vcc1_5_B[40]R26
Vcc3_3[1]B27
VccDMIPLLAG28
VccSATAPLLAD2
Vcc3_3[2]AH11
Vcc1_05[1] L11Vcc1_05[2] L12Vcc1_05[3] L14Vcc1_05[4] L16
Vcc1_05[6] L18Vcc1_05[5] L17
Vcc1_05[7] M11Vcc1_05[8] M18Vcc1_05[9] P11
Vcc1_05[10] P18Vcc1_05[11] T11Vcc1_05[12] T18Vcc1_05[13] U11Vcc1_05[14] U18Vcc1_05[15] V11Vcc1_05[16] V12Vcc1_05[17] V14Vcc1_05[18] V16Vcc1_05[19] V17Vcc1_05[20] V18
Vcc3_3 / VccHDA U6
VccSus3_3/VccSusHDA R7
V_CPU_IO[1] AE23V_CPU_IO[2] AE26V_CPU_IO[3] AH26
Vcc3_3[3] AA7Vcc3_3[4] AB12Vcc3_3[5] AB20Vcc3_3[6] AC16Vcc3_3[7] AD13Vcc3_3[8] AD18Vcc3_3[9] AG12
Vcc3_3[10] AG15Vcc3_3[11] AG19
Vcc3_3[12] A5
Vcc3_3[14] B16Vcc3_3[15] B7Vcc3_3[16] C10
Vcc3_3[13] B13
Vcc3_3[17] D15Vcc3_3[18] F9Vcc3_3[19] G11Vcc3_3[20] G12
VccRTC W5
VccSus3_3[1] P7
VccSus3_3[2] A24
VccSus3_3[4] D19VccSus3_3[5] D22VccSus3_3[6] G19
VccSus3_3[3] C24
VccSus3_3[7] K3VccSus3_3[8] K4VccSus3_3[9] K5
VccSus3_3[10] K6VccSus3_3[11] L1
Vcc1_5_A[19] AB17Vcc1_5_A[20] AC17
Vcc1_5_A[21] T7Vcc1_5_A[22] F17Vcc1_5_A[23] G17
Vcc1_5_A[24] AB8Vcc1_5_A[25] AC8
VccSus1_05[1] K7
Vcc1_5_A[1]AB7Vcc1_5_A[2]AC6Vcc1_5_A[3]AC7Vcc1_5_A[4]AD6Vcc1_5_A[5]AE6Vcc1_5_A[6]AF5Vcc1_5_A[7]AF6Vcc1_5_A[8]AG5Vcc1_5_A[9]AH5
Vcc1_5_A[10]AB10Vcc1_5_A[11]AB9Vcc1_5_A[12]AC10Vcc1_5_A[13]AD10Vcc1_5_A[14]AE10Vcc1_5_A[15]AF10Vcc1_5_A[16]AF9Vcc1_5_A[17]AG9Vcc1_5_A[18]AH9
VccSus3_3[19]E3
VccUSBPLLC1
VccSus1_05/VccLAN1_05[1]AA2VccSus1_05/VccLAN1_05[2]Y7
VccSus3_3/VccLAN3_3[1]V5VccSus3_3/VccLAN3_3[2]V1VccSus3_3/VccLAN3_3[3]W2VccSus3_3/VccLAN3_3[4]W7
Vcc3_3[21] G16
VccSus3_3[12] L2VccSus3_3[13] L3VccSus3_3[14] L6VccSus3_3[15] L7VccSus3_3[16] M6VccSus3_3[17] M7VccSus3_3[18] N7
VccSus1_05[2] C28VccSus1_05[3] G20
Vcc1_5_A[26] A1Vcc1_5_A[27] H6Vcc1_5_A[28] H7Vcc1_5_A[29] J6Vcc1_5_A[30] J7
C71
20.
1U_0
402_
16V4
Z
1
2
C691
0.1U_0402_16V4Z
1
2
C742
0.1U_0402_16V4Z
1
2
C70
90.
1U_0
402_
16V4
Z
1
2
C741
0.1U_0402_16V4Z
1
2
+ C708
220U_D2_4VM
1
2
R518
100_0402_5%
12
C721
1U_0603_10V4Z
1
2
C35
20.
01U
_040
2_16
V7K
1
2
C6904.7U_0805_10V4Z
1 2
R109
0.5_0805_1%
1 2
C73
10.
1U_0
402_
16V4
Z
1
2
C723
0.1U_0402_16V4Z
1
2
C73
70.
1U_0
402_
16V4
Z
1
2
T32PAD
U6E
ICH7_BGA652~D
VSS[0]A4VSS[1]A23VSS[2]B1VSS[3]B8VSS[4]B11VSS[5]B14VSS[6]B17VSS[7]B20VSS[8]B26VSS[9]B28VSS[10]C2VSS[11]C6VSS[12]C27VSS[13]D10VSS[14]D13VSS[15]D18VSS[16]D21VSS[17]D24VSS[18]E1VSS[19]E2VSS[21]E4VSS[22]E8VSS[23]E15VSS[24]F3VSS[25]F4VSS[26]F5VSS[27]F12VSS[28]F27VSS[29]F28VSS[30]G1VSS[31]G2VSS[32]G5VSS[33]G6VSS[34]G9VSS[35]G14VSS[36]G18VSS[37]G21VSS[38]G24VSS[39]G25VSS[40]G26VSS[41]H3VSS[42]H4VSS[43]H5VSS[44]H24VSS[45]H27VSS[46]H28VSS[47]J1VSS[48]J2VSS[49]J5VSS[50]J24VSS[51]J25VSS[52]J26VSS[53]K24VSS[54]K27VSS[55]K28VSS[56]L13VSS[57]L15VSS[58]L24VSS[59]L25VSS[60]L26VSS[61]M3VSS[62]M4VSS[63]M5VSS[64]M12VSS[65]M13VSS[66]M14VSS[67]M15VSS[68]M16VSS[69]M17VSS[70]M24VSS[71]M27VSS[72]M28VSS[73]N1VSS[74]N2VSS[75]N5VSS[76]N6VSS[77]N11VSS[78]N12VSS[79]N13VSS[80]N14VSS[81]N15VSS[82]N16VSS[83]N17VSS[84]N18VSS[85]N24VSS[86]N25VSS[87]N26VSS[88]P3VSS[89]P4VSS[90]P12VSS[91]P13VSS[92]P14VSS[93]P15VSS[94]P16VSS[95]P17VSS[96]P24VSS[97]P27
VSS[98] P28VSS[99] R1
VSS[100] R11VSS[101] R12VSS[102] R13VSS[103] R14VSS[104] R15VSS[105] R16VSS[106] R17VSS[107] R18VSS[108] T6VSS[109] T12VSS[110] T13VSS[111] T14VSS[112] T15VSS[113] T16VSS[114] T17VSS[115] U4VSS[116] U12VSS[117] U13VSS[118] U14VSS[119] U15VSS[120] U16VSS[121] U17VSS[122] U24VSS[123] U25VSS[124] U26VSS[125] V2VSS[126] V13VSS[127] V15VSS[128] V24VSS[129] V27VSS[130] V28VSS[131] W6VSS[132] W24VSS[133] W25VSS[134] W26VSS[135] Y3VSS[136] Y24VSS[137] Y27VSS[138] Y28VSS[139] AA1VSS[140] AA24VSS[141] AA25VSS[142] AA26VSS[143] AB4VSS[144] AB6VSS[145] AB11VSS[146] AB14VSS[147] AB16VSS[148] AB19VSS[149] AB21VSS[150] AB24VSS[151] AB27VSS[152] AB28VSS[153] AC2VSS[154] AC5VSS[155] AC9VSS[156] AC11VSS[157] AD1VSS[158] AD3VSS[159] AD4VSS[160] AD7VSS[161] AD8VSS[162] AD11VSS[163] AD15VSS[164] AD19VSS[165] AD23VSS[166] AE2VSS[167] AE4VSS[168] AE8VSS[169] AE11VSS[170] AE13VSS[171] AE18VSS[172] AE21VSS[173] AE24VSS[174] AE25VSS[175] AF2VSS[176] AF4VSS[177] AF8VSS[178] AF11VSS[179] AF27VSS[180] AF28VSS[181] AG1VSS[182] AG3VSS[183] AG7VSS[184] AG11VSS[185] AG14VSS[186] AG17VSS[187] AG20VSS[188] AG25VSS[189] AH1VSS[190] AH3VSS[191] AH7VSS[192] AH12VSS[193] AH23VSS[194] AH27
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PD_A2
PD_DREQ
PSATA_ITX_DRX_N0PSATA_ITX_DRX_P0
PSATA_IRX_DTX_P0SSATA_IRX_DTX_P0
PD_D[0..15]
PD_CS#3
PD_IOR#
PD_DACK#
PDIAG#
PD_D14PD_D15
PD_D13
PD_D10
PD_D12PD_D11
PD_D9PD_D8
SSATA_ITX_DRX_P0
SSATA_IRX_DTX_N0
SSATA_ITX_DRX_N0PSATA_IRX_DTX_N0
PD_CS#1
PLT_RST#
PD_A0PD_A1PD_IRQ
PD_IOW#PD_IORDY
PRI_CSEL
PD_D6PD_D7
PD_D4PD_D5
PD_D3PD_D2
PD_D0PD_D1
ACT_LED#PD_A2 <28>
CDROM_R <38>
PD_IOR# <28>
PD_CS#3 <28>
CD_AGND <38>
PSATA_IRX_DTX_N0_C<28>
PSATA_ITX_DRX_P0<28>
PSATA_IRX_DTX_P0_C<28>
PSATA_ITX_DRX_N0<28> SSATA_ITX_DRX_P0<28>
SSATA_IRX_DTX_N0_C<28>
SSATA_IRX_DTX_P0_C<28>
SSATA_ITX_DRX_N0<28>
PD_D[0..15] <28>
PD_DACK# <28>
PD_DREQ <28>
PD_IORDY<28>PD_IOW#<28>
PD_IRQ<28>PD_A1<28>PD_A0<28>
PD_CS#1<28>
CDROM_L<38>
ACT_LED#<43>
PLT_RST#<7,27,32,34,37>
+5VS
+5VS
+5VS
+5VS +3VS+5VS +3VS
+3VS
+5VS+5VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
HDD & CDROMCustom
31 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Need update symbol
Pleace near HD CONN
Main HDD
Main SATA +5V Default
close SATA connector
Pleace near HD CONN
Need update symbol
Pleace near HD CONN
2nd HDD
Main SATA +5V Default
close SATA connector
Pleace near HD CONN
CD-ROM Connector
C3800.1U_0402_16V4Z
12
C4803900P_0402_50V7K
12
C485
0.1U_0402_16V4Z
1
2
C51
410
00P_
0402
_50V
7K
1
2
C449
0.1U_0402_16V4Z
1
2
C464
0.1U_0402_16V4Z
1
2
JP33
SUYIN_127059FR022S305ZL
GND1A+2A-3GND4B-5B+6GND7
V338V339V3310GND11GND12GND13V514V515V516GND17Reserved18GND19V1220V1221V1222
C48
60.
1U_0
402_
16V4
Z
1
2
C513
1U_0603_10V4Z
1
2
C473
1U_0603_10V4Z
1
2
C43
422
U_1
206_
6.3V
6M
1
2
JP31
SUYIN_127059FR022S305ZL
GND1A+2A-3GND4B-5B+6GND7
V338V339V3310GND11GND12GND13V514V515V516GND17Reserved18GND19V1220V1221V1222
C4843900P_0402_50V7K
12
C46
810
00P_
0402
_50V
7K
1
2
C5033900P_0402_50V7K
12
C46
00.
1U_0
402_
16V4
Z
1
2
R157100K_0402_5%
1 2
C43
922
U_1
206_
6.3V
6M
1
2
C45
70.
1U_0
402_
16V4
Z
1
2 C50
022
U_1
206_
6.3V
6M
1
2
C46
522
U_1
206_
6.3V
6M
1
2
C518
0.1U_0402_16V4Z
1
2
JP25
SUYIN_800059MR050S119ZL
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 50GND51 GND 52
GND 54GND53
C45
310
00P_
0402
_50V
7K
1
2 C52
40.
1U_0
402_
16V4
Z
1
2
C445
1U_0603_10V4Z
1
2
C447
1U_0603_10V4Z
1
2
C5053900P_0402_50V7K
12
R147470_0402_5%
12
C3711U_0603_10V4Z
1
2
C35710U_0805_10V4Z
1
2
C48
210
00P_
0402
_50V
7K
1
2
R217 33_0402_5%12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SM_RB#
MSBS_SDCMD_SMWE#
SDCLK_SMRE#
SDWP#_SMCE#
CLK_PCI_PCM
MSD3_SDD3_SMD3
MSBS_SDCMD_SMWE#MS_CD#
MSD0_SDD0_SMD0MSD1_SDD1_SMD1
MSD2_SDD2_SMD2MSD3_SDD3_SMD3SDD0_SMD4SDD1_SMD5
SDD3_SMD7SDD2_SMD6
SDWP#_SMCE#
SD_CD#
XD_CD#
SM_RB#SDCLK_SMRE#
SDCMD_SMALE
SMCLE
SM_PHYS_WP#MSCLK_SDCLK_SMELWP#
SM_CD#
MSD0_SDD0_SMD0MSD1_SDD1_SMD1MSD2_SDD2_SMD2
MSBS_SDCMD_SMWE#
SDWP#_SMCE#
CB_PME#
MC_PWRON#
PCI_AD[0..31]
PCI_CBE#[0..3]
GRST#PCI_RST#
MC_PWRON#
MSD2_SDD2_SMD2
MSD0_SDD0_SMD0MSD1_SDD1_SMD1
MSD3_SDD3_SMD3MSBS_SDCMD_SMWE#
PWR_CTRL_1/SM_R/B#
SDD1_SMD5SDD0_SMD4
SDD3_SMD7SDWP#_SMCE#
SDCMD_SMALE
SDD2_SMD6
SDCLK_SMRE#
SMCLE
XTPB1+
XTPBIAS1
XTPB1-
CARD_LED
PCI_RST#GRST#
CLK_PCI_PCM
CB_PME#
PCI_AD22
PCI_AD3PCI_AD2
PCI_AD26
PCI_AD5
PCI_AD12
PCI_AD7
PCI_AD20
PCI_AD29
PCI_AD24
PCI_AD30
PCI_AD14
PCI_AD19
PCI_AD0
PCI_AD27
PCI_AD25
PCI_AD28
PCI_AD21
PCI_AD15
PCI_AD17
PCI_AD1
PCI_AD16
PCI_AD22
PCI_AD31
PCI_AD4
PCI_AD18
PCI_AD8
PCI_AD6
PCI_AD11
PCI_AD13
PCI_AD10PCI_AD9
PCI_AD23
PCI_CBE#3
PCI_CBE#0PCI_CBE#1PCI_CBE#2
+VDDPLL+VDD_PLL
SD_CD#
SM_CD#MS_CD#
CLK_48M_CB
XTPA0-
XTPBIAS0XTPA0+
XTPA1+XTPA1-
CPS
CPS
XTPB0+XTPB0-
X_OUTX_IN
XTPA1-XTPA1+
XTPB1+XTPB1-
X_OUT
X_IN
CLK_48M_CB
XTPBIAS1
MSCLK_SDCLK_SMELWP#
+VDDPLL
MC_PWRON#
SD_CD#MS_CD#
CARD_LED
SM_CD#
SD_CD#
MC_PWRON#
XD_CD#
SM_RB# PWR_CTRL_1/SM_R/B#
SM_PHYS_WP#
SM_CD#
SM_RB#/SC_RFU
XD_CD#/SM_PHYS_WP#
MSCLK_SDCLK_SMELWP#
PCM_SPK
MSCLK_SDCLK_SMELWP#MSBS_SDCMD_SMWE#
MSD3_SDD3_SMD3
MSD0_SDD0_SMD0MSD1_SDD1_SMD1MSD2_SDD2_SMD2
CARD_LED
XD_CD#/SM_PHYS_WP#
PCI_AD[0..31]<27,36>
PCI_CBE#[0..3]<27,36>
PCI_PME# <27,44>
PCI_PIRQE# <27>
PCI_PIRQC# <27>PCI_PIRQD# <27>PCI_PIRQG# <27>SIRQ <29,42,44>
PCI_CLKRUN# <29>
PCM_SPK <38>
PLT_RST# <7,27,31,34,37>
CLK_PCI_PCM <15>PCI_RST# <27,33,36,42,44>
PCI_STOP# <27>
PCI_TRDY# <27,36>
PCI_PAR <27>
PCI_IRDY# <27>
PCI_PERR# <27>
PCI_REQ2# <27>PCI_GNT2# <27>
PCI_DEVSEL# <27>
PCI_SERR# <27>
PCI_FRAME# <27,36>CLK_48M_CB<15>
XTPA1+<46>XTPA1-<46>XTPB1+<46>XTPB1-<46>
CARD_LED <43>
SM_RB#/SC_RFU<33>
+VCC_MS
+VCC_SM_XD
+VCC_MS
+VCC_SM_XD
+3VS
+VCC_MS
+3VS
+3VS_CBVCCP +3VS
+3VS_CBPLL+3VS
+3VS
+3VS
+3VS
+VCC_MS +VCC_SD +VCC_MS +VCC_SM_XD
+3VS
+3VS +3VS
+3VS+VCC_MS
+3VS
+VCC_SD
+VCC_MS
+VCC_SD +VCC_SM_XD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
PCI7412Custom
32 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
CLOSE TO CHIP
CLOSE TO CHIP
near JP32 pin
R58843K_0402_5%7412@
12
R3610_0402_5%@
1 2
R360
22_0402_5%CR@1 2
R315
0_0402_5%7412@1 2
C42
9
10U
_080
5_10
V4Z
7412
@
1
2
D9 CH751H-40_SC76@2 1
C827 10P_0402_50V8J@1 2
R602
10K_0402_5%7412@
12
R565
47K_0402_5% @
12
R599 33_0402_5%CR@1 2
R26
256
.2_0
603_
1%13
94@
12
R32943K_0402_5%7412@
PCI7412
U18B
PCI7412ZHK_PBGA2577412@
SPKROUT H3
SUSPEND# J5
VSSP
LLR
17
VDD
PLL_
15P1
5
VR_P
OR
TK1
VR_P
OR
TK1
9
VCC
PP1
VCC
PW
8
VDD
PLL_
33U
19
AGN
DR
14AG
ND
U13
AGN
DU
14
AVD
D_3
3P1
3AV
DD
_33
P14
AVD
D_3
3U
15
AD31 M1AD30 M2AD29 M3AD28 M6AD27 M5AD26 N1AD25 N2AD24 N3AD23 P3AD22 R1AD21 R2AD20 P5AD19 R3AD18 T1AD17 T2AD16 W4AD15 W7AD14 R8AD13 U8AD12 V8AD11 W9AD10 V9
AD9 U9AD8 R9AD7 V10AD6 U10AD5 R10AD4 W11AD3 V11AD2 U11AD1 P11AD0 R11
C/BE3# P2C/BE2# U5C/BE1# V7C/BE0# W10
PAR U7FRAME# R6
TRDY# W5IRDY# V5
STOP# V6DEVSEL# U6
IDSEL N5PERR# R7SERR# W6
REQ# L3GNT# L2
MFUNC0 G1MFUNC1 H5MFUNC2 H2MFUNC3 H1MFUNC4 J1MFUNC5 J2MFUNC6 J3
PCLK L1PRST# K3GRST# K5
RI_OUT#/PME# L5
CLK_48F1PHY_TEST_MAP17
MC_PWR_CTRL_0C8MC_PWR_CTRL_1/SM_R/B#F8
SD_CD#E9MS_CD#A8SM_CD#B8
MS_CLK/SD_CLK/SM_EL_WP#A7MS_BS/SD_CMD/SM_WE#E8MS_DATA3/SD_DAT3/SM_D3B6MS_DATA2/SD_DAT2/SM_D2A6MS_DATA1/SD_DAT1/SM_D1C7MS_SDIO(DATA0)/SD_DAT0/SM_D0B7
SD_CLK/SM_RE#A4SD_CMD/SM_ALEC5SD_DAT0/SM_D4C6SD_DAT1/SM_D5A5SD_DAT2/SM_D6B5SD_DAT3/SM_D7E6SD_WP/SM_CE#E7
SM_CLEB4XD_CD#/SM_PHYS_WP#A3
TEST0P12
R0T18R1T19TPBIAS0R13TPA0PV14TPA0NW14TPB0PV13TPB0NW13TPBIAS1W17TPA1PV16TPA1NW16TPB1PV15TPB1NW15CPSR12
XOR18XIR19
SCL G2SDA G3
VR_EN# K2
SC_PWR_CTRLG5
G
DS
Q82N7002_SOT23@
2
13
G
DS
Q192N7002_SOT23CR@
2
13
C458 0.1U_0402_16V4Z7412@12
D32 CH751H-40_SC76 21
R26
356
.2_0
603_
1%13
94@
12
C43
2
1U_0
603_
10V4
Z74
12@
1
2
C8231000P_0402_50V7K
1
2
R241
10K_0402_5%@
12
R25
1
56.2
_060
3_1%
7412
@1
2
C420
15P_0402_50V8J@
1
2
G
DS
Q222N7002_SOT23CR@
2
13
R26
556
.2_0
603_
1%13
94@
12
R564
10K_0402_5%CR@
12
C782
10U_0805_10V4ZCR@
1
2
R320 220_0402_5%7412@12
5 IN 1 CONN
JP32
TAITN_R007-N3P-15-S
SM_WP-IN / XD_WP-IN35
SM-D4 / XD-D421
MS-DATA3 18
MS-DATA0 15
SD-DAT2 12
SD-DAT0 7
SD-CMD 10
MS-DATA1 14
SM-D6 / XD-D623
SD-DAT3 11
SD-DAT1 6
SD-WP-SW 5
#SM-ALE / XD-ALE37
SM-D034
SD_CLK 8
SM-D2 / XD-D232
SM_-VCC / XD_-VCC29MS-INS 17
MS-DATA2 16
MS-SCLK 19
SM-LVD25
#SM_-RE / XD_-RE27 MS-BS 13
SM-D5 / XD-D522
#SM_-CD30
SM-D7 / XD-D724
SM-D1 / XD-D133
#SM_-CE / XD_-CE28
#SM_R/-B / XD_R/-B26
SM-D3 / XD-D331
SD-VCC 9
#SM_-WE / XD_-WE36
MS-VCC 20
SM-CD-COM2SM-CLE / XD-CLE38
GND 1
SD-CD-SW 42SD-CD-COM 41
XD-VCC 40XD-CD 39
SM-CD-SW3
NC 4
SM-WP-SW43
GND 44GND45GND46
C46
71U
_060
3_10
V4Z
7412
@
1
2
R3520_0402_5%CR@
1 2
C448
0.1U_0402_16V4Z7412@
1
2R
244
5.1K
_060
3_1%
7412
@
12
R3630_0402_5%CR@
1 2
C825
15P_0402_50V8J
1
2
C781 10U_0805_10V4ZCR@12
G
D
SQ232N7002_SOT23@
2
13
D33 CH751H-40_SC76 21
R26
156
.2_0
603_
1%74
12@
12
R607 10_0402_5% 1 2
R3164.7K_0402_5%7412@
1 2
D29 CH751H-40_SC76 21
R293
0_0805_5%7412@
R567
10K_0402_5%CR@
12
R26
456
.2_0
603_
1%13
94@
12
R3210_0402_5%@
1 2
R374
10K_0402_5%CR@
12
U42
TPS2041BDR_SO8CR@
GND1IN2IN3EN#4 OC# 5OUT 6OUT 7OUT 8
R3490_0402_5%@
1 2
C771
0.1U_0402_16V4ZCR@
1
2
D34 CH751H-40_SC76 21
C451
10P_0402_50V8J7412@
1 2
R3620_0402_5%CR@
1 2
R55
922
K_04
02_5
%C
R@
12
D10 CH751H-40_SC76@2 1
R389
470_0402_5%@
12
C42
827
0P_0
603_
50V8
J74
12@
1
2
R204 0_0402_5%7412@ 12
R595 33_0402_5%CR@1 2
G
DS
Q43
SI2301BDS_SOT23CR@ 2
13
C42
61U
_060
3_10
V4Z
1394
@1
2
C42
3
1U_0
603_
10V4
Z
7412
@
1
2
L23
MBK160808_06037412@1 2
R566
47K_0402_5% @
12
G
D
SQ242N7002_SOT23@
2
13
R249100_0402_5%7412@
12
C778 0.01U_0402_16V7KCR@12
D35 CH751H-40_SC76 21
C42
727
0P_0
603_
50V8
J13
94@
1
2
R598 33_0402_5%CR@1 2
R280 6.34K_0402_1%7412@1 2
R214
10_0402_5%@
12
R2981M_0402_5%@
R344 220_0402_5%7412@12
R189 0_0402_5%7412@ 12
R190 0_0402_5%7412@ 12
C826 1000P_0402_50V7K 1 2
D36 CH751H-40_SC76 21
R55
710
0K_0
402_
5%C
R@
12
JP28SUYIN_020204FR004S506ZL
1 12 23 34 4
GN
D1
5G
ND
26
GN
D3
7G
ND
48
C8241000P_0402_50V7K
1
2
Y3
24.576MHZ_16P_1BG24576CK1A7412@
12
C444
10P_0402_50V8J7412@
1 2
D30 CH751H-40_SC76 21
R358
10K_0402_5%CR@
12
R313 0_0402_5%7412@ 12
C45
21U
_060
3_10
V4Z
7412
@
1
2
G
DS
Q44
SI2301BDS_SOT23CR@ 2
13
R597 33_0402_5%CR@1 2
R24
25.
1K_0
603_
1%13
94@
12
R328 220_0402_5%7412@12
R26
056
.2_0
603_
1%74
12@
12
C470
10P_0402_50V8J@1
2
C779
10U_0805_10V4ZCR@
1
2
R234
0_0805_5%7412@
R25
0
56.2
_060
3_1%
7412
@1
2
R3424.7K_0402_5%7412@1 2
C435
0.1U_0402_16V4Z7412@
1
2
C43
3
0.01
U_0
402_
16V7
K74
12@
1
2
R314 0_0402_5%7412@ 12
R334
10_0402_5%@
12
R55
410
0K_0
402_
5%C
R@
12
D31 CH751H-40_SC76 21
R55
610
0K_0
402_
5%C
R@
12
R596 33_0402_5%CR@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CB_LATCHCB_CLK
PCI_RST#
CB_DAT
S1_CD2#
S1_D9
S1_A25
S1_A17
S1_CD1#
S1_D10
S1_IOWR#
S1_D11
S1_D13
S1_A18
S1_A22
S1_D12
S1_RST
S1_D8
S1_REG#
S1_A3
S1_D5
S1_A12
S1_A6
S1_D0
S1_A4
S1_VCC
S1_WE#
S1_D6
S1_A1
S1_D4
S1_A8
S1_A13
S1_VPP
S1_A10
S1_A16_C
S1_A15
S1_D3
S1_A9
S1_D7
S1_D1
S1_OE#
S1_A7
S1_CE1#
S1_RDY#
S1_WP
S1_D2
S1_A5
S1_A11
S1_A0
S1_A14
S1_A2
S1_VS2
S1_BVD1
S1_BVD2
S1_D14
S1_WAIT#
S1_CE2#
S1_D15
S1_A19
S1_A24
S1_INPACK#
S1_A21
S1_A23
S1_A20
S1_IORD#
S1_VS1
S1_A15
S1_BVD1
S1_A19
S1_A20
S1_WAIT#
S1_RDY#
S1_WE#S1_INPACK#
S1_A21
S1_WP
S1_A14
S1_A16
S1_A22
S1_BVD2
S1_RST
S1_CD1#
S1_VS2
S1_CD2#S1_VS1
S1_A9
S1_D0
S1_IORD#
S1_A0
S1_A5
S1_A2
S1_D5
S1_IOWR#
S1_D3
S1_A17
S1_D8
S1_D12
S1_A4
S1_D13
S1_D11
S1_A7S1_A25
S1_A1
S1_D10
S1_A3
S1_CE2#
S1_D1S1_D9
S1_A11
S1_A24
S1_A10
S1_D7
S1_A6
S1_OE#
S1_D6
S1_D4
S1_D15
S1_A12S1_REG#
S1_A8S1_CE1#
S1_A23S1_A13
S1_D14
S1_D2
S1_A18
S1_A16_C
CB_CLKCB_LATCH
CB_DAT
S1_CD1#
S1_CD2#
SM_RB#/SC_RFU
PCI_RST#<27,32,36,42,44>
SM_RB#/SC_RFU <32>
+S1_VCC
+5VS
+S1_VPP
+3VS
+S1_VCC
+S1_VPP
+S1_VCC
+S1_VPP
+3VS
+3VS
+S1_VCC
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
PCI7412 Custom
33 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Near to PCMCIA slot.
CardBus Power Switch
C48
9
0.1U
_040
2_16
V4Z
7412
@
1
2C78
010
U_0
805_
10V4
Z74
12@
1
2
R35143K_0402_5%@1 2
C48
3
0.1U
_040
2_16
V4Z
7412
@
1
2
R35043K_0402_5%
7412@
1 2
C492
0.1U_0402_16V4Z7412@
1
2
C43
6
0.1U
_040
2_16
V4Z
7412
@
1
2
R343
33_0402_5%7412@ 1 2
C488
100P_0402_50V8J7412@
12
C493
0.1U_0402_16V4Z7412@
1
2
C443
100P_0402_50V8J7412@
12
C491
10U_0805_10V4Z7412@
1
2
C47
8
0.1U
_040
2_16
V4Z
7412
@
1
2
C461
0.1U_0402_16V4Z7412@
1
2 C46
9
0.1U
_040
2_16
V4Z
7412
@
1
2
C52
3
0.1U
_040
2_16
V4Z
7412
@
1
2
C494
10U_0805_10V4Z7412@
1
2
C487
0.1U_0402_16V4Z7412@
1
2 C48
1
0.1U
_040
2_16
V4Z
7412
@
1
2C49
0
0.1U
_040
2_16
V4Z
7412
@
1
2
U20
TPS2220ADBRG4_SSOP247412@
5V 15V 2
DATA3CLOCK4LATCH5
NC8 6
12V 7
AVPP8
AVCC9AVCC10 GND 11
RESET#12
NC4 24
NC5 23NC6 22
SHDN#21
12V 20
NC019
NC218 NC117
NC7 16
OC#15 NC3 143.3V 13
C49
5
0.1U
_040
2_16
V4Z
7412
@
1
2
SANTA_130609-1_LT
JP10
GND 1
DATA3 2
DATA4 3
DATA5 4
DATA6 5
DATA7 6
CE1# 7
ADD10 8
OE# 9
ADD11 10
ADD9 11
ADD8 12
ADD13 13
ADD14 14
WE# 15
READY 16
VCC 17
VPP 18
ADD16 19
ADD15 20
ADD12 21
ADD7 22
ADD6 23
ADD5 24
ADD4 25
ADD3 26
ADD2 27
ADD1 28
ADD0 29
DATA0 30
DATA1 31
DATA2 32
WP 33
GND 34
GND 35
CD1# 36
DATA11 37
DATA12 38
DATA13 39
DATA14 40
DATA15 41
CE2# 42
VS1# 43
IORD# 44
IOWR# 45
ADD17 46
ADD18 47
ADD19 48
ADD20 49
ADD21 50
VCC 51
VPP 52
ADD22 53
ADD23 54
ADD24 55
ADD25 56
VS2# 57
RESET 58
WAIT# 59
INPACK# 60
REG# 61
BVD2 62
BVD1 63
DATA8 64
DATA9 65
DATA10 66
CD2# 67
GND 68
GND69GND70GND71GND72
PCI 7412
U18A
PCI7412ZHK_PBGA2577412@
CRST#/RESETC15
CAUDIO/BVD2(SPKR#)B12
A_USB_EN#E10
CAD31/D10C10CAD30/D9A10CAD29/D1F11CAD28/D8E11CAD27/D0C11CAD26/A0B13CAD25/A1C13CAD24/A2A14CAD23/A3B14CAD22/A4B15CAD21/A5E14CAD20/A6A16CAD19/A25D19CAD18/A7E17CAD17/A24F15CAD16/A17H19CAD15/IOWR#J17CAD14/A9J15CAD13/IORD#J18CAD12/A11K15CAD11/OE#K17CAD10/CE2#K18CAD9/A10L15CAD8/D15L18CAD7/D7L19CAD6/D13M17CAD5/D6M18CAD4/D12N19CAD3/D5M15CAD2/D11N17CAD1/D4N18CAD0/D3P19
CC/BE3#/REG#E13CC/BE2#/A12E18CC/BE1#/A8H18CC/BE0#/CE1#L17
CPAR/A13H14CFRAME#/A23E19CTRDY#/A22G15CIRDY#/A15F17CSTOP#/A20G18CDEVSEL#/A21F19CBLOCK#/A19H15CPERR#/A14G19CSERR#/WAIT#C12CREQ#/INPACK#C14CGNT#/WE#G17CSTSCHG/BVD1(STSCHG#/RI#)A12CCLKRUN#/WP(IOIS16#)A11CCLK/A16F18CINT#/READY(IREQ#)E12
CCD1#/CD1#N15CCD2#/CD2#B11CVS1/VS1#A13CVS2/VS2#B16
GN
DF7
GN
DF1
0G
ND
F13
GN
DG
14G
ND
H6
GN
DK6
GN
DK1
4G
ND
M14
GN
DN
6G
ND
P7G
ND
P9
VCC
BA1
5VC
CB
J19
VCC
F6VC
CF9
VCC
F12
VCC
F14
VCC
J6VC
CJ1
4VC
CL6
VCC
L14
VCC
P6VC
CP8
VCC
P10
DATA/VD2/VPPD1 B9CLOCK/VD1/VCCD0# A9
LATCH/VD3/VPPD0 C9
RSVD/D2 B10RSVD/VD0/VCCD1# C4
RSVD D1RSVD E1RSVD E2RSVD E3RSVD F2RSVD F3RSVD F5RSVD G6RSVD H17RSVD M19
NC A2NC A17NC A18NC B1NC B2NC B3NC B17NC B18NC B19NC C1NC C2NC C3NC C16NC C17NC C18NC C19NC D2NC D3NC D17NC D18NC E5NC N14NC P18NC T3NC T17NC U1NC U2NC U3NC U4NC U12NC U16NC U17NC U18NC V1NC V2NC V3NC V4NC V12NC V17NC V18NC V19NC W2NC W3NC W12NC W18
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCIE_PME#_R
USB7+
PERST#
CPUSB#
CPUSB#
PCIE_TXP1
PCIE_RXN1PCIE_RXP1
PCIE_TXN1
CLK_PCIE_NC1#CLK_PCIE_NC1
ICH_SMBCLKICH_SMBDATA
PLTRST#
SUSP#SYSON
PERST#
PCIE_PME#_R
USB20_N7USB20_P7
PERST#
CPUSB#
CPUSB#
PCIE_TXP2
PCIE_RXN2PCIE_RXP2
PCIE_TXN2
ICH_SMBCLKICH_SMBDATA
USB20_N7USB20_P7
USB7-
CLKREQC#
CLK_PCIE_NC2#CLK_PCIE_NC2
CLKREQD#
EXPCRD_RST#
CLK_PCIE_NC1#<15>CLK_PCIE_NC1<15>
ICH_PCIE_WAKE#<29,37>
ICH_SMBDATA<15,29,37>ICH_SMBCLK<15,29,37>
SUSP#<44,45,47,51,52,54>
CPUSB#<29,44>
SYSON<44,47,51>
USB20_P7<29>USB20_N7<29>
PCIE_TXN1<29>PCIE_TXP1<29>
PCIE_RXP1<29>PCIE_RXN1<29>
PCIE_TXN2<29>
PCIE_RXP2<29>PCIE_RXN2<29>
PCIE_TXP2<29>
CLKREQC#<15>
CLK_PCIE_NC2#<15>CLK_PCIE_NC2<15>
CLKREQD#<15>
EXPCRD_RST# <44>PLT_RST#<7,27,31,32,37>
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+1.5VS_PEC
+3VS
+1.5VS_PEC
+3VALW
+1.5VS
+3VS_PEC
+3V_PEC
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+1.5VS_PEC
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Express CardCustom
34 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Near to Express Card slot. 17
Express Card Power Switch
Near to Express Card slot. 15.4
close to JP36
C5300.1U_0402_16V4Z
17_EXP@
1
2
G
DS
Q512N7002_SOT23EXP@
2
13
C5280.1U_0402_16V4Z
15_EXP@
1
2
JP13
FOX_1CH4110C
GND1USB_D-2USB_D+3CPUSB#4RSV5RSV6SMB_CLK7SMB_DATA8+1.5V9+1.5V10WAKE#11+3.3VAUX12PERST#13+3.3V14+3.3V15CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND20PERn021PERp022GND23PETn024PETp025GND26
GND27GND28
R412
0_0402_5%17_EXP@
1 2
JP14
FOX_1CH4110C
GND1USB_D-2USB_D+3CPUSB#4RSV5RSV6SMB_CLK7SMB_DATA8+1.5V9+1.5V10WAKE#11+3.3VAUX12PERST#13+3.3V14+3.3V15CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND20PERn021PERp022GND23PETn024PETp025GND26
GND27GND28
C4710.1U_0402_16V4ZEXP@
12
C5540.1U_0402_16V4Z
15_EXP@
1
2
R4130_0402_5%17_EXP@1 2
C4540.1U_0402_16V4ZEXP@
12
C466
0.1U_0402_16V4Z
EXP@12
C5370.1U_0402_16V4Z
15_EXP@
1
2
R180 100K_0402_5%EXP@12
U16
TPS2231PWPR_PWP24EXP@
GN
D11
OC# 23
3.3Vin153.3Vin26
1.5Vin1181.5Vin219
3.3Vaux_in21
3.3Vout1 73.3Vout2 8
Aux_out 20
1.5Vout1 161.5Vout2 17
CPUSB#14CPPE#15STBY#4SHDN#3 RCLKEN 22
PERST# 9
NC
11
NC
210
NC
312
NC
413
NC
524
SYSRST#2
C529
4.7U_0805_10V4Z
15_EXP@
1
2
C5420.1U_0402_16V4Z
17_EXP@
1
2
R391
0_0402_5%17_EXP@
1 2
C553
4.7U_0805_10V4Z
15_EXP@
1
2
C555
4.7U_0805_10V4Z
17_EXP@
1
2
C5434.7U_0805_10V4Z
17_EXP@
1
2
C5454.7U_0805_10V4Z
15_EXP@
1
2
C5580.1U_0402_16V4Z
17_EXP@
1
2
R307 0_0402_5%@12
C532
4.7U_0805_10V4Z
17_EXP@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDO1+
MDO1-
MDO0+
MDO0-
LAN1_XO
LAN1_XI
RDNRDP
TDNTDP
MCT1
MCT0 RJ45_GND
RDP
TDN
RDN
TDP
RDP
ACTLED#
LAN_RXD0LAN_RXD1LAN_RXD2
LAN_RSTSYNC
LAN_TXD0LAN_TXD1LAN_TXD2
LAN_JCLK
+3V_LAN
TDN
TDP
RDN
MDO0-MDO0+
MDO1+MDO1-
LINK_LED100#
RJ45_GND
LINK_LED100#
ACTLED#
RDN
RDP
LAN_RXD2 <28>LAN_RXD1 <28>LAN_RXD0 <28>LAN_RSTSYNC <28>
LAN_TXD2 <28>LAN_TXD1 <28>LAN_TXD0 <28>LAN_JCLK <28>
MDO0+ <46>MDO0- <46>
MDO1- <46>MDO1+ <46>
+3VALW
+3VALW
+3VLAN
+3VLAN
+3VLAN+3VALW
+3VLAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
82562EZ LANCustom
35 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
close to U41chip(Intel rule)
15 mil
close to U41chip(Intel rule)
close to U12
R560110_0402_1%
12
C77
20.
1U_0
402_
16V4
Z 1
2 C757
0.01U_0402_16V7K
@
1
2
U41
82562GT_SSOP48
VCC1
VCCA2
RBIAS10 4
RBIAS100 5
VCCA27VCCT9
TDP 10TDN 11
VCCT12VCCT14
RDP 15RDN 16
VCCT17
VCCR19VCCR23
VCC25
TOUT 26
LILED# 27
SPDLED# 31ACTLED# 32
JRXD0 34JRXD1 35
VCCP36
JRXD2 37
JCLK 39
VCCP40
JRSTSYNC 42
JTXD0 43JTXD1 44JTXD2 45
X1 46
X2 47
ISOL_TI28ISOL_TCK30ISOL_EXEC29TESTEN21
ADV1041
VSS8VSS13VSS18VSS24VSS48VSSP33VSSP38VSSA3VSSA26VSSR20VSSR22
R36300_0603_5%
1 2
R561110_0402_1%
12
R563 619_0402_1%1 2
R58375_0402_5%
1 2
R5550_0603_5%
12
R558 200_0402_5%1 2
C756
0.01U_0402_16V7K
@
1
2
L31BLM11A121SPT_0603
12
C77
00.
1U_0
402_
16V4
Z 1
2
C76
610
U_0
805_
6.3V
4Z
1
2
R5820_0402_5%@
12
C776
22P_0402_50V8J
1 2
JP19
SUYIN_100073FR012S100ZLCONN@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED+9
Green LED-10
Amber LED+11
Amber LED-12
SHLD1 13
SHLD2 14
SHLD4 16
SHLD3 15
R43300_0603_5%
1 2
Y625MHZ_20P_1BG25000CK1A
12
R606110_0402_1%@
12
R562 619_0402_1%1 2
C77
30.
1U_0
402_
16V4
Z 1
2R17075_0402_5%
12
C414
1000P_1206_2KV7K
12
C76
80.
1U_0
402_
16V4
Z 1
2
R17175_0402_5%
12
C77
40.
1U_0
402_
16V4
Z 1
2
R58475_0402_5%
1 2
C777
22P_0402_50V8J
1 2
U12
NS0013_16P
RD+1 RD-2 CT3
CT6 TD+7 TD-8 TX- 9TX+ 10CT 11
CT 14RX- 15RX+ 16
C77
50.
1U_0
402_
16V4
Z 1
2
C76
90.
1U_0
402_
16V4
Z 1
2
C76
710
U_0
805_
6.3V
4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_AD6<27,32>
PCI_AD1<27,32>
PCI_AD5<27,32>
PCI_AD2<27,32>
PCI_CBE#2<27,32>
PCI_AD8<27,32>
PCI_CBE#0<27,32>
PCI_AD4<27,32>
PCI_AD0<27,32>
PCI_AD3<27,32>
PCI_AD7<27,32>
PCI_CBE#1<27,32>
PCI_CBE#3<27,32>
CLK_PCI_MINI<15>
PCI_RST#<27,32,33,42,44>
PCI_AD9<27,32>PCI_TRDY#<27,32>
PCI_FRAME#<27,32>
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Debug portCustom
36 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Port 80 Debug Card Connector
JP27
HEADER 20@1234567891011121314151617181920
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PLT_RST#
ICH_SMBCLKICH_SMBDATA
CLK_PCIE_MCARDCLK_PCIE_MCARD#
WLED#LED_WLAN_OUT#
LED_WLANOUT#
ICH_PCIE_WAKE#<29,34>
CLKREQA#<15>
PCIE_RXN3<29>PCIE_RXP3<29>
PCIE_TXN3<29>PCIE_TXP3<29>
WL_ON <29>PLT_RST# <7,27,31,32,34>
ICH_SMBCLK <15,29,34>ICH_SMBDATA <15,29,34>
CLK_PCIE_MCARD#<15>CLK_PCIE_MCARD<15>
WL_PRIORITY<41>
WL_LED# <16,42>
WIRELESS_LED_BT<41>
BT_PRIORITY<41>
+3VS
+1.5VS
+3VALW +3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Mini CardCustom
37 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Mini-Express Card(Slot 1-WLAN)
D2
BAS16_SOT23
1
3
2
C797
0.1U_0402_16V4Z@
1 2
R594100K_0402_5%
12
R592470_0402_5%
12
R600 100_0402_5% 1 2
JP18
MOLEX_67910-0002
33 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 16
1717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 52
11 2 2
5353 54 545555 56 56
10K
47K
Q48
DTA114YKA_SC59
2
13
C78
0.1U
_040
2_16
V4Z
1
2
G
D
SQ492N7002_SOT23
2
13
C16
7
0.1U
_040
2_16
V4Z
1
2
C6080.1U_0402_16V4Z
12
G
D
SQ502N7002_SOT23
2
13
R593100K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MONO_IN MONO_IN1 MONO_INR
MIC_INR
SPDIFO
LINE_OUTLLINE_OUTR
CDGNDA
ACZ_RST#
MONO_INR
CDROM_RC_R
CDROM_RC_L CDROM_R_LCD_GNACDROM_R_R
REF_FILTVREFVC
EAPD
SENSEA
DOCK_LOUTLDOCK_LOUTR
DOCK_LOUTL
DOCK_LOUTR
DOCK_LOUT_L
DOCK_LOUT_R
SENSEA
SENSEB
MIC_INL
DOCKMIC DOCK_MICR
DOCK_MICR
SENSEB
EAPD
CD_AGND <31>
GNDA <40,42,46>
SPDIFO <42,46>
SB_SPKR <29>PCM_SPK<32>
DIB_DATAN<39>DIB_DATAP<39>
PWRCLKP<39>PWRCLKN<39>
ACZ_SDOUT<28>ACZ_SDIN0<28>
ACZ_RST#<28,44>
ACZ_BITCLK<28>ACZ_SYNC<28> CDROM_R <31>
CDROM_L <31>
LINE_OUTL <40>LINE_OUTR <40>
DOCK_LOUT_R <46>
DOCK_LOUT_L <46>HP_DET# <40>
MIC_R <42>MIC_L <42>
DOCK_MIC <46>
MIC_DET <42>
JACK_DET# <46>
MUTE_LED <42,46>
MONO_INR <40>
+VDDA_CODEC
+5VS
+3VAMP_CODEC
+CODEC_REFF
+VDDA_CODEC
+3VAMP_CODEC
+3VALW
+3VDD_CODEC
+CODEC_REFF+CODEC_REFC
+CODEC_REFC
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
AMOM_codecCustom
38 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
GNDAGND
W=40Mil 250mA (3.33V)
For Layout:
Place decoupling caps near thepower pins of SmartAMCdevice.
0
NC 0
NC NC
OFF
OFF
PORT-BPORT-AJACK_DET#HP_DET#
OFFON00
NC OFF
EQ
Disable
Disable
Disable
Enable
ON
ON
ON
NC
0
MIC_DET
ON
ON
OFF
OFF
PORT-C PORT-F
C52
60.
1U_0
402_
16V4
Z
1
2
R3882.2K_0402_5%
1 2
C56
90.
1U_0
402_
16V4
Z
1
2
R37
96.
8K_0
402_
5%
12
C540 10U_0805_10V4Z
1 2
R377 6.8K_0402_5%@1 2
C5331U_0603_10V4Z
1
2
C54
60.
1U_0
402_
16V4
Z
1
2
R15210K_0402_5%
12
R420 0_0402_5% 1 2
R405
5.1K_0402_5% 1 2
R417 0_0402_5% 1 2
R4040_0805_5%
1 2
R4095.1K_0402_5% 1 2
R4101.5K_0402_5%
12
C56
20.
1U_0
402_
16V4
Z
1
2C54
80.
1U_0
402_
16V4
Z
1
2
R421 33_0402_5% 1 2
C56
40.
1U_0
402_
16V4
Z
1
2
R385
10K_0402_5%
12
R3862.2K_0402_5%
12
C50
410
U_0
805_
10V4
Z
1
2
C571150P_0402_50V8J
1
2
Q28
MMBT3904_SOT23
2
31
U26
SI9182DH-AD_MSOP8
VIN4
SD8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR7 CNOISE 1
DELAY2
R375 6.8K_0402_5%@1 2
R415
10K_0402_5% 1 2
C5631U_0603_10V4Z
1 2
C5160.1U_0402_16V4Z @
1 2
R416560_0402_5%
1 2
R418 0_0402_5% 1 2
C5190_0402_5%@
1 2
R3842K_0402_5%
12
C570150P_0402_50V8J
1
2
R40327K_0603_1%
12
R380
18K_0402_5%
12
R419 0_0402_5% 1 2
C535 2.2U_0603_6.3V4Z
12
C55
91U
_060
3_10
V4Z
1
2
R158 33_0402_5% 1 2
R354
1K_0402_5%
12
C536 2.2U_0603_6.3V4Z
12
R414
20K_0402_5% 1 2
R151 33_0402_5% 1 2
R3000_1206_5% @
1 2
+C520
150U_D2_6.3VM
1 2
R39247K_0603_1%
1 2
C5020.1U_0402_16V4Z@
1 2
R40810K_0402_1%
12
C54
71U
_060
3_10
V4Z
1
2
R407 33_0402_5% 1 2
C56
60.
1U_0
402_
16V4
Z
1
2
C56
70.
1U_0
402_
16V4
Z
1
2
R376 0_0402_5%
1 2
R14910K_0402_5%
12
C56
80.
1U_0
402_
16V4
Z
1
2
Q29MMBT3904_SOT23
2
31
R591100_0402_5%
12
R355
33_0805_5%
1 2
R357
1K_0402_5%
12
C54
90.
1U_0
402_
16V4
Z
1
2
C5380.1U_0402_16V4Z@
1
2C565
0.01U_0402_16V7K
1
2
R4230_1206_5%
1 2
R3930_0402_5%
12
+C521
150U_D2_6.3VM
1 2
U27
CX20551-22_TQFP48
DVD
D1
1D
VSS1
2
DVD
D3
12D
VSS3
46
SDO7
BCLK13
DVS
S25
SDI8
DVD
D2
9
SYNC10
RST#11
PCBEEP43
VSU
B6
VDD
CK
14
XTALIN15XTALOUT16
VSSC
K17
VREF19VC18
MICBIAS_F 20MICBIAS_C 21MICBIAS_B 22
VREF_FILT23
AVSS
124
AVD
D1
25
MIC_R 26MIC_L 27
CD_R 30CD_GND 29CD_L 28
PORT-C_R 33PORT-C_L 34
PORT-D_R 31PORT-D_L 32
AVD
D2
35AV
SS2
36
PORT-B_L 38PORT-B_R 37
PORT-A_L 40PORT-A_R 39
SENSEB 42SENSEA 41
DIBP48 DIBN47
PWRCLKP3PWRCLKN4
EAPD 45SPDIF_OUT 44
R3872.2K_0402_5%
12
R4010_0805_5%
1 2
G
D
S Q472N7002_SOT23
2
13
R37
86.
8K_0
402_
5%
12
C541
10U_0805_10V4Z
1 2
R422560_0402_5% 1 2
C539 10U_0805_10V4Z
1 2
R38
1 0_04
02_5
%
12
R356
33_0805_5%
1 2
R4110_0402_5%
1 2
C56
010
U_0
805_
10V4
Z
1
2
C534 2.2U_0603_6.3V4Z
12
Vref_LSD
BR908_AC1
BR908_CC
MOD_RINGRING_2
EIC
RXI-1
DIB_P1
BRIDGE_CCVZ
TXF
EIF
TIP_2
PCLK
CLK
PWR+
CLK2
DIB_P2
DIB_N2DIB_N1
Vc_LSD
RAC1
TAC1
TIP_2
RBias
EIO
TXO
RAC1/RING
RXI
TRDC
TAC1/TIP
MOD_TIP
DIB_DATAP<38>
DIB_DATAN<38>
PWRCLKN<38>
PWRCLKP<38>
DGND_LSD
VDD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSDDGND_LSD AGND_LSD
VDD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
GND
GND
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
AMOM_modemCustom
39 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Check 0.047u or 10p cap
C906 and C908 must be Y3 typeCapacitors for NordicCountries only
Use 59K_0402_1% for MR954
MBR908ABAV99DW-7_SOT363
126
EB
CMQ902PMBTA42_SOT23
2
31
MTP721
MTP22
1
MTP52
1
MR908348K_0805_1%1 2
MTP27
1
MTP711
MJ1B
HEADER8@
1 12 23 34 45 56 67 78 8
MR92827_0805_5%
12
MTP651
MBR906MMBD3004S_SOT23
231
MR9021M_0805_5%
1 2
MR9041M_0805_5%
12
MR9220_0402_5%
1 2
MC944
0.1U_0402_10V6K
1
2
MFB904
MMZ1608D301BT_06031 2
MJ1
HEADER8@
1 12 23 34 45 56 67 78 8
MTP661
MTP351
MC910
0.047U_1206_100V7K1 2
MC9700.1U_0402_10V6K
1
2
MTP341
MTP371
MC9020.033U_1206_100V7K1 2
MTP30
1MQ904
FZT458TA_SOT223
3
1
2 4
MTP691
MTP40 1
MC908470P_1808_3KV
1
2
MTP361
MTP25
1
MTP26
1
MTP581
MC92610P_0402_50V8J
1 2
MC9040.033U_1206_100V7K1 2
MTP62
1
MTP63
1
MTP61 1
MTP73
1
MTP321
MTP641
MTP391
MC958
0.015U_0603_25V7K
1 2
MC928
0.1U_0402_10V6K
1
2
MR906 6.8M_0805_5%1 2
MR95459K_0402_1%
1 2
SECPRI
MT902
30U_82154R_1%_1:1.67
2 3
41
MTP331
MTP59
1
MR910237K_0805_1%
1 2
MTP421
MFB906
MMZ1608D301BT_06031 2
MTP491
MC9780.1U_0402_10V6K
1 2
MTP681
MTP381
MTP701
MC96247P_0603_50V8J
1
2
EB
CMQ906PMBTA42_SOT23
2
31MC974
0.001U_0402_50V7M@
1
2
MR9240_0402_5%
1 2
MTP23
1
MC922 10P_1808_3KV1 2
MTP29
1
MBR908BBAV99DW-7_SOT363
453
MTP28
1
MC9180.1U_0603_16V7K
1
2
MFB902
MMZ1608D301BT_06031 2
MC9302.2U_0805_10V6K
1
2
MU902
CX20493-58_QFN28
DV
dd24
TRDC 12
RXI 9
EIC 11
VRef4
Vc3
RAC1 21
TAC1 20
RBias 5
VZ 10
TXF 13
TXO 14
EIO 17
EIF 16
DG
nd23
AGnd
6AV
dd2
CLK26
DIB_P27
DIB_N28
PWR+7
GPIO1 1
DC
_GN
D15
RAC2 19
TAC2 18
NC325 NC222 NC18
PADDLE29
MR93215K_0402_5%
1 2
MR
V902TB3100M
-13-01_SMB
11
22
MTP411
MTP671
MR938110_0603_5%
12
MJ2
E&T_3800-0212
SECPRI
MT922
30U_82154R_1%_1:1.67@
2 3
41
MBR904MMBD3004S_SOT23
231
MTP31
1
MC976
0.001U_0402_50V7M
1
2
MTP60
1
MC924 10P_1808_3KV1 2
MC906470P_1808_3KV
1
2
MTP24
1
MC9401U_0603_6.3V6M
1
2
MC9660.01U_0805_100V7M
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LINE_C_OUTL
SPKR+
HP_C_OUTR
HP_C_OUTL
SPKR-SPKL+SPKL-
LINE_C_OUTR
SPKR+SPKL-
SPKR-
SPKL+
HP_DET
HPDET#
HP_DET
LINE_OUTR<38>
EC_MUTE#<44>
LINE_OUTL<38>
SPKL+ <42>
SPKR+ <42>
HP_DET#<38>
HPDET# <42>
PCBEEP<29>
MONO_INR<38>
+5VS
+5VS+5VAMP
+5V+5VS
+5V
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
AMP & Audio JackCustom
40 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
SE/BTL#
0
0
0
0
1X X 4.1 dB
HEADPHONE OUT/LINE OUT
Av(inv)
1
GAIN1
1
Gain Settings
1 0
GAIN0
0
0 6 dB0
1
21.6 dB
15.6 dB
* 10 dB
10 dB
C49
847
P_04
02_5
0V8J
@
1
2
C475 0.047U_0603_16V7K 1 2
R3220_1206_5%
1 2
U21
TPA0312PWPRG4_TSSOP24
PVD
D1
7PV
DD
218
RLINEIN23
RHPIN20
PC-BEEP14
SHUTDOWN#22
VDD
19G
ND
424
GN
D3
13
ROUT+ 21ROUT- 16RIN8
GN
D2
12G
ND
11
LOUT+ 4LOUT- 9
SE/BTL# 15
HP/LINE# 17
LIN10
LHPIN6
LLINEIN5
BYPASS 11
GAIN0 2GAIN1 3
R364100K_0402_5%
12
C49
647
P_04
02_5
0V8J
@
1
2
R35310K_0402_5%
12
C477 0.47U_0603_16V7K 1 2
R373100K_0402_5%
@
12
C5110.1U_0402_16V4Z
1
2
C508 0.47U_0603_16V7K 1 2
JP11
ACES_85205-0400
11223344
R368100K_0402_5% @
12
C49
747
P_04
02_5
0V8J
@
1
2
U45
PI5A4599ACEX
IN1V+2GND3 NC 4COM 5NO 6
C510 0.47U_0603_16V7K 1 2R371
100K_0402_5%
12C507 0.047U_0603_16V7K
1 2
C501
0.1U_0402_16V4Z
1
2
C509 0.47U_0603_16V7K 1 2
R34510K_0402_5%
12
U4474AHCT1G125GW_SOT353-5
A 2Y4 OE#
1
G3
P5
C49
947
P_04
02_5
0V8J
@
1
2
C476 0.47U_0603_16V7K 1 2
C785
0.1U_0402_16V4Z
1 2
C479
0.1U_0402_16V4Z
1
2
C46210U_0805_10V4Z
1
2
G
D
S
Q13
2N7002_SOT23
2
13
USB20_P6USB20_N6
+3V_BT
WIRELESS_LED_BT
BT_DET#
USB_OC#0
USB_OC#3
USBP0+
USBP3+ USBP0-
USBP3-
USBP0+USB20_P0USBP0-USB20_N0
USBP3+ USB20_P3USBP3- USB20_N3
BT_ON#<29>
BT_DET#<29>
USB_OC#0 <29>
USB20_N6<29>USB20_P6<29>
USB_OC#3 <29>
BT_PRIORITY<37>
USB20_P0<29>USB20_N0<29>
USB20_P3 <29>USB20_N3 <29>
WIRELESS_LED_BT<37>WL_PRIORITY<37>
+3VALW
+USB_VCCB+5V
+USB_VCCB
+USB_VCCB +USB_VCCB
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Bluetooth & USB CONN.Custom
41 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
BT CONNECTOR
USB CONNECTOR (Left side)
W=40mils W=40mils
C39
40.
1U_0
402_
16V4
Z
1
2
U9
IP4220CZ6_SO6@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
R537 0_0603_5% 1 2 R532 0_0603_5% 1 2
G
DS
Q2AO3419_SOT23
2
13
R542
10K_0402_5%
12
U38
RT9701PBL_SOT25
VIN3VIN/CE4 VOUT 1
VOUT 5
GND2
+
C78
915
0U_D
_6.3
VM
@
1
2
C754
0.1U_0402_16V4Z
12
JP26
SUYIN_020122MR008S573ZR
11223344
5 56 67 78 8
GND9GND10GND11GND12
R601 100_0402_5% 1 2
C1081U_0603_10V4Z
1 2
R541100K_0402_5%
12
+
C40
810
0U_D
2_10
VM
1
2
R5430_0402_5% 1 2
C40
10.
1U_0
402_
16V4
Z
1
2 C39
710
00P_
0402
_50V
7K
1
2
C1181U_0603_10V4Z
1
2
C6110.1U_0402_16V4Z
1
2
R54420K_0402_5%
12
C40
010
00P_
0402
_50V
7K
1
2
+
C73
610
0U_6
.3V_
M@
1
2
R535 0_0603_5% 1 2 R523 0_0603_5% 1 2
C8080.1U_0402_16V4Z@
1
2
JP6
ACES_87213-0800
11
33
5566
44
22
7788
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO[0..16]
ON/OFF#
EC_ON
PCI_RST#
LPC_AD0
LPC_AD3
LPC_DRQ#0LPC_FRAME#
LPC_AD2LPC_AD1
SIRQ
KSI[0..7]
KSI4
KSI7
KSO1KSI0
KSO6
KSO0
KSO7
KSI3
KSI1
KSO12KSO3
KSI6
KSO4
KSO13
KSO2
KSO5
KSO8
KSO9
KSO11
KSO15
KSO14
KSO10
KSI5
KSI2
KSO6KSO5
KSO4
KSO3
KSO2KSO1
KSI4
KSI5KSI1
KSI3KSI6
KSO15KSO_D_17
KSO12
KSO10
KSI2
KSO9
KSO14KSO13
KSO11
KSO7KSO8
KSO16
KSI7KSI0
KSO0
PWR_ACTIVE#
NUMLED#MUTE_LED
KSI4KSO_D_17
VOL_UP#VOL_DWN#
ON/OFFBTN#KSI0KSI1KSI3
LID_SW#
PR_LED_ALW
PA_LEDPR_LED
PA_LED_VSPR_LED_VS
TP_CLKTP_DATA
USB20_P4USB20_N4OVCUR#4USB_OC#4
WL_LED#
USB_OC#5
USB20_N5USB20_P5
MIC_L
SPKR+SPKL+
MIC_DETHPDET#
MIC_R
NUMLED#
PA_LED_ALW
ON/OFFBTN#
WL_LED#
PWR_ACTIVE#PA_LED_ALW
MUTE_LEDLID_SW#
PR_LEDPA_LED_VSPR_LED_VS
SPDIFO_R
KSI1
KSI7 KSI6
KSO9
KSI4
KSO1
KSI0
KSO6 KSO0
KSO7
KSI3
KSO12
KSO3
KSO4
KSO13
KSO2
KSO5
KSO8
KSO11
KSO15KSO14
KSO10
KSI5 KSI2
KSO_D_17
KSO16
KSI0
KSI1
KSI3
KSI4
KSO_D_17
CIR_IN
VOL_DWN#
VOL_UP#
PA_LEDPR_LED_ALW
KSO[0..16] <44>
EC_PWR_ON# <48>
EC_ON<44,50>
ON/OFF# <44>
PCI_RST# <27,32,33,36,44>LPC_DRQ#0 <28>
LPC_AD[0..3] <28,44>
CLK_PCI_SIO <15>
CIR_IN<44,46>
KSI[0..7] <44>
KSO_D_17<44>
PWR_ACTIVE#<44>
NUMLED#<44>MUTE_LED<38,46>
KSI0<44>KSI1<44>KSI3<44>KSI4<44>
VOL_UP#<44>VOL_DWN#<44>
LID_SW#<44>
PR_LED_ALW<43>
PA_LED<43>PR_LED<43>
PA_LED_VS<43>PR_LED_VS<43>
TP_DATA<44>TP_CLK<44>
USB20_P4<29>
USB_OC#4<29>USB20_N4<29>
SIRQ <29,32,44>
LPC_FRAME# <28,44>
WL_LED#<16,37>
USB_OC#5<29>
USB20_N5<29>USB20_P5<29>
MIC_L<38>
SPKL+<40>SPKR+<40>
MIC_DET<38>HPDET#<40>
MIC_R<38>PA_LED_ALW<43,44>
SPDIFO<38,46>
LDO3
LDO3
+3VS
LDO5
+5VS
+5VALW
+5V
+5V
+5V
+5V
+5VALW +5VS
+5VS
+3VALW
LDO3
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
KBD,ON/OFF,T/P,LED/B,DEBUGCustom
42 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
INT_KBD CONN.( TYPE "D" KB)
Power BTN
WHEN R=33K,Vbe=0.8VWHEN R=0,Vbe=1.35V
FOR LPC SIO DEBUG PORT
Consumer IR
15.4 ( TYPE "C" KB)
TP to MB CONN(15.4)
Audio board connSwitch board conn
ESD
ESD
D39
NZQA5V6AXV5T1_SOT533-5
2
1 5
43
JP4
ACES_85201-2605CONN@
11 22 33 44 55 66 77 88 99 1010 1111 1212 1313 1414 1515 1616 1717 1818 1919 2020 2121 2222 2323 2424 2525 2626
C815 0.1U_0402_16V4Z 1 2
R603
0_0402_5%
12
Q26DTC124EK_SC59
O1
G3
I2
R3834.7K_0402_5%
12
R61210K_0402_5%
1 2
D42
NZQA5V6AXV5T1_SOT533-5
2
1 5
43
C816 0.1U_0402_16V4Z 1 2
R42410K_0402_5%@
12
D12
RLZ20A_LL34
12
C78410U_0805_10V4Z
CIR@ 1
2
JP8
ACES_85201-2405
123456789101112131415161718192021222324
C817 0.1U_0402_16V4Z 1 2
D44
NZQA5V6AXV5T1_SOT533-5
2
1 5
43
C822220P_0402_25V8K
1
2
C8090.1U_0402_16V4Z
1
2
G
D S
Q10
2N7002_SOT23
2
1 3
D38
NZQA5V6AXV5T1_SOT533-5
2
1 5
43
JP5
ACES_85201-2505
1122334455667788991010111112121313141415151616171718181919202021212222232324242525
C818 0.1U_0402_16V4Z 1 2
C813 0.1U_0402_16V4Z 1 2
JP7ACES_87152-0807
12345678
R2740_0402_5%
12
C7830.1U_0402_10V6KCIR@
1
2
C819 0.1U_0402_16V4Z 1 2
C795 100P_0402_50V8J 1 2
JP15
ACES_85201-2005
1 12 23 34 45 56 67 78 89 9
10 1011 1112 1213 1314 14
16 1617 1718 18
15 15
20 2019 19
R569100_0402_5%CIR@
12
D47
SM05_SOT23
2
31
C814 0.1U_0402_16V4Z 1 2
D41
NZQA5V6AXV5T1_SOT533-5
2
1 5
43
D11DAN202U_SC70
1
3
2
D40
NZQA5V6AXV5T1_SOT533-5
2
1 5
43
L32
FBMA-L10-201209-301LMT 1 2
C796 100P_0402_50V8J 1 2
C44
20.
1U_0
402_
10V6
K
@
1
2
JP9
ACES_87213-2000
11223344556677889910101111121213131414151516161717181819192020
G
D
SQ25
2N7002_SOT23@
2
13
C810 0.1U_0402_16V4Z 1 2
C820 0.1U_0402_16V4Z 1 2
D43
NZQA5V6AXV5T1_SOT533-5
2
1 5
43
C544
1000P_0402_50V7K
1
2
U43
TSOP36236TR_4P
CIR@
OUT4 Vs3 GND 1GND 2
R6040_0402_5%@
12
R396 100K_0402_5%
1 2
D45
NUP5120X6T1_SOT563-6
2
1 6
43
5
C821 0.1U_0402_16V4Z 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAPSLED# CAPSLED# PR_LED_VSPA_LED_VS
PMLED_1#
BATLED_0#
IDE_ACT_LED#
PMLED_1#
BATLED_0#
CARD_LED
PA_LED_VS
IDE_LED#
ACT_LED#
CAPSLED# PA_LED_VS
PR_LED_VS
IDE_ACT_LED#
PMLED_1#<44>
BATLED_0#<44>
CAPSLED#<44>
CARD_LED<32>
PR_LED <42>PA_LED <42>
PA_LED_ALW <42,44>PR_LED_ALW <42>
IDE_LED#<28>
ACT_LED#<31>PA_LED_VS <42>
PR_LED_VS <42>
+3VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
INDICATE LEDCustom
43 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
FOR POWER BUTTON BACKLIGHT SYSTEM POWER FOR POWER BUTTON BACKLIGHT SYSTEM POWER
For PA For PR
"Right Angle""Vertical"
D6
HT-170NBQA_0805D@
21
U48
SN74AHCT1G08DCKR_SC70
A1O 4
P5
G3
B2
R427560_0402_5%PRLED@1 2
R92560_0402_5%PRLED@1 2
D15
12-21UYOC/S530-A2/TR8_YEL15.4@
21
3
D23
HT-170NBQA_0805
21R425560_0402_5%PRLED@1 2
R76470_0402_5%PALED@1 2
R547560_0402_5% 15.4@
12
R571220_0402_5%PALED@1 2
R572220_0402_5%PALED@
12
R5501K_0402_5%
12
D7
17-21UYOC/S530-A2/TR8_ORG15.4@
21
D4
HT-170NBQA_080515.4@
21
D2017-21UYOC/S530-A2/TR8_ORG
15.4@
21
R56810K_0402_5%
12
R573220_0402_5%PALED@1 2
Q39
MMBT3904_SOT23
2
31
C830
0.1U_0402_16V4Z
1
2
D14
12-21UYOC/S530-A2/TR8_YEL15.4@
21
3
R57020K_0402_5%
12
D25
HT-170NBQA_0805
21
R548330_0402_5%
12
D13
12-21UYOC/S530-A2/TR8_YEL15.4@
21
3
R86470_0402_5%D@1 2
D21HT-110NBQA_0805
21
D24
HT-170NBQA_0805
21
R426560_0402_5%PRLED@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_VOL_UP#
UTXD
PCI_RST#
EC_SMC_1
EC_SMD_1
FRD#
EC_SMI#
FSEL#
PWR_ACTIVE#
ECAGND
SLP_S4#
TP_DATA
ADB1
TP_CLK
ADB0
ADB5ADB6
ADB3
ADB7
KBA7
KBA3
KBA1
ADB4
ADB2
KBA2
KBA4
KBA6
KBA0
KBA5
KBA9KBA10KBA11
KBA15
KBA13KBA14
KBA8
KBA17KBA16
KBA18
KBA12
KBA19
FRD#FWR#
EC_ONACINEC_THERM#
FSTCHG
BATT_TEMP
ON/OFF#
ADB[0..7]
KBA[0..19]
BATT_OVP
DAC_BRIGEN_FAN1
ACOFF
INVT_PWM
IREF
FAN_SPEED1
VR_ON
FSEL#
CONA#
LPC_AD0LPC_AD1
GATEA20
LPC_AD2
KB_RST#
LPC_AD3
SIRQLPC_FRAME#
CLK_PCI_EC
KSI3
KSI0KSI1
KSI5KSI6
KSI2
EC_SMD_1
KSO16
KSI7
KSI4
LID_SW#
EC_SMC_2
EC_SMC_1
EC_SMD_2
EC_SMI#
EC_RSMRST#
C RY2
PCI_PME#
SLP_S3#
SUSP#PWRBTN_OUT#
C RY1
SYSON
NUMLED#
CAPSLED#
BATLED_0#
BKOFF#
SLP_S5#
PMLED_1#
EC_SCI#
LID_OUT#
CLK_PCI_EC
DOCK_VOL_UP#
DOCK_VOL_DWN#
VOL_UP#
VOL_DWN#
KSO1
KSO[0..16]
KSO10
KSO8
KSO3
KSO6
KSO4
KSO9
KSO5
KSO0
KSO7
KSO2
KSO11
KSI[0..7]
KSO12KSO13KSO14KSO15
VOL_UP#
DOCK_VOL_DWN#
PGD_IN
KSO_D_17
BID
VOL_DWN#
C RY1C RY2
EC_RST#
UTXD
ADP_IR
TP_DATA
TP_CLK
ICH_POK
CIR_INEC_MUTE#
EXPCRD_RST#
NV_ENBKL
EC_SCI#
LAN_RST#
EC_SMD_2
EC_SMC_2
PA_PR#DET
PA_PR#DET
NV_ENBKL
CPUSB#
LID_SW#
GM_PM#DET
GM_PM#DET
AIR_ACIN
BID
GATEA20<28>
LPC_AD0<28,42>
KB_RST#<28>
LPC_FRAME#<28,42>SIRQ<29,32,42>
CLK_PCI_EC<15>
LPC_AD3<28,42>LPC_AD2<28,42>LPC_AD1<28,42>
KSO[0..16]<42>
EC_SCI#<29>
PCI_RST#<27,32,33,36,42>
EC_SMD_2<4>
EC_SMD_1<45,56>EC_SMC_1<45,56>
EC_SMC_2<4>
LID_SW#<42>
BKOFF#<16>
SLP_S5#<29>EC_SMI#<29>
SUSP#<34,45,47,51,52,54>
SLP_S3#<29>
PCI_PME#<27,32>PWRBTN_OUT#<29>
SYSON<34,47,51>
EC_RSMRST#<29>
LID_OUT#<29>
NUMLED#<42>
CAPSLED#<43>
PMLED_1#<43>
BATLED_0#<43>
TP_DATA <42>TP_CLK <42>
FSEL# <45>
FRD# <45>FWR# <45>
EC_ON <42,50>ACIN <48,50>EC_THERM# <29>ON/OFF# <42>
FSTCHG <49>
BATT_TEMP <56>BATT_OVP <49>
DAC_BRIG <16>EN_FAN1 <4>IREF <49>
INVT_PWM <16>
ACOFF <49>FAN_SPEED1 <4>
VR_ON <53>
ADB[0..7] <45>
KBA[0..19] <45>
CONA# <46>
PWR_ACTIVE# <42>DOCK_VOL_UP# <46>
KSI[0..7]<42>
VOL_UP# <42>
DOCK_VOL_DWN# <46>
VOL_DWN# <42>
PGD_IN <53>
ADP_I <49>
ICH_POK <7,29>
EC_MUTE# <40>CIR_IN <42,46>
EXPCRD_RST# <34>
NV_ENBKL <18>
LAN_RST#<29>
KSO_D_17<42>
VGATE <29,53>
ACZ_RST# <28,38>
PA_LED_ALW<42,43>
CPUSB#<29,34>
SLP_S4#<29>
AIR_ACIN <49>
EC_RTCRESET <28>
+EC_AVCCLDO3
LDO3
LDO3
+3VS
LDO3
LDO5
+3VALW
+5V
LDO3
+EC_AVCC
+3VALW
+5VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
EC KB910L(LPC)Custom
44 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
EC DEBUG port
2.2V(R325=1K,R333=2K): After PV type D KB(17")1.65V(R605=2K,R333=2K): After PV type C KB(15")
BID definition,High (3.3V): Before SI2 type D KB(17")Low (0V): Before SI2 type C KB(15")
C512200P_0603_50V7K~D@
1
2
C5250.1U_0402_16V4Z
1
2
R33510K_0402_5%
12
R34010K_0402_5%
12
R3251K_0402_5%D@
12
R39410K_0402_5%
12
R39010K_0402_5%
12
R39710K_0402_5%@
12
R39910_0402_5% @
12
C55615P_0402_50V8J@
1
2
R5802K_0402_5%
12
R33210K_0402_5%
1 2
R3332K_0402_5%
12
R37210K_0402_5%
1 2
R33710K_0402_5%
12
Y7
32.768KHZ_12.5P_MC-146
14
23
C527
0.1U_0402_16V4Z
1
2
R33910K_0402_5%
12
R33610K_0402_5%
12
C52210P_0402_50V8K
1
2
R611
100K_0402_5% @
12
C512
0.1U_0402_16V4Z
1
2
R5791K_0402_5%1 2
R587100K_0402_5%G71@
12
U47
G696L263T1UF_SOT23-5@ R
ESET
1
VCC
2
GN
D3
N.C
.4
CD
5
R3270_0603_5%
12
R33110K_0402_5%
1 2
R382
47K_0402_5% 1 2
Host
PS2 interface
DA output or GPO
SM BUS
PWR
FAN/PWM
INTERFACE
key Matrixscan
AD INtput or GPI
AddressBUS
DataBUS
U24
KB910LQF_LQFP144
LPC AD0/LAD012 LPC AD1/LAD110 LPC AD2/LAD29 LPC AD3/LAD36
PM_CLKRUN#/ CLKRUN#44
LPC_FRAME# / LFRAME#5 SERIRQ3
CLK_PCI_EC/PCICLK14
BATT LOW LED#/ E51MR0101
VCC
/ EC
VC
C11
VCC
/ EC
VC
C26
VCC
127
VCC
141
EC_A
VCC
/ AV
CC
75
KSI0/GPIO3063KSI1/GPIO3164KSI2/GPI03265KSI3/GPIO3366KSI4/GPIO3467KSI5/GPI03568KSI6/GPIO3669KSI7/GPIO3770
KSO0/GPIO2047KSO1/GPIO2148KSO2/GPIO2249KSO3/GPIO2350KSO4/GPIO2451KSO5/GPIO2552KSO6/GPIO2653KSO7/GPIO2754KSO8/GPIO2855KSO9/GPIO2956KSO10/GPIO2A57KSO11/GPIO2B58KSO12/GPIO2C59KSO13/GPIO2D60KSO14/GPIO2E61KSO15/GPIO2F62
KBRST#/GPIO01/KBRST#2
PM SLP S3#/GPIO048 BKOFF#/GPIO037
PM SLP S05#/ GPIO0717
PSCLK1 91PSDAT1 92PSCLK2 93PSDAT2 94PSCLK3 95PSDAT3 96
LID SW#/ GPIO0A20SUSP#/GPIO0B21
XCLKO140XCLKI138
BATTEMP/AD0/GPIO38 71BATT OVP/AD1/GPIO39 72
ADP_I/AD2/GPIO3A 73AD BID0/AD3/GPIO3B 74
DAC_BRIG/DA0/GPIO3D 76EN DFAN1/DA1/GPIO3D 78
IREF2/DA2 79EN DFAN2/DA3/ GPIO3F 80
INVT_PWM/GPIO0F/PWM1 25BEEP#/GPIO10/PWM2 27
GPIO57/GPIO57 137
EC SMC1/GPIO44/SCL185
GPIO58/GPIO58 142GPIO59/GPIO59 143
EC SMC2/GPIO46/SCL287 EC SMD2/ GPIO47/SDA288
FAN SPEED1/GPIO14/FANFB1 32
FSEL#/SELMEM# 144
FAN SPEED2/GPIO15/FANFB2 33
GN
D13
GN
D28
GN
D39
GN
D10
3
EC RST#/ ECRST#42
AC IN/ GPIO1C 43
PCMRST#/GPIO1E 45WL OFF#/GPIO1F 46PBTN_OUT#/GPIO0C22
ONOFF/GPIO18 36
FRD#/RD# 135FWR#/WR# 136
BATT CHGI LED#/ E51CS#99
CAPS LED#/ E51TMR1100
EC ON/ GPIO1B 41
ACOFF/GPIO18/PWM4 31
ARROW LED#/ E51 INT0102
OUT BEEP/GPIO12/PWM3 30
ADB0/D0 125ADB1/D1 126ADB2/D2 128
ADB3/ D3 130ADB4/D4 131
KBA0/A0 111KBA1/A1 112KBA2/A2 113KBA3/A3 114KBA4/A4 115
KBA13/A13 124KBA12/A12 123
KBA5/A5 116KBA6/A6 117KBA7/A7 118
KBA11/A11 122KBA10/A10 121
KBA14/A14 110KBA15/A15 109KBA16/A16 108KBA17/A17 107KBA18/A18 106KBA19/A19 98
KBA8/A8 119KBA9/A9 120
GA20/ GPIO00/GA201
VCC
/ EC
VC
C37
VCC
/ EC
VC
C10
5
AGN
D77
GN
D12
9G
ND
139
PCIRST#15
EC URXD/KSO16/GPIO4889EC UTXD/KSO17/GPIO4990
ADB5/D5 132ADB6/D6 133ADB7/D7 134
EC_RSMRST#/ GPIO024
EC LID OUT#/GPIO0616
EC SMI#/GPIO0818EC SWI#/GPIO0919
EC PME#/GPIO0D23
ECTHERM#/GPIO11 29
SYSON/GPIO56/ E51 INT1104
ALI/MH#/GPIO40 81FSTCHG/GPIO41 82
VR ON/ GPIO42 83
SELIO2#/ GPIO43 84
EC SMD1/GPIO44/SDA186
SELIO#/ GPIO50 97
PWRLED#/ GPIO1938
PCM_SPK#/EMAIL_LED#/ GPIO1634SB_SPKR/PWR_SUSP_LED#/ GPIO1735
NUMLED#/ GPIO1A40
EC SCI#/SCI#/GPIO0E24
C550
0.1U_0402_16V4Z
1
2
C4724.7U_0805_6.3V6K
1
2
R33810K_0402_5%
12
C551
0.01U_0402_16V7K
1
2
R33010K_0402_5%
1 2
R326
0_0603_5% 12
C51710P_0402_50V8K
1
2
C4630.22U_0603_10V7K
1
2
JP20
ACES_85205-0400
1 12 23 34 4
J1
JOPEN
12
C474
0.1U_0402_16V4Z
1 2
R365 0_0402_5% 12
R6052K_0402_5% C@
12
R581100K_0402_5%
12
R40010K_0402_5%@
12
R40210K_0402_5%
1 2
R58610K_0402_5%UMA@1 2
R58510K_0402_5%@
12
KBA[0..19]
ADB[0..7]
ADB3ADB2
KBA19
RESET#
KBA13
KBA9
ADB4
KBA0
ADB6
KBA15
FSEL#KBA2
KBA6
ADB7
ADB5
FRD#KBA4
KBA10KBA11
KBA5
KBA7
KBA1
KBA12
ADB1
KBA18
KBA16
KBA8FWR#
KBA3
KBA17
KBA14
ADB0
KBA17
ADB7
KBA2
KBA18
ADB4
ADB0
KBA12
KBA10
RESET#
KBA7
ADB6
KBA16
FSEL#
ADB3
KBA15
FWE#
KBA14
ADB1
KBA19
KBA3KBA4
KBA9
KBA6
ADB5
KBA5
KBA0
KBA13
KBA8
ADB2
KBA1
KBA11
FRD#
FWE#
FWR#
SUSP#
EC_FLASH#
EC_SMC_1<44,56>
ADB[0..7]<44>
EC_SMD_1<44,56>
KBA[0..19]<44>
FSEL#<44>FRD#<44>
FWR# <44>
SUSP# <34,44,47,51,52,54>
EC_FLASH# <29>
+3VALW+3VALWLDO3
LDO3
LDO3
LDO3
LDO3
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
BIOS & EC I/O PortCustom
45 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
C5310.1U_0402_16V4Z
1
2 U22
AT24C16AN-10SI-2.7_SO8
A0 1A1 2
SDA5 SCL6
VCC8
A2 3GND 4
WP7
R6100_0402_5%
1 2
C437
0.1U_0402_16V4Z
1
2
R60910K_0402_5%@
12
U14
SST39VF080-70_TSOP40
A021A120A219A318A417A516A615A714A88A97A1036A116A125A134A143A152A161
A1813
CE#22OE#24
D0 25D1 26D2 27D3 28D4 32D5 33D6 34D7 35
GND1 39
A1740
WE#9
VCC1 30VCC0 31
GND0 23
A1937
NC0 29NC1 38
NC 11RP# 10
READY/BUSY# 12
R366100K_0402_5%
12
R367100K_0402_5%
12
R370100K_0402_5%
1 2
G
D S
Q53 2N7002_SOT23@2
1 3U46
SN74AHC1G32DCKR_SC70-5 @
Y4 A 1
B 2
P5
G3
JP12
SUYIN-80065A-040G2T
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
C8290.1U_0402_16V4Z @
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DOCK_PRESENT
DOCK_PRES_GND
DOCK_LOUT_L
XTPB1-
XTPA1+
V_Bat
MUTE_LED
CIR_IN
MDO0+
XTPA1-
JACK_DET#MDO1-MDO1+
DOCK_MIC
MDO0-
DOCK_PRES_GND
DOCK_PRESENT
XTPB1+
SPDIFO_L
DOCK_LOUT_R
USB20_N1USB20_P1
TVCOMPSTVLUMATVCRMA
CONA#<44>
MUTE_LED<38,42>
SPDIFO<38,42>
XTPB1+<32>
MDO0- <35>
DOCK_VOL_DWN# <44>CIR_IN <42,44>
DOCK_MIC <38>
V_Bat <48,49>
MDO1+<35>MDO1-<35> MDO0+ <35>
DOCK_VOL_UP# <44>
XTPA1+<32> DOCK_LOUT_R <38>DOCK_LOUT_L <38>
XTPB1-<32>
XTPA1-<32>
USB20_N1 <29>USB20_P1 <29>
JACK_DET#<38>
TVLUMA <17>TVCRMA <17>
TVCOMPS <17>
+5V
DOCKVINDOCK_VIN
+3VALW
+5VS
+5V +5V
DOCKVINDOCKVIN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
DOCK CONNCustom
46 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Tampa 2
EMI
need change to reverse type connector
C3180.1U_0402_16V4ZDOCK@
1
2
C6891000P_0402_50V7KDOCK@
1
2
C6441000P_0402_50V7K
@
1
2
R479 100_0402_5% DOCK@ 1 2
C6811000P_0402_50V7K
DOCK@
1
2
C33310U_0805_10V4Z
DOCK@
1
2
Q36MMBT3904_SOT23
DOCK@2
31
R47822_0402_5%
DOCK@
1 2
C2951000P_0402_50V7K@
1
2
L30KC FBM-L18-453215-900LMA90T_1812
DOCK@
1 2
C6471000P_0402_50V7K
DOCK@1
2
C6851000P_0402_50V7K
DOCK@
1
2
R491200_0402_5%
DOCK@
12
JP22
FOX_QL11293-H212CR-FR
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 5254 5456 5658 58
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151535355555757
GND 60GND59
R4951K_0402_5%DOCK@
12
R47110K_0402_5%
DOCK@
12
R480200_0402_5%
DOCK@
1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
I
I
J
J
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
SYSON#
SYSON#
SUSP
SYSON#
SUSONSUSPRUNON
SUSP SYSON# SUSP SUSP
SUSP
SUSP
RUNON
SUSP
SUSPRUNON
SUSP
SYSON<34,44,51>
SUSP#<34,44,45,51,52,54>
SUSP<52,55>
B+
+5V
B+
+5VALW
B+
+3VALW+3VS
+2.5VS +1.8V
+0.9VS
+1.5VS +VCCP
+VGA_CORE
B+
+5VALW +5VS
+1.8V+1.8VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
DC/DC CircuitCustom
47 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
+5VALW to +5V Transfer
+5VALW to +5VS Transfer
+3VALW to +3VS Transfer
+1.8V to +1.8VS Transfer
H18HOLEA
1
FM51
H13HOLEA
1
R137
470_0402_5%
12
H5HOLEA
1
H19HOLEA
1
R406
330K_0402_5%
12
CF12
1
G
D
S Q112N7002_SOT23
2
13
R398330K_0402_5%
12
R154
470_0402_5%G71@
12
C7550.01U_0402_16V7K
1
2
CF2
1
CF3
1
R347
470_0402_5%1
2
G
D
SQ162N7002_SOT23
2
13
H6HOLEA
1R346
470_0402_5%
12
H11HOLEA
1
R131
470_0402_5%
12
G
D
S Q32N7002_SOT23
2
13
C75810U_0805_10V4Z
1
2
H3HOLEA
1
C43810U_0805_10V4Z
1
2
C552
0.1U_0402_16V4Z
1
2
G
D
SQ212N7002_SOT23
2
13
U25
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
H17HOLEA
1
CF9
1
FM41
G
D
S Q172N7002_SOT23
2
13
R395
470_0402_5%
12
C459
10U_0805_10V4Z
1
2
CF13
1
R341
330K_0402_5%
12
FM31
G
D
S Q412N7002_SOT23
2
13
R306
470_0402_5%
12
C455
0.1U_0402_16V4Z
1
2
G
D
S Q372N7002_SOT23
2
13
CF7
1
H12HOLEA
1
H8HOLEA
1
C379
10U_0805_10V4ZG71@
1
2
CF11
1
FM11
H2HOLEA
1
FM61
H24HOLEA
1
G
D
S Q7
2N7002_SOT23G71@
2
13
H4HOLEA
1
U5
SI4800DY_SO8G71@
S 1S 2S 3G 4
D8D7D6D5
CF14
1
G
D
SQ5
2N7002_SOT23
2
13
FM21
G
D
S Q182N7002_SOT23
2
13
C373
10U_0805_10V4ZG71@
1
2
H20HOLEA
1
R549
470_0402_5%
12
H9HOLEA
1
C377
0.1U_0402_16V4ZG71@
1
2
R536
470_0402_5%
12
H10HOLEA
1
R522
470_0402_5%
12
CF6
1
C51510U_0805_10V4Z
1
2
R546
470_0402_5%
12
R68
470_0402_5%
12
C759
0.1U_0402_16V4Z
1
2R545330K_0402_5%
12
CF4
1
G
D
SQ40
2N7002_SOT23
2
13
C5570.01U_0402_16V7K
1
2
C56110U_0805_10V4Z
1
2
CF5
1
H22HOLEA
1
G
D
SQ272N7002_SOT23
2
13
CF1
1
H23HOLEA
1
H16HOLEA
1
H15HOLEA
1
U17
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
C76010U_0805_10V4Z
1
2
CF10
1
G
D
S Q42N7002_SOT23
2
13
H21HOLEA
1
CF8
1
G
D
S Q382N7002_SOT23
2
13
U39
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
H7HOLEA
1
H14HOLEA
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
N10
N12
PACIN
CHGRTCP
ADPIN
N8
N5
N6
N7
PACINN3
N2N1
ADPIN2
N13
N11
N4
N9
N58
ACIN <44,50>
PACIN <49>
MAINPWON<50,56>
ACON<49>
EC_PWR_ON#<42>
V_Bat <46,49>
+3VALW
+5VALW
+1.8VP
+3VALWP
+2.5VS
+VGA_COREP
+5VALWP
+2.5VSP
+1.8V+VGA_CORE
+1.2VS+1.2VSP
VIN
VL
B+
VINVIN
VS
VL
ADPIN
+5VALWP
RTCVREF
RTCVREF
VIN
BATT+
CHGRTC
B+
VS
+1.5VSP +1.5VS
VS
+1.05VSP +VCCP
+1.8VSP+1.8VS
+0.9VGAP +0.9VGA
+0.9VS+0.9VSP
DOCK_VIN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Custom
48 60Thursday, December 15, 2005
2005/03/22 2006/03/22
3.3V
18.234 17.841 17.44917.597 17.210 16.813
3.3V
Vin Detector : Titan
Detector/Precharge
DCIN / Precharge
Precharge detector
Precharge detector12.384 12.000 11.62410.927 10.600 10.223
ACIN: Altima
BATT
7.558 7.333 7.1126.108 5.933 5.704
14.698 14.285 13.87913.818 13.411 13.000
Vin Detector : Altima
Titan: PR5= 22K; PR6= 19.6KAltima:PR5= 47K; PR6= 27K
Precharge detector14.724 14.333 13.94513.280 12.933 12.531
ACIN: Titan
Titan: PR21= 200KAltima:PR21= 300K
PJP12JUMP_43X118@
11 2 2
PJP4JUMP_43X39@
1 122
PC
1410
00P_
0402
_50V
7K
12
PC71000P_0402_50V7K
12
PR14
22K_0603_1%
1 2
PR910K_0402_5%
12
PD31N4148_SOD80
12
PU2G920AT24U_SOT89
IN 2
GND
1
OUT3
PR2410K_0402_5% 12
PC
152
4.7U
_080
5_6.
3V6K
12
PJP1JUMP_43X118@
11 2 2
PC114.7U_0805_6.3V6K
12
PC
60.
047U
_060
3_50
V7K
12
PR21547_1206_5%
12
PR20510_0603_5%@
1 2
PR310K_0805_5%
12
PC
210
00P_
0402
_50V
7K
12
PC10
1U_0805_50V4Z
12
PC
130.
1U_0
603_
25V7
K
12
PR1147_1206_5%
12
PD41N4148_SOD80
12
PD6
RB751V_SOD323
12
+
PC
151
220U
_D2_
4VM
1
2
PR12
1K_1206_5%
1 2
PR
619
.6K
_060
3_0.
1%
12
PJP7JUMP_43X118@
11 2 2
EC31QS04PD31
12
PL1FBM-L18-453215-900LMA90T_1812
1 2
PR18280K_0603_1%
12
PJP11JUMP_43X118@
11 2 2
PR21200K_0603_1%
12
PC
90.
1U_0
603_
25V7
K
12
PJP10JUMP_43X118@
11 2 2
PR17
200_0603_5%
12
PR282.5K_0603_0.1%
12
PZD1RLZ4.3B_LL34
12
PC
5
0.01
U_0
402_
25V7
Z
12
G
D
SPQ2
2N7002_SOT23
2
13
PD27SBM1040-13_POWERMITE3@
12
3
PC
310
0P_0
402_
50V8
J
12
PR13100K_0603_1%
12
PR522K_0603_1%
1 2
PJP5JUMP_43X118@
11 2 2
PR
221.
5M_0
603_
1%
12
PD2
1N4148_SOD80
12
PQ3DTC115EUA_SC70
2
13
PR41K_0402_5%
1 2
PR710K_0402_5%
12
PU1BLM393M_SO8
+ 5
- 6O7
P8
G4
PQ1TP0610K-T1-E3_SOT23
2
13
1
2
3
4
PCN1ACES_88290-0400M
PR25647K_0603_1%
12
PJP6JUMP_43X118@
11 2 2
PJP13JUMP_43X118@
11 2 2
PJP8JUMP_43X118@
11 2 2
PJP2JUMP_43X118@
11 2 2
PR2347K_0402_5% 12
PR8
1K_1206_5%
1 2
PD5
RB751V_SOD323
12
PD1SBM1040-13_POWERMITE3@
12
3PR11M_0603_0.5%
1 2
PJP9JUMP_43X118@
11 2 2
PR1510K_0402_5% 1 2
PU1ALM393M_SO8
+3
-2 O 1
P8
G4
PJP27
JUMP_43X39@
1 122
PR161M_0603_0.5%
12
PR10
1K_1206_5%
1 2
PR19510_0603_5%@
1 2
PJP15JUMP_43X118@
11 2 2
PC
1210
00P_
0402
_50V
7K
12
PC
110
0P_0
402_
50V8
J
12
PC
80.
22U
_120
6_25
V7K
12
PJP14JUMP_43X118@
11 2 2
PC
410
00P_
0402
_50V
7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
N19
3887FB2
DIS
3887+INE1
3887FB3
3887+INE2
N15
PACIN
ACOFF#
N14
N22
3887CS
N26
ACON
3887-INE2
3887-INE1
N17
N16
3887VH
3887CS
3887FB1
3887RT
3887VCC
3887+INC1
3887OUT
3887OUTD
3887OUTC1
3887-INE3
N20
N24
3887CS
N23
N25
3887VREF
N21
ACOFF#
N64
N65
N18
ACOFF <44>
IREF<44>
BATT_OVP<44>FSTCHG<44>
ADP_I<44>
PACIN<48>
ACON<48>
AIR_ACIN<44>
V_Bat<46,48>
VIN
BATT+
P3
B+
B++
BATT++
+3VALWP
VS
VIN
P2
VIN
RTCVREF
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Custom
49 60Thursday, December 15, 2005
2005/03/22 2006/03/22
Charger
65W==>1.202V90W==>1.667V
65W Iadp=0~3.0A
CC=0.4~2.8A
IREF=0.438~3.069VIREF=1.096*Icharge
4.2V
(17V+-5%)
5.0V
Battery OVP voltage :
3S2P/3S4P : 13.5V--> BATT_OVP= 2.0V
(BAT_OVP=0.1112*VMB)4S2P : 18V--> BATT_OVP= 2.0V
(BAT_OVP=0.14753 *BATT+)BATT_Charge Voltage Select4S2P CV=16.8V PR45 = 49.9K_0603_0.1% PR46 =150K_0603_0.1%3S2P/3S4P CV=12.6V PR45 = 150K_0603_0.1% PR46=300K_0603_0.1%
ChargerBATT_OVP Select4S2P PR57 = 0_0603_5%3S2P/3S4P PR57 = 40.2K_0603_1%
90W Iadp=0~4.2A
65W PR34=31.6K90W PR34=20.0K
65W:1.40V(-1 level); 1.30V (+1 level)90W:2.05V(-1 levle); 1.83V (+1 level)
PR4549.9K_0603_0.1%
12
PR33150K_0402_1%
12
PR5310K_0603_5%
12
PQ7DTC115EUA_SC70
2
13
PC
240.
1U_0
402_
16V7
K
12
EC31QS04PD11
12
PR302.2_0603_5%
12
PR43
174K_0603_1%
1 2
PR356.8K_0402_1%
1 2
PR48
47K_0603_5%
12
PC
206
0.1U
_060
3_25
V7K
12
PR24847K_0402_5%
12
PU4BLM358A_SO8
+ 5
- 607
PQ11DTC115EUA_SC70
2
13
PU4ALM358A_SO8
+ 3
- 201
P8
G4
PQ5AO4407_SO8
3 65
78
2
4
1
PR5242.2K_0603_1%
12
PR44
100K_0603_1%
12
PR373K_0603_5%
1 2
PR3210K_0402_1%
12
PC
304.
7U_1
206_
25V6
K1
2
PR55105K_0603_0.5%
12
PC23
0.1U_0603_25V7K
1 2
EC31QS04PD10
12
PC330.01U_0402_25V7Z
12
PR3110K_0603_5%
12
PL215U_PLFC1045P-150A_3.7A_20%
1 2
PR49499K_0603_1%
12
PR46150K_0603_0.1%
12
PR
5622
K_04
02_5
%
12
PR570_0603_5%
12
PR381K_0603_1%
1 2
PC
310.
1U_0
402_
16V7
K
12
PR29
47K_0603_5%
1 2
PU3
MB3887_SSOP24
-INC21
OUTC22
+INE23
-INE24
+INC2 24
GND 23
CS 22
VCC(o) 21
FB25
VREF6
FB17
-INE18
+INE19
OUTC110
OUTD11
-INC112
OUT 20
VH 19
VCC 18
RT 17
-INE3 16
FB3 15
CTL 14
+INC1 13 PC
284.
7U_1
206_
25V6
K1
2
PR
2715
K_06
03_5
%
12
PC
220.
1U_0
402_
16V7
K
12
PC19 2200P_0402_50V7K
1 2
PC
170.
1U_0
603_
25V7
K
12
G
D
S
PQ10
2N7002_SOT23
2
13
PQ53DTC115EUA_SC70
2
13
PC200.1U_0603_25V7K
1 2
PR5410.2K_0603_1%1
2PR5010K_0603_5%
12
PR26
0.02_2512_1%
12
PQ9DTC115EUA_SC70 2
13
PR400.02_2512_1%
12
PC251500P_0402_50V7K
1 2
PZ
D2
RLZ
4.3B
_LL3
4
12
EC31QS04PD32
1 2
PR4110K_0603_1%
12
PQ6AO4407_SO8
365 7 8
2
4
1
PC26 0.1U_0603_25V7K1 2
PC
1822
00P_
0402
_50V
7K
12
G
D
S
PQ52
2N70
02_S
OT2
3
2
13
PQ4AO4407_SO8
3 65
78
2
4
1
PC212200P_0402_25V7K
1 2
PD91SS355_SOD323
1 2
PR47340K_0603_1%
12
PR
3610
K_04
02_1
%
12
PQ49AO4407_SO8
365
78
2
4
1
G
D
SPQ
82N
7002
_SO
T23
21
3
PC
154.
7U_1
206_
25V6
K
12
PR514.22K_0603_1% 12
PC
294.
7U_1
206_
25V6
K1
2
47K
47KPQ54DTA144EUA_SC70
2
13
PR
3431
.6K_
0603
_1%
12
PC
164.
7U_1
206_
25V6
K
12
PL18FBM-L18-453215-900LMA90T_1812
1 2
+
PC
209
100U
_25V
_M1
2
PR42
47K_0603_1%
1 2
PC271500P_0402_50V7K
1 2
PR39
68K_0603_5%
1 2
PC
320.
01U
_040
2_25
V7Z
12
PR
2820
0K_0
402_
5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FB5
2VREF_1999
BST5B BST3B
1999_SHDN
1999
_VC
C
2REF_1999
1999
_V+
DH3
ILIM5
ILIM3
DH3A
DL5
DH5
BST5A
BST3A
LX3
FB3
DL3
1999
_ON
DH5A
LX5
1999_PRO
LDO3P
N60
ACIN
1999_V++
1999_SKIP
ACIN
2REF_1999
MAINPWON<48,56>
ACIN<44,48>
EC_ON <42,44>
B+++
+3VALWP
VL
+5VALWP
B+
B+++
VS
1999_V+
2VREF_1999
VL
VL
LDO3
LDO5
LDO3P
+5VA
LWP
+3VALWP
P2
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Custom
50 60Thursday, December 15, 2005
2005/03/22 2006/03/22
+3.3VALWP/+5VALWP
+3V/+5VP
C18
54.
7U_1
206_
25V6
K
12
PC
191
0.1U
_060
3_25
V7K
12
PR
227
47K_
0402
_5%
12
PR22810K_0402_5%
12
PJP25
JUMP_43X118@
11
22
PC1931U_1206_25V7K@
12
PL1610U_LF919AS-100M-P3_4.5A_20%
12
PR2520_0805_5%@
1 2
PC1800.1U_0603_25V7K
12
PR2160_0402_5%
1 2
PR
251
0_08
05_5
%
@
12
PR257 0_0402_5%
1 2
PR
224
499K
_040
2_1%
12
PR
232
0_04
02_5
%
12
PD24DAP202U_SOT323
2 31
PR
230
3.57
K_04
02_1
%@
12
PR
254
0_08
05_5
%
12
PR2410_0805_5%
12
PR2340_0402_5%
12
PC
189
1U_0
603_
10V6
K
12
AO4912_SO8
PQ41
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
PR
219
10_1
206_
5%
12
PR2170_0402_5%
12
PC
183
2200
P_04
02_5
0V7K
12
PR258 0_0402_5%@1 2
G
D
SPQ46
RH
U00
2N06
_SO
T323
2
13
G
D
SPQ48
RH
U00
2N06
_SO
T323
2
13
PR2400_0805_5%
1 2
PR
226
10.2
K_04
02_1
%@
12
PC
195
0.22
U_0
603_
16V7
K
12
PC
186
4.7U
_120
6_25
V6K
12
PD
26SK
UL3
0-02
AT_S
MA
@
21
PR
255
0_08
05_5
%@
12
PC
188
4.7U
_120
6_25
V6K
12
PC
190
4.7U
_080
5_6.
3V6K
12
PR
229
0_04
02_5
%
12
PC
187
2200
P_04
02_5
0V7K
12
PC1970.047U_0603_16V7K
12
PR
239
10_1
206_
5%
12
PC1790.1U_0603_25V7K
12
PR242100K_0402_5%
12
G
D
SPQ47
RH
U00
2N06
_SO
T323
2
13
PL1710U_LF919AS-100M-P3_4.5A_20%
12
PC
196
4.7U
_080
5_6.
3V6K
1
2
+
PC
194
150U
_D2E
_6.3
VM_R
18
1
2
PR
222
200K
_040
2_1%
12
PC
181
4.7U
_120
6_25
V6K
12 PC
182
4.7U
_120
6_25
V6K
12
PR2230_0402_5%
12
PR
225
499K
_040
2_1%
12
PC1840.1U_0402_16V7K
12
PR
221
118K
_040
2_1%
12
PR
233
806K
_060
3_1%
12
PR
218
47_0
402_
5%
12
PR2310_0402_5%
1 2
PR2200_0402_5%
12
PD
25SK
UL3
0-02
AT_S
MA
@
21
PU5
MAX8734EEI_QSOP28
LX515DL519
BST514
DH516
OUT521FB59
SHDN#6ON54
GN
D23
ILIM5 11
DH3 26
LX3 27
TON
13
DL3 24
OUT3 22
FB3 7PGOOD 2SKIP#12
ON33
REF8
PRO
#10
VCC
17
V+20
ILIM3 5
BST3 28
LDO
325
LD05
18
N.C.1
+
PC
192
150U
_D2E
_6.3
VM_R
18
1
2
AO4912_SO8
PQ42
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UG1.8 UG1.5
VSEN1.8
BO0T1.8
BOO
T1.8
A
BOOT1.5
SOFT1.8
ISEN1.8
ISL6
227A
_VIN
PHASE1.8
ISL6
227A
_VC
C
BOOT1.5A
ISEN1.5
OC1.8 OC1.5
LG1.8
VOUT1.5VSEN1.5
EN1.8
SOFT1.5
UG1.5A
PHASE1.5
LG1.5
UG1.8A
EN1.5
VOUT1.8
VIN2.5
N32SUSP#
IS6227A_B+
SYSON<34,44,47> SUSP# <34,44,45,47,52,54>
B+
+5VALWP
+1.8VP
+1.5VSP
+2.5VSP
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Custom
51 60Thursday, December 15, 2005
2005/03/22 2006/03/22
+1.8VP/+1.5VALWP/+2.5VS
(400mA,40mils ,Via NO.= 1)
1.8V/1.5V/2.5V
PC
634.
7U_1
206_
25V6
K1
2
PC710.1U_0603_25V7K
12
+
PC
7422
0U_D
2_4V
M_R
25
1
2
PR
9710
K_04
02_1
%
12
PR932.43K_0603_1%
1 2
PR
980_
0402
_5%
@
12
PR
900_
0402
_5%
12
PR950_0402_5%
1 2
PR
910_
0402
_5%
@1
2
PR10273.2K_0603_1%
12
+
PC
7222
0U_D
2_4V
M
1
2
PC690.01U_0402_25V7Z
12
PU7
APL5508_SOT89
IN2
GND
1
OUT 3
PC
604.
7U_1
206_
25V6
K
12
PR83
51_1206_5%
12
PR860_0402_5%
1 2
PC830.1U_0603_25V7K@
12
PC
624.
7U_1
206_
25V6
K
12
PQ58SI4800BDY_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
754.
7U_0
805_
6.3V
6K
12
PR880_0402_5%
1 2
PR10173.2K_0603_1%
12
PC
760.
01U
_040
2_25
V7Z
12
S
GD
PQ18SI3456DV-T1_TSOP6@
3
6
245
1
PR942.43K_0603_1%
1 2
PC672.2U_0805_10V6K
1 2
PL53.3UH_PLC1045P-3R3A_6.1A_30%
1 2
PC780.1U_0402_16V7K@
12
PR
100
10K_
0402
_1%
12
PU6
ISL6227BCA-T_SSOP28
GN
D1
LGATE12
PGND13
PHASE14
UGATE15
BOOT16
ISEN17
EN18
VOUT19VSEN110
OCSET111
SOFT112
DD
R13
VIN
14
PG1A15 PG2/REFA 16
SOFT2 17
OCSET2 18
VSEN2 19VOUT2 20
EN2 21
ISEN2 22
BOOT2 23
UGATE2 24
PHASE2 25
PGND2 26
LGATE2 27
VCC
28
PL44.7UH_PLC1045P-4R7A_5.5A_30%
1 2
PC
801U
_060
3_10
V6K
12
PQ16SI4800BDY_SO8
S
1S
2S
3G
4
D8
D7
D6
D5
PD
17D
AP
202U
_SO
T323
2 31
PJP18JUMP_43X118@
1 122
PC680.01U_0402_25V7Z
12
PC790.1U_0402_16V7K@
12
PR842.2_0603_5%
12
PR
8910
.5K_
0402
_1%
12
PC
814.
7U_0
805_
6.3V
6K 1
2
PR870_0402_5%
1 2PQ59
SI4810DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC700.1U_0603_25V7K
12
PC
6422
00P_
0402
_50V
7K1
2
PR960_0402_5%
1 2
PQ17SI4800BDY_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
654.
7U_0
805_
6.3V
6K
12
PR10347K_0603_5%@
1 2
PC
6122
00P_
0402
_50V
7K1
2
PJP19JUMP_43X39@
11 2 2
PR
990_
0402
_5% 1
2
PC
73
4.7U
_080
5_6.
3V6K
12
PC
770.
01U
_040
2_25
V7Z
12
PC
8210
U_1
206_
25VA
K
12
PR850_0402_5%
1 2
PC
594.
7U_1
206_
25V6
K
12
PC
660.
1U_0
603_
25V7
K
12
PR
926.
81K_
0402
_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX8575_B+
N33
MAX8575_IN
MAX8575_SS
BST1.05
LX1.05
DL1.05
DL1.05A
DH1.05A
MAX8578_VCC
FB1.05
DH1.05
MAX
8575
_OC
SET
VIN0.9
VREF0.9
SUSP<47,55>
SUSP# <34,44,45,47,51,54>
+1.05VSP
B+
+5VS
+3VALW
+0.9VSP
+1.8V +1.8VP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 1.05V/0.9V
52 60Thursday, December 15, 2005
2005/03/22 2006/03/22
1.0
+1.05V_VCCPP/+0.9VSP
PC930.1U_0402_10V6K
12
PC
860.
01U
_040
2_25
V7Z
12
+
PC
9033
0U_D
2_2.
5VM
1
2
PJP20JUMP_43X118@
11
22
G
D
S
PQ212N7002_SOT23
2
13
PR1070_0402_5%
1 2
PC
951U
_060
3_16
V6K
12
PR1050_0402_5%
1 2
PC960.1U_0402_16V7K
12
PL73.3UH_PLC1045P-3R3A_6.1A_30%
1 2
PC
201
4.7U
_080
5_6.
3V6K
12
PC890.1U_0603_25V7K
12
PU9
APL5331KAC-TR_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PC
9810
U_1
206_
6.3V
7K
12
PR1060_0402_5%
1 2
PR
104
6.81
K_0
402_
1%
12
PQ
20S
I481
0BD
Y_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PC870.1U_0603_16V7K@
12
PC920.047U_0603_25V7M
1 2
PU8
MAX8578EUB_10UMAX
GND4
IN 9
SS2
VCC3
FB1
OCSET10
DH 8
LX 7
BST 6
DL 5
PC94
10U_1206_6.3V7K
12
PQ
19
SI4
800B
DY
_SO
8
S1
S2
S3
G4
D8
D7
D6
D5
PC
914.
7U_0
805_
6.3V
6K
12
PC850.1U_0603_25V7K
12
PR110866_0402_1%
12
PL6FBM-L18-453215-900LMA90T_1812
1 2
PC
970.
1U_0
402_
16V
7K@
12
PR1151K_0402_1%
12
PC
8410
U_1
206_
25V6
M
1
2
PR
108
7.15
K_0
402_
1%
12
PR1114.7_0402_5%
1 2
PD181SS355_SOD323
12
PR112750_0603_1%
1 2
PR1131K_0402_1%
12
PC883300P_0402_50V7K
12
PR
253
510K
_040
2_5%
12
PR
109
30_0
402_
5%
12
PR114510K_0402_5%
1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
ISL6260_PWM3
ISL6260_PWM1
N36
N37
ISL6260_VID0ISL6260_VID1ISL6260_VID2ISL6260_VID3ISL6260_VID4ISL6260_VID5ISL6260_VID6
ISL6260_VRTT
ISL6260_RBIAS
ISL6260_NTC
ISL6260_SOFT
ISL6260_OCSET
ISL6
260_
DFB N
35
VSUM
ISL6260_ISEN1
N57
N45
ISL6260_DPRSTP
ISL6260_DPRSLPVR
ISL6260_PSI
ISL6260_PGD
ISL6260_CLK
ISL6260_VRON
ISL6260_FCCM
N56
VSUM
N34
ISL6
260_
DR
OO
P
VOISL6
260_
VW
ISL6
260_
CO
MP
ISL6
260_
FBISL6
260_
VC
IFF
ISL6260_RTN
ISL6260_VDD
ISL6260_VSEN
N38
N39
6208B_LG
VSUM
ISL6260_PWM2
ISL6
260_
VIN
ISL6
260_
PG
OO
D
6208A_LG
ISL6260_ISEN2
+CPU_CORE
CPU_PHASE2
VO
ISL6260_NTC
N59
N42
CPU_PHASE1
N43
VO
6208B_UGA6208B_UG
6208A_UGA6208A_UG
ISL6260_ISEN3
VR_ON<44>
DPRSLPVR<7,29>H_PSI#<5>
VGATE <29,44>
CPU_VID0<5>CPU_VID1<5>CPU_VID2<5>CPU_VID3<5>CPU_VID4<5>CPU_VID5<5>CPU_VID6<5>
H_PROCHOT#<4>
H_DPRSTP#<4,28>
CLK_ENABLE#<15>PGD_IN<44>
VCCSENSE<5>
VSSSENSE<5>
B+
+CPU_CORE
+CPU_B+
+5VS
+CPU_B+
+5VS
+3VS
+5VS
+CPU_CORE
+CPU_B+
+5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCPU_CORE
C
53 60Thursday, December 15, 2005
2005/03/22 2006/03/22Compal Electronics, Inc.
1.0
CPU CORE
PC
119
680P
_060
3_50
V8J
12
PQ
25S
I468
4DY
-T1-
E3_
SO
8
S1
S3
G4
D8
D7
D6
D5
S2
PL8FBM-L18-453215-900LMA90T_1812
1 2
PQ
23S
I485
6AD
Y-T
1-E
3_S
O8
S1
S3
G4
D8
D7
D6
D5
S2
PR1470_0402_5%
12
PC
103
10U
_120
6_25
VAK
12
PR1225.11K_0603_1%
12
PR12010K_0402_1%
1 2
PC1070.22U_0603_10V7K
12
PR15410_0402_1%@
12
+
PC
9910
0U_2
5V_M1
2
PR1241.91K_0603_1%
12
PR1560_0402_5%
12
PQ
24S
I485
6AD
Y-T
1-E
3_S
O8
S1
S3
G4
D8
D7
D6
D5
S2
PC
104
1U_0
603_
16V6
K
12
PC1170.22U_0603_10V7K1 2
PR1310_0402_5%
12
PR
159
4.53
K_0
402_
1%1
2
PQ
27S
I485
6AD
Y-T
1-E
3_S
O8
S1
S3
G4
D8
D7
D6
D5
S2
PU12
ISL6208CRZ-T_QFN8
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PR
165
1K_0
402_
1%@
12
PR11610_0603_5%
12
PR1300_0402_5%
12
PC1261800P_0402_50V7K
1 2
PC
100
0.1U
_060
3_25
V7K
12
PR1292.2_0603_5% 12
PR
158
3K_0
402_
1%
12
PR150 10_0402_1%@12
PR152
11.5K_0402_1%
12
PC
114
10U
_120
6_25
VAK
12
PR11810_0402_1%
12
PR1330_0402_5%
12
PC2000.1U_0402_16V7K
12
PQ
22S
I468
4DY
-T1-
E3_
SO
8
S1
S3
G4
D8
D7
D6
D5
S2
PR1666.19K_0603_1%
12
PL9
0.36UH_MPC1040LR36_24A_20%
1 2
PQ
26S
I485
6AD
Y-T
1-E
3_S
O8
S1
S3
G4
D8
D7
D6
D5
S2
PC
130
0.22
U_0
603_
16V
7K
12
PR149 0_0402_5%
12
PR1370_0402_5%
12
PC
109
1U_0
603_
10V6
K
12
PR14010K_0402_1%
1 2PR
138
4.7_
1206
_5%
12
PR144
NC@
12
PR
119
4.7_
1206
_5%
12
PQ
43S
I468
4DY
-T1-
E3_
SO
8
S1
S3
G4
D8
D7
D6
D5
S2
PC
102
4.7U
_120
6_25
V6K
12
PR13610_0402_1%
12
PC
112
2200
P_0
402_
50V7
K1
2
PC1211000P_0402_50V7K
12
PR155180_0603_1%
12
PR2370_0603_5%
12
PC
113
4.7U
_120
6_25
V6K
12
PR1350_0402_5%
12
PH
2
10K
B_0
603_
5%_E
RTJ
1VR
103J
12
PC
106
0.01
U_0
402_
25V
7K
12
PR
125
0_04
02_5
%
12
PR1480_0402_5%
12
PR1510_0402_5%
12
PC
115
1U_0
603_
16V6
K
12
PU10
ISL6208CRZ-T_QFN8
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC1331000P_0402_50V7K
12
PC
134
0.1U
_040
2_16
V7K
12
PR141
499_0402_1%
12
PR16068.1K_0402_1%
12
PR1671K_0402_1%
12
PR1320_0402_5%
12
PR123
NC@
12
PR1460_0402_5%
12
PC1990.082U_0603_25V7K
12
PC
108
680P
_060
3_50
V8J
12
PQ
45S
I468
4DY
-T1-
E3_
SO
8
S1
S3
G4
D8
D7
D6
D5
S2
PC136
330P_0402_50V7K
12
PR1571.2K_0402_1%
1 2
PR1450_0402_5%
12
PC
129
1000
P_0
402_
50V7
K
@
12
PR
121
10_0
603_
5%
12
PR1435.11K_0603_1%
12
PR2350_0603_5%
12
PC1180.22U_0603_10V7K
12
PC1201000P_0402_50V7K
12
PU11
ISL6260CRZ-T_QFN40
VW8
PGD_IN2
PSI#1
DPRSLPVR36
DPRSTP#37
VID634 VID533
RTN13
FB10
COMP9
VS
S19
VDIFF11
DFB
15
VO
16
ISEN3 21
OCSET 7
PWM3 25
FCCM 24
CLK_EN#38
VR_TT#4
RBIAS3
NTC5
SOFT6
VID028VID129VID230VID331VID432
3V3
39
VSUM 17
VSEN12
VR_ON35
PWM1 27
ISEN2 22
ISEN1 23
PWM2 26
DR
OO
P14
VD
D20
VIN
18
PG
OO
D40
PC
111
0.1U
_060
3_25
V7K
12
PL10
0.36UH_MPC1040LR36_24A_20%
1 2
PC
101
2200
P_0
402_
50V7
K
12
PR1340_0402_5%
12
PR1420_0402_5%
12
PR1530_0402_5%
12
PC
208
1U_0
603_
10V
6K@
12
PC116
0.022U_0402_16V7K
12
PR1646.98K_0402_1%
12
PH1470KB_0402_5%_ERTJ1VR103J
12
PC1100.01U_0402_25V7Z
12
PC1050.22U_0603_10V7K
1 2
PR1172.2_0603_5%
12
PC1280.022U_0402_16V7K
1 2
PR2360_0402_5%@
12
PR127150K_0402_5%
12
PC132
220P_0402_25V8K
1 2
PR1284.22K_0402_1%
12
PR1260_0402_5%
12
PR1390_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BOO
T_VG
A
BOOT_V1.8
IS6227B_B+
UG_V1.8AUG_VGAA
EN_VGA
UG_VGA
ISL6
227B
_VC
C
LG_VGA
UG_V1.8
SOFT_V1.8
N49 N50
ISEN_V1.8
VSEN_V1.8
PHASE_VGA
VSEN_VGA
LG_V1.8
EN_VGA
VOUT_VGA
ISEN_VGA
PHASE_V1.8
OC_VGA
VOUT_V1.8
ISL6
227B
_VIN
OC_V1.8
SOFT_VGA
SUSP# EN_VGACORE
SUSP# <34,44,45,47,51,52>
SUSP# <34,44,45,47,51,52>
EN_VGAEN_VGA# <55>
B+
+5VALWP
+VGA_COREP
+1.8VSP
+3VALWP
+1.8VS
+3VALWP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Custom
54 60Thursday, December 15, 2005
2005/03/22 2006/03/22
+VGA_COREP/+1.8VSP
PR249100K_0402_5%
1 2
PL121.4UH_SSF-13056-1R4_15.5A_+-20%
32
PQ33
SI4
810D
Y-T
1-E3
_SO
8
S1
S2
S3
G4
D8
D7
D6
D5
G
D
SPQ55
RH
U00
2N06
_SO
T323
2
13
PQ32
SI4
800D
Y-T
1-E3
_SO
8
S1
S2
S3
G4
D8
D7
D6
D5
PC1470.01U_0402_25V7Z
12
PC
139
4.7U
_120
6_25
V6K
12
+
PC
153
330U
_D2_
2.5V
M
1
2
PL133.3UH_PLFC0745-3R3_4.8A_30%
1 2
PC1462.2U_0805_10V6K
1 2
PR1750_0402_5%
1 2
PR1760_0402_5%
1 2
AO4912_SO8PQ31
D2 2G28
G1 3D1/S2/K5
D2 1D1/S2/K7
S1/A 4D1/S2/K6
PD
22D
AP
202U
_SO
T323
2 31
PC1480.01U_0402_25V7Z
12
PQ34
SI4
810D
Y-T
1-E3
_SO
8
S1
S2
S3
G4
D8
D7
D6
D5
PR1920_0402_5%
1 2
PR
188
0_04
02_5
%@
12
PR1821.33K_0603_1%
1 2
+
PC
154
330U
_D2_
2.5V
M@
1
2
PC
145
0.1U
_060
3_25
V7K
12
PC
140
2200
P_04
02_5
0V7K
12
PR
177
2.26
K_04
02_1
%
12
PR
180
10.2
K_04
02_1
%
12
PC
157
0.01
U_0
402_
25V7
Z
12
PR1930_0402_5%
1 2
PR185100K_0402_5%
1 2
PR1840_0402_5%@
1 2
PR1830_0402_5%@
1 2
PR
178
0_04
02_5
%@1
2
PC1590.1U_0402_16V7K@
12
PC
156
0.01
U_0
402_
25V7
Z1
2
PR
186
10K_
0402
_1%
12
PU14
ISL6227BCA-T_SSOP28
GN
D1
LGATE12
PGND13
PHASE14
UGATE15
BOOT16
ISEN17
EN18
VOUT19VSEN110
OCSET111
SOFT112
DD
R13
VIN
14
PG1B15 PG2/REFB 16
SOFT2 17
OCSET2 18
VSEN2 19VOUT2 20
EN2 21
ISEN2 22
BOOT2 23
UGATE2 24
PHASE2 25
PGND2 26
LGATE2 27
VCC
28
PC1490.1U_0603_25V7K
12
PR2500_0402_5%@
1 2
PC
155
4.7U
_080
5_6.
3V6K
12
PC
143
2200
P_04
02_5
0V7K
12
PR
187
0_04
02_5
%12
PR
189
10K_
0402
_1%
12
PC
138
4.7U
_120
6_25
V6K
12
PR1811.33K_0603_1%
1 2
PC
141
4.7U
_120
6_25
V6K
12 P
C14
24.
7U_1
206_
25V6
K1
2P
R17
90_
0402
_5%
12
PR19168K_0603_1%
12
PR1740_0402_5%
1 2
PC
144
4.7U
_080
5_6.
3V6K
12
PR1722.2_0603_5%
12
PC1580.1U_0402_16V7K@
12
PR171
51_1206_5%
12
G
D
SPQ56
RH
U00
2N06
_SO
T323
2
13
PR19068K_0603_1%
12
PC1500.1U_0603_25V7K
12
PR1730_0402_5%
1 2
PJP21JUMP_43X118@
1 122
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
N46
VIN_V0.9
N48SUSP
VREF_V0.9
VIN_V1.2
REF_V1.2N62
N63
FB_V1.2
N61
PHASE_V1.2
SUSP<47,52>
EN_VGA# <54>
+5VALW
+3VALW
+0.9VGAP
+1.8VS
VS
+1.2VSP
2VREF_1999
VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateVGA1.2V/VGA0.9V
Custom
55 60Thursday, December 15, 2005
2005/03/2 2006/03/22Compal Electronics, Inc.
1.0
+1.2VSP/+0.9VSP
S
GD
PQ36SI3445DV_TSOP6@
3
6
24 5
1
C
BE P
Q50
HM
BT22
22A
_SO
T23
1
2
3
PC
173
10U
_120
6_6.
3V7K
@
12
PJP24JUMP_43X118@
11
22
PJP22JUMP_43X39@
11
22
EC
31Q
S04
PD
29
12
PC2054700P_0402_25V7K
12
PR
243
191K
_040
2_1%
12
PC
210
22P
_040
2_50
V8J
12
PC
204
0.1U
_060
3_25
V7K
12
PU16APL5331KAC-TR_SO8@
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PU15BLM393M_SO8
+ 5
- 6O7
P8
G4
PC
170
1U_0
603_
16V
6K@
12
PL145UH_SPC-06704-5R0A GP_2.9A_30%
1 2
PR2020_0402_5%@1 2
PD28RB751V_SOD323
12
PC
171
0.1U
_040
2_16
V7K
@
12
PR1960_0402_5%
1 2
PR
244
10K
_040
2_5%
12
PR247499K_0402_1%
12
EC
31Q
S04
PD
30@
12
PC1720.1U_0402_16V7K@
12
G
D
S
PQ
37S
N70
02N
_SO
T23
2
13
PR246330K_0402_1%
1 2
PR2011K_0402_1%@
12
S
GD
PQ57SI3445DV_TSOP6
3
6
24 5
1
PC
202
470P
_040
2_50
V8J
@
12
E
BC
PQ512SA1036K_SOT23
2
31
PR2451K_0603_5%
1 2
PR
203
1K_0
402_
1%@
12
PC169
10U_1206_6.3V7K@
12
PC2032200P_0402_50V7K
12
G
D
S
PQ
392N
7002
_SO
T23
@
2
13
PC
161
22U
_120
6_6.
3V6M
1
2
+
PC
165
220U
_D2_
4VM
1
2
PU15ALM393M_SO8
+ 3
- 2O1
P8
G4
PC
162
22U
_120
6_6.
3V6M
1
2
PC
166
10U
_120
6_6.
3V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
N54
N53
OTPREF
BATT_TEMP
BATT
+
N52
TS
SMC
SMD
N55
MA
INPW
ON
<48,
50>
BATT_TEMP <44>
EC_SMC_1 <44,45>
EC_SMD_1 <44,45>
VSVL
VL
VL
BATT++ BATT+
+3VALWP
VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Custom
56 60Thursday, December 15, 2005
2005/03/01 2006/03/01
CPU
Recovery at 50 +-3 degree C
PH1 under CPU botten side :CPU thermal protection at 90 +-3 degree C
Battery Connect/OTP
SMARTBattery:1.BATT+2.SMBD3.SMBC4.R es5. Temp6.GND
PJPB1 battery connector
BATTERY CONN
PC1741000P_0402_50V7K
12
PC1770.22U_0603_16V7K
12
PR211215K_0603_1% 1 2
PR212470K_0402_1%
1 2
PR2061K_0402_5%
1 2
PU17A
LM393M_SO8
+3
-2 O 1
P8
G4
PC1781000P_0402_50V7K
12
PU17B
LM393M_SO8
+5
-6 O 7
P8
G4
PR214470K_0402_1%
12
PH3100K_0603_1%_TH11-4H104FT
12
PR205100_0402_5%
1 2
PC1750.01U_0402_25V7Z
12
G
D
S
PQ402N7002_SOT23
2
13
PCN2
SUYIN_200045MR006G110ZR
BATT+ 1
SMD 2
SMC 3
Res 4
Temp 5
GND 6G7
G8
PR209470K_0402_1%
12
PC
176
0.1U
_060
3_25
V7K
12
PR21320K_0603_1%
12
PR208470K_0402_1%
1 2
PR2076.49K_0402_1%
1 2
PR2100_0402_5%
12
PL15FBM-L18-453215-900LMA90T_1812
12
PR204100_0402_5%
1 2
1
1
2
2
3
3
4
4
5
5
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
H/W2 EE Dept. PIR SHEET
57 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1
Add R579 and R580 for EC PA/PR detec EC team request P44
For NVDIA change request Rev0.3 P18 7/08 '05
Add R585 LID_SW# 10K pull-high reserve LID_SW# floating Rev0.2 P44 6/13 '05
U6 pin D23 SLP_S4# contact to U24 pin35 EC need detect SLP_S4# for S4 state Rev0.2 P44 6/13 '05
BOM update add R388 DOCK_MICR need pull-high to +CODEC_REFC Rev0.2 P38 6/13 '05
Change NB strap pin CFG9 to Normal Operation Rev0.2 P11
Del R369,Q20,Q9,C446,JP29,JOPEN1,JOPEN2 Cancel TV tuner function Rev0.2 P41 6/7 '05
Add D26 Add RTC Battery life Rev0.2 P28
JP3 footprint update ME change new CRT connector Rev0.3 P17
50 Add screw hold H23, H24 ME drawing modify Rev0.3 P47 7/08 '05
JP26 footprint update ME change new USB connector Rev0.3 P41 6/30 '05
IFPAB_PLLVDD PLLVDD VID_PLLVDD change from 3.3V to 2、 、 .5V
PEX_CFG 0~2 change from 100 to 001
P20
P26
Rev0.2
Rev0.2
G72 G73 power modify、
Overridden CFG modify
BOM del C591 220U_D2 for +VCCP bypass capacitance Cost down P6Rev0.2
P15
P32
P18
P19
P44
P17
P19
Change R562 from 649K_0402 to 649_0402_1% BOM error fix LAN can't link Rev0.2 P35
Change R558 from3.3K_0402 to 200_0402_5%
45 Add C790,C791,C792,C793,C794,C795,C796 100P_0402
BOM error fix LAN can't link Rev0.2 P35
U24 contact to CPUSB#
For EMI
Rev0.3 P29,40
7/06 '05
Reserve new card detect input
BOM del R307 no need EC control new card reset
Rev0.2
Rev0.2
P44
P44
48 Change R94,R141 to @ and change R96,R142 form @ to 128@ For NVDIA change request Rev0.3 P19 7/08 '05
BOM del R51
Del BOM R359,R349,R361,D9,D10,Q23 For TI 7412 modify request Rev0.2 P32 6/7 '05
Change MSBS_SDCMD_SMWE_FIXED# to MSBS_SDCMD_SMWE# For TI 7412 modify request
Change SDCLK_SMRE_FIXED# to SDCLK_SMRE# For TI 7412 modify request
Change SDWP#_SMCE_FIXED# to SDWP#_SMCE# For TI 7412 modify request
Change SM_RB_FIXED# to SM_RB# For TI 7412 modify request
Change R554,R556,R557,R559 from 10K to 2.2K For TI 7412 modify request
Rev0.2
Rev0.2
Rev0.2
Rev0.2
Rev0.2
P32
P32
P32
P32
P32
6/7 '05
6/7 '05
6/7 '05
6/7 '05
6/7 '05
U24(EC) pin91 add ACZ_RST# input
Add R583,R584 75 ohm contact to JP19 and RJ45_GND LAN modify Rev0.2 P35 6/8 '05
Change WL_PRIORITY contact to JP18 pin3 and BT_PRIORITY contactto JP18 pin5.
pin define swap
Modify by
Rev0.2 P37 6/14 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
6/6 '05
U44 pin5 change from +5VAMP to +5V Design modify
Add R588 TI recommend(It can avoid the small noiseform this SPKROUT pin)
U44 pin3 change from GNDA to GND Design modify
Rev0.2
Rev0.2
P40
P40
JP21 50pin contact to U31 F25pin
JP24 50pin contact to U31 H26pin
Rev0.3
support system memory throttling
support system memory throttling
Rev0.2
Rev0.2
P13
P14
51 R36 pin1 change contact to ACTLED#,R43 pin1 change contact toLINK_LED100#
Change LAN LED state, Amber LED indicates activity,Green LED indicates the link is present
Rev0.3 P35 7/09 '05
Add R582 @0_0402 Reserve Rev0.2 P35
Cancel U12 pin3 contact to +3VLAN Design modify for LAN function fix LAN can't link Rev0.2 P35
46 Add R590,Q46 Switch PCBEEP path
212223
1
Reason for change Rev. PG#
Add R589 Dual layout for 9LP306 and SLG8LP462. Rev0.3
Modify listItem
P15 7/05 '05
25
23456789
1011121314151617181920
Rev0.2
49 Change R139,Q6 to @ and change R145 form 87_0402 to 124_0402,R84 from 130_0402 change to 124_0402
26
24
52 Add R591 10K_0402 and Q47 fix mute LED power on turn on Rev0.3 P38 7/11 '05
Change R145,R146 from 88.7K to 88.7 ohm BOM error Rev0.3 6/28 '05
Del R587,R588,R589,R590 0 ohm for NV72 chipset modify Rev0.3 6/17 '05
41
28293031
3233
6/30 '05
34353637
JP17 footprint update DB1 footprint error, fix can't TV-out
38
3940
Rev0.2 6/14 '05
fix into xp codec out popo noise Rev0.3 P44 7/06 '05
42 BOM add C591 220U_D2 for +VCCP bypass capacitance
43 BOM del C595 220U_D2 for +VCCP bypass capacitance
change 220U location with C595
For cost down
Rev0.3
Rev0.3
P06
BOM add R587,R588,R589,R590 0 ohm for NV72 CLK swap pin rework Rev0.2
7/06 '05
P11 7/06 '05
6/14 '05
44
Add R586,R587 UMA or Discrrte PCBA detect Rev0.3 6/27 '05
Add JP34 for mini-PCIE card ME update Rev0.2 P37 6/6 '05
47 Add C797 reserve For EMI Rev0.3 P37 7/07 '05
53 BOM del R383 4.7K pull-high EC program this pin as push-pull output Rev0.3 P42 7/13 '05
27 Swap DQSA0~7/DQSA#0~7 and DQSC0~7/DQSC#0~7 Schematic error modify Rev0.2 P19 6/8 '05
Change LINK_LED100# contact to U41 pin27 Customer request for LAN link LED state Rev0.2 P35 6/8 '05
P42
7/07 '05
Rev0.3
Change C419,C421 form 33P to 22P_0402 improve TV out quility. Rev0.3 6/28 '05
1
1
2
2
3
3
4
4
5
5
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
H/W2 EE Dept. PIR SHEET
58 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Version change list (P.I.R. List)
BOM del R101,C161,R467,R88 nvdia recommend P18
Modify by7/13 '05
Reason for change Rev. PG#Modify listItemRev0.354
55 BOM del R78,R468,R111,R117,R63,R475,R477 nvdia recommend Rev0.3 P26 7/13 '05
56 BOM del R108,add R112 nvdia recommend(change to PEX_CFG[2..0]=0x010b) Rev0.3 P26 7/18 '05
5758
59606162
BOM add C599 add 220U cap for 1.8V power decoupling Rev0.4 P11 8/18 '05
BOM add R455 add 51_0402 resister for intel Yonah B0 sightingsupdate
Rev0.4 P04 8/18 '05
Add Q48,Q49,Q50,R593,R594 modify WLED control circuit for OTS:0164892 issue Rev0.4 P37 8/22 '05
Del D3
Add R592
modify WLED control circuit for OTS:0164892 issue Rev0.4 P41 8/22 '05
add R592 150 ohm for WLED# current limit
Rev0.4 P16 8/22 '05
JP9 Pin 14 contact to +5VS change SPDIF LED power from +5V to +5VS
Rev0.4 P37 8/22 '05
63Add Q51 Prevent TPS2231 pin2 +3VALW leakage to +3VS
Rev0.4 P42 8/22 '05
64JP5 Pin 25 contact to +3VALW switch board need +3VALW provide lie switch power
Rev0.4 P34 8/29 '05
65
Del R440,R432,Q30 modify WLED control circuit for OTS:0164892 issue
Rev0.4 P42 8/23 '05
66 BOM change R554/R557/R556 to 100K, change R559 to 22K TI 7412 pull-high recommend Rev0.4 P32 8/23 '05
67 JP3 change new part change CRT conn from top side to bottom side forDFX request
Rev0.4 P17 8/24 '05
68 Del C764,R552,R553, Add D28,change U40 to G993 fan control Fan control circuit change to G993 Rev0.4 P04 8/24 '05
69 BOM del R47 Rev0.4 P11 8/29 '05Intel WW31 document update
70 Add R595/R596/R597/R598/R599 SD card signal add 33 ohm damping resister Rev0.4 P32 8/30 '05
71 Add R81/R77 10K_0402 NV72 A1 chip recommend JTAG_TCK pull-high andJTAG_N pull-down
Rev0.4 P18 8/29 '05
72 Del clock generators difference clock 49.9ohm termination ICS9LP306 clock generators update Rev0.4 P15 8/29 '05
73 Change clock generators difference clock 33ohm damping to 10ohm ICS9LP306 clock generators update Rev0.4 P15 8/29 '05
74 Change R266 from 475 ohm to 2.4K ohm ICS9LP306 clock generators update Rev0.4 P15 8/29 '05
75 Add D29/D30/D31/D32/D33/D34/D35/D36 SD card signal add diode for Voltage clamp Rev0.4 P32 8/30 '05
76 Move C8/C11/C10/C3/C4/C5/C2/C13/C14/C34/C35/C1 for layout ME update limit area for CPU Rev0.4 P06 8/30 '05
77 Change R591 from 10K ohm to 100 ohm Fix OTS:163350 calgary's mute LED can't display Rev0.4 P38 8/30 '05
78 JP34 pin50 change contact from PM_EXTTS#1 to PM_EXTTS#0 Intel WW31 document update Rev0.4 P14 8/30 '05
79 U31 pinH6 change contact from PM_EXTTS#1 to DPRSLPVR Intel WW31 document update Rev0.4 P07 8/30 '05
80 D26 pin2 change contact from +3VALW to LDO3 Add RTC battery life Rev0.4 P28 8/30 '05
81 BOM change R562 from 649 ohm to 619 ohm and change U12 to newpart
LAN performance modify Rev0.4 P35 8/30 '05
82 Add R600 100 ohm and DEL C608 @ HP recommend Rev0.4 P37 8/30 '05
83 Add R601 100 ohm HP recommend Rev0.4 P41 8/30 '05
84 Reserve C810~C821 0.1u cap For EMI Rev0.4 P42 8/30 '05
85 Add L32 and C822 on SPDIF signal For EMI Rev0.4 P42 8/30 '05
86 Add C802 /C803 /C804 /C805 1000P forCLKREQA#/CLKREQB#/CLKREQC#/CLKREQD#
For EMI Rev0.4 P15 8/30 '05
87 U40 pin5,6,7,8 contact to GND schematic update for SI2 fan can't full trun onissue
Rev0.5 P04 10/26 '05
88 change C599 from 220U to 330U Steady the 1.8V Rev0.5 P11 10/26 '05
89 Add R103 40.2ohm nvdia recommend P21Rev0.5 10/28 '05
90 change R510,R75,R533,R168 from 120ohm to 499ohm for NV73 only nvdia recommend Rev0.5 P22~25 10/26 '05
91 straps table PEX_CFG[2:0] from 010 to 001 and PCI_DEVID[3:0]NV73M from 1010 to 1011
nvdia recommend Rev0.5 P26 10/26 '05
92 Add C825 15P_0402 for MSCLK_SDCLK_SMELWP# signal For EMI Rev0.5 P32 10/26 '05
93 Add C823 1000P_0402 for +VCC_SD For EMI Rev0.5 P32 10/26 '05
94 Add C824 1000P_0402 for +VCC_SM_XD For EMI Rev0.5 P32 10/26 '05
95 Add C826 1000P_0402 for JP32 pin4 For EMI Rev0.5 P32 10/26 '05
96 change PCM_SPK pull down R588 from 43K to 10K TI recommend Rev0.5 P32 10/26 '05
97 D29,D30,D31,D32 pin1 contact to +VCC_MS schematic update for SI2 MS card can't work issue Rev0.5 P32 10/26 '05
98 Add R607 22ohm and @ C827 10P Rev0.5 P32 10/26 '05Reserve
99 U18 pinG6 contact to +3VS TI recommend Rev0.5 P33 10/26 '05
100 Reserve Rev0.5 P35 10/26 '05
101 Change Q46 to U45 analog switch design change Rev0.5 P40 10/26 '05
102 Change U38 pin3,4 form +5VALW to +5V design change Rev0.5 P41 10/26 '05
103 Change Q2 from AO3413 to AO3419 Rev0.5 P41 10/26 '05
104
Add @ R606 110ohm
Add D38~D45 for KB ESD solution For ESD request Rev0.5 P42 10/26 '05
105 AIR_ACIN change contact to U24 pin81 and add R605 for BIDdefine, add D37.
design change Rev0.5 P44 10/26 '05
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
H/W2 EE Dept. PIR SHEET
59 60Thursday, December 15, 2005
2005/03/10 2006/03/10Compal Electronics, Inc.
Version change list (P.I.R. List) Page 3 of 3
Add D46 ESD P17
RESERVE U46 / C829 / R609 / Q53 / R610 CONTROL WRITE SIGNAL OF FLASH ROM Rev1.0 P45
RESERVE Q52 / C828 / R608 CONTROL RTC RESET P28Rev1.0
Modify by12/08 '05
12/08 '05
12/08 '05
12/08 '05
12/08 '05
12/08 '05
12/08 '05
ADD R612 CIR OUTPUT IS OPEN-DRAIN
CANCEL C811 / C812 AND ADD D47 ESD
Rev1.0
Rev1.0
P42
P42
CANCEL Q45 AND ADD U48 / C830
CANCEL D37 AND RESERVE U47 / C51 / R611
FIX ODD CAUSE BOOT LATE ISSUE
IMPROVE EC RESET SIGNAL
Rev1.0
Rev1.0
P43
P44
106
Reason for change Rev. PG#Modify listItem
107108109110111112
Rev1.0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2841 1.0
Custom
60 60Thursday, December 15, 2005
2005/03/22 2006/03/22
Version change list (P.I.R. List) Page 1 of 1
Reason for change PG# Modify List B.Ver#Item
Power section
Date
Power PIR
1 Solve the oscillate of +3VALWP when plug adapter. 48 Change PC11 from 10U_0805_10V to 0.1U_0603_25V. 2005.06.01
2 Adjust VGA power rail sequence. 54 Add PQ55, PQ56 and PR249 2005.06.21
3 To protect PQ21, because SUSP change to 18.5V from 5V. 52 Add PR253 and change PR114 to 510K_0402_5%. 2005.08.10
4 To save S5 power consumption. 50,48 Add PR254, PR13, PR14, PQ1 and PC8.Reserve PR255.
2005.08.15
5 To solve EMI issue. 53,49 Add PR117,PR129,PR119,PR138,PC108 and PC119.Change PJP16 to PL18 and PR30 from 0_0402 to 2.2_0603.
2005.08.15
6 49To speed up CP mode response. Change PR32 to 10K; PR35 to 6.8K and PC21 to 2200P. 2005.08.23
7 Reserve capacitor to reduce noise. 49 Reserve PC209. 2005.08.27
8 To speed up C4 return to C0. follow Intel recommend. 53 Change PR141 from 0_0402_5% to 499_0402_1%. 2005.08.29
9 To pull up +1.8V power plan to 1.846V. 51 Change PR89 from 10.2K to 10.5K. 2005.10.01
10 To filter high frequency from AirCard. 55 Add PC210 22P_0402_50V. 2005.11.25
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