L14 Kvs Digital Circuits 2 Full

8/12/2019 L14 Kvs Digital Circuits 2 Full

1/48

:

r. . . r vas avaDept. of Electrical Engineering

IIT Kanpur

1


2/48

Goal of Simplification

n e express on:

.

2. Minimize number of literals in each term

2


3/48

Minimization

1 2 3 1 2 3 1 2 3 1 2 3= . . . . . . . .

1 3 2 2 1 3 2 2y = . . . .x x x x x x x x

1 3 1 3. .

1 1 3y = .x x x+

3

Pr nc p e use : x + x = 13


4/48

f = . . .x y x y x y+ +

Apply the Principle: x + x = 1 to simplify

f = .( ) .x y y x y+ + f = .x x y+

( ) ( )f x x x y= + +

. . .

f . .

x x xx x y x y

x x y x y

=

= + +

( )( )f .x y x x= + +

( )f x y= +

Principle: x + x = 1 and x + x = x4


5/48

Need a systematic and simpler method

arnaug ap map s a popu ar ec n que or carry ng

out simplification

It represents the information in problem in such a way

that the two rinci les become eas to a l

Principle: x + x = 1 and x + x = x

5


6/48

K-map representation of truth table

x y min term

0 0 x . y m010x

y

0 1 x . y m11 0 x . y m20 1

. 32

0 0 0

x y f110x

y

0 1 11 0 1

6


7/48

y

0x

0 1= 3,2,1f2

1 1 1

y

0x

1 0 f = . .x x+

1 10

7


8/48

3-variable K-map representation

y z min termsxyz

x . y . z

0 0 1 x . y . z0 1 0 x . y . z

m0m1m2

x

0 m0 m1 m3 m2 x . y . z

1 0 0 x . y . z

1 0 1 x . y . z

m3m4

m5 1 m4 m5 m6m7 x . y . z

1 1 1 x . y . z

m6m7

8


9/48

z min termsx


0 0 0 x . y . z0 0 1 x . y . z

m0m1

0 0 0 00 0 1 1

0 1 0 x . y . z0 1 1 x . y . z1 0 0 x . y . z

m2m3m4

0 1 0 00 1 1 11 0 0 0

1 0 1 x . y . z1 1 0 x . y . z

1 1 1 x . y . z

m5m6

m7

1 0 1 11 1 0 0

1 1 1 1

yzx 00 01 11 10

x 00 01 11

0

10

m0 m1 m3 m20 0 1 1 0

1 m4

m5

m6

m7

1 0 1 1 0

9


10/48


11/48


w x y z

0 0 0

0 0 0 1

0

m n erms

m0

m

wx 01 11

00

00 10

0 1 3 2

0 0 1 0 m2

0 0 11 m301 4 5 7 6

1 1 1 0 m14

1 1 1 1 m15

11

10

12 13 15 14

8 9 1011

yz

1 01wx 01 11

0

00 10

01 0 1 1 0=w. . . w. . . . . . . . .

. . . . . . . . .

x y z x y z w x y z w x y z

w x y z w x y z w x y z

+ + +

+ + +

1 0 0010 11


12/48

Minimization using Kmap

2 = (2,30

10xy

0 0

1 1 1f = . .x y x y+

f = .( )x y y+

f = xCombine terms which differ in only one bit position. As a

result, whatever is common remains.

12


13/48

0

10x0 1

= . .x y x y+

1 10 f = ( . ).x x y+ f =y

y y

0x

1 0 0x

1 1

1 1 0 1 00

f =y f =x 13


14/48

y

2f = (1,2,3) 0 0 1

11 1

yxyxyx

=

++=

( ) ( ) yxxyyx +++=yx +=

e ea s o cover a e s w as ew an as s mp e

terms as possible 14


15/48

3-variable minimization

f = . . . . . . . .x y z x y z x y z x y z+ + +

yzx 00 01 11 10

0 0

.y z

.x z

f = . . . .x y z y z x z+ +

15


16/48


. . . . . . . .

yzx 00 01 11 10

0 1 00 1

.

=16


17/48


yzx 00 01 11 10

=0

1 1 11 1

. . . . . . . .

.x f = . .x x+.x yyz

f = .( )x y y x+ =x

0 000 0

1 1 11 1

x 17


18/48

yz

x 00 01 11 10

yz

0 1 1 1 1 0 10 01

x z

yzx 00 01 11 10 yzx 00 01 11 10

0 1 10 0 0 10 01

z=x z+

18


19/48

yz

x 00 01 11 10

Can we do this ?

0 0 00 0

1 1 1 1 0

term. In this case it does not.

f = . . . . . .x y z x y z x y z+ +

. .x y x z= +

We do not get a single product term. In general we cannotmake groups of 3 terms.

19


20/48

Can we use kmap with the following ordering of variables?

yzx 00 01 10 11

1 1 1 00

Can we combine these two terms into a single term ?

f = . . . .x y z x y z+

.( . . )x y z y z= +

Note that no simplification is possible.

20


21/48

yz

0 00 1 1

1 00 0 0

These two terms can be combined into a single term but it is

not easy to show that on the diagram.

f = . . . .x y z x y z+

.( ). .x y y z x z= + =Kma re uires information to be re resented in such a wa

that it is easy to apply the principle

1x x+ = 21


22/48


1 01wx 01 11

0

00 10

01 0 1 1 0 . .w y z

11 1 0 10

. .w x z1 0 0010

. .w y z= . . . . . . . . . . . .

Is this the simplest expression ? 22


23/48

yz01 1100 10

z

1 0100 0

1 01wx

01 11

00 0

00 10

11

01

1 0 10

01 0 1 1 0 1 0 0010

1 0 0010. . . . . . . .w x y z w x y z x y z+ =

. . . . . . . .w x y z w x y z w x z+ =

23


24/48


1 01wx 01 11

00 0

00 10

01 0 1 1 0 . .w y z. .x y z

11 1 0 10

. .w x z. .w x z

. .w y z. . . . . . . . . .

Is this the best that we can do ? 24


25/48

Cover the 1s with minimum number of terms

yz

1 01wx 01 11

0

00 10yz

1 01wx 01 11

0

00 10

01 0 1 1 0 01 0 1 1 0

11 1 0 10 11 1 0 10

1 0 0010 1 0 0010

f = . . . .w y z w x z+ + f = . . . .w y z w x z+ +

. . . . . .w y z w x z x y z+ + . . . .w x z x y z+25


26/48


01wx 01 11

00 0

00 10

0 01wx 01 11

00 0

00 10

0

01 1 01 0 01 1 01 0

1 0 010 1 1 0 010 1

f = . . . . . .w x w x w+ + f = . . . . . .w x w x z x z+ +

26


27/48

Groups of 4

0wx 01 11

00

00 10

00 1.w x

.x z

01 11 1 1

11 00 01

0

wx 01 11

00

00 10

00 0

01 1 10 0

.y z11 0 01 1

.w z 27


28/48

yzwx 01 1100 10

yzwx 01 1100 10

01

00

1 0 0 1 01

00

0 00 0 .x z11

10 0 0

1 0 0 1

0 0

11

10

0 0

0 01 1

0 0.

yz

wx 01 11

00

00 10

001 10

wx

00 01 1

11

01

0 0

0 00 0

0 01101

0 00 0.x z

10 1 10 010 011 0

28


29/48

Groups of 8

zyz

0wx 01 11

00

00 10

0 1 1 0wx

00 0 0 0

11

01

01 10 11 1 11 1

10 0 01 1 10 0 00 0

yzwx 01 11

00

00 10

0 01 1

yzwx 01 11

00

00 10

1 11 1

01 1 10 0 z11

01 0 0

0 0

0 0

0 0x

10 0 01 1

10 1 11 129


30/48

Examples

yzwx 01 1100 10

yzwx 01 1100 10

00 0 01 1 00 0 01 1

11

01

1 11 1 11

01

1 11 1

10 0 0 0 1 10 0 0 0 1

30


31/48

Dont care terms

0 0 0 0

a b c d y0y1y2y3y4y5y6y7y8y9

1 0 0 0 0 0 0 0 0 0

0 0 0 1

0 0 1 0

0 0 11

0 1 0 0 0 0 0 0 0 0

0 0 1 0 0 0 0 0 0 0

0 0 0 1 0 0 0 0 0 0

b

c

y1y2y3

DecimalDecoder

0

0 1

0 1

1 0 0

1 0

1 0

0 0 0 0 1 0 0 0 0 0

0 0 0 0 0 1 0 0 0 0

0 0 0 0 0 0 1 0 0 0

d y9

Y31 1 10

1 0 0 0

0 0 11

0 0 0 0 0 0 0 1 0 0

0 0 0 0 0 0 0 0 1 0

0 0 0 0 0 0 0 0 0 1

01 11

00

00 10abc

0 010

0 1 0

0 11

1 0 0

1

1

1

x x x x x x x x x x

x x x x x x x x x xx x x x x x x x x x11

01 0 0 0 0

x x x x

1 1

11

1 01 0

1

11

1

x x x x x x x x x xx x x x x x x x x x

x x x x x x x x x x

10 0 x x0

3 . . .y a b c d=

31


32/48

Dont care terms can be chosen as 0 or 1. Depending on the

problem, we can choose the dont care term as 1 and use it to

Y

obtain a simpler Boolean expression

01 11

00

00 10ab

c

0 010

11

01 0 0 0 0

x x x x

10 0 x x0

3 . .y b c d=

on care erms s ou on y e nc u e n enc rc emen s

helps in obtaining a larger grouping or smaller number of groups.32

P d t f S (P S) T R t ti


33/48

Product of Sum (PoS) Terms Representation

x y f1 x y Max term

0 1 11 0 1 0 1 x + y M11 0 x + y M2

yxyx =1

301 =

= 301 ,

33


34/48

Minimization of Product of Sum Terms using Kmap

10xy

=

010x

0 1 1 1

1 1 1

f = . .x x y x y+ +0

10xy

0 1

( ).x x x yx y

= + += + 1 10

f =y

Sum of Product (SoP)34


35/48

10

x

y10

y

0 1 0 0 1 1

f =x

=

1

yzx 00 01 11

0

10

1 00 1

1 0 1 1 0z x z+

f =( ).( )x z x z+ + f = . .x z x z +35


36/48

yzwx 01 1100 10

x y z+ + x y z+ +

000 1 10

11 11 10 w y z+ +

10 0 0 0 0

w x+

= . . .x y z x y z w y z w x

36

Example


37/48

Example

Obtain the minimized PoS b suitabl usin dont care terms

yzwx

00 10x1

11

01

1 10 x

10 x x11

f =( ).( ).( )w x z w x y y z+ + + + +

37

Design Flow x


38/48

Design FlowSystem Description

x

y

zfsystem

x y z f

Truth Table

0 0 1 10 1 0 00 1 1 11 0 0 01 0 1 1

Boolean Expression

1 1 0 01 1 1 1

f = . . . . . . . .x y z x y z x y z x y z+ + +

Boolean Expression f = . .x z x z +

x

Gate Netlist

y

y

z

z

x

C

38

Mapping of Boolean expression to a Network of gates


39/48

Mapping of Boolean expression to a Network of gates

available in the library

1 2 3 1 2 3 1 2 3 1 2 3y = . . . . . . . .x x x x x x x x x x x x+ + +

x1

x2

x2

x1

y

x2

x1

x3

x1

x3

x2

x339

Implementation using only NAND gates


40/48


.

NAND to AND

.x y .

y f = .x y x y= +



41/48


.

f = . . .a b c d f g+ +a

c

d f

g

h

41


42/48

a

b

c

d f

h

a

b

c

d f

h

There is a one-to-one mapping between AND-OR network and NAND network

42

Often there is lot of further optimization that can be done


43/48

Often there is lot of further optimization that can be done

. .A B A B= +

43

Implementation using only NOR gates


44/48


=

x+ x y+

NOR to OR

x

y f = .x y x y+ =44



45/48


To implement using NOR gates, it is easiest to start with

minimized Boolean expression in POS form

f =( ).( ).( )a b c d f g+ + +a

b

c

d f

g

h

45

f =( ).( ).( )a b c d f g+ + +


46/48

( ) ( ) ( )f g

a

b

cf

gh

a

b

c

d f

gh

There is a one-to-one mapping between OR-AND network and NOR network

46

To implement SoP expression using NOR gates, determine first the


47/48

corresponding PoS expression and then follow the procedure outlined earlier

Implement f(x,y,z)= . . using NOR gatesx z x z+

yzx 00 01 11 10

1 0 1 1 0

.

x

z z

x

x

zf

x

z

f

Similarly PoS expression can be implemented as NAND network by first

converting it to SoP expression and then following the procedure outlined

earlier 47


48/48

How do we get the chocolate?

48

Documents

L14 Kvs Digital Circuits 2 Full