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HF LINEAR AMPLIFIER
JRL-2000F
Service Manual
( .J RC) dapan Radio Co., .fld.
I Preface
This manual provides information required for maintenance and troubleshooting procedures of the JRL-2000F. Refer to the instructions manual for operation.
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I Contents
Preface ______________________________ -_ ________ _; __ ;.. _____________ ..:_;.. _______ ~---'--------------------~-----1
1 . S pecifi cati o ns -------------------------------------------------------------------------------------3
2. Ci rcu it Description -------------------------------------------------------------------------------4 2.1 Gonfiguration and Outline -------------------------------------------------------------------4 2.2 NAH-232 Power Amplifier Unit --------------~----------------------------------------------4 2.2 .1 CAH-377 Power Amplifier ---------------------------------------------------------------4 2.2.2 CCB-367 PA Control ---..:------------------------------------------------------------------6 2.2.3 CFF-361 Power Combiner ---------------------------------------------------------------9 2.3 NBL -169 Power Supply Unit ----------------------------------------------------------------9 2.3.1 CSA-222 Relay Circuit --------------------------------------------------------------------1 0 2.3.2 CBB-13 Power Factor Corrector -------------------------------------------------------1 0 2.3.3 CBG-68 Main PS Unit --------------------------------------------------------------------11 2.3.4 CFR-1 02 Noise Filter ---------------------------------------------------------------------12
2.4 CFG-111 Matehing Circuit ------------------------------------------------------------------12 2.5 CSC-433 Antenna Switch -------------------------------------------------------------------14 2.6 CDJ-1143 Control Crcuit --------------------------------------------------------------------15 2. 7 Automatie Tuning -----------------------------------------------------------'-------------------17 2.8 CML -334 Display ------------------------------------------------------------------------------20 2.9 CSD-387 Switch Panel ----------------------------------------------------------------------20
3. Troubles hooti ng ----------------------------------------------------------------------------------21
4. Cantirrnation of Operation and Readjustment --------------------------------------------26 4.1 Outline -------------------------------------------------------------------------------------------26 4.2 Adjustment of 2 PA Units --------------------------------------------------------------------26 4.2.1. Adjustment of Heat Sensor--------------------------------------------------------------26 4.2.2 Adjustment of ldling Current ------------------------------------------------------------27 4.3 Adjustment of Power Supply Unit ---------------------------------------------------------28 4.3.1 Adjustment of Output Valtage ----------------------------------------------------------28 4.4 Total Adj ustment ------------------------------------------------------------------------------28 4.4.1 Adjustment of Meter-----------------------------------------------------------------------28 4.4.2 Adjustment of APC Circuit ---------------------------------------------------------------29 4.4.3 Adjustment of ALC Circuit ---------------------------------------------------------------29 4.4.4 Adjustment of the VSWR Meter--------------------------------------------------------29
5. External View --------------------------------------------------------------------------------------30
6. Block Diagram ----------------------------------------------------''"-------------------------------34
7. Conn ection Diagram ----------------------------------------------------------------------------37
8. Print Circuit Board Layout ---------------------------------------------------------------------55
9. Replacement Parts List ------------------------------------------------------------------------72
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1 . Specifications
Operating frequency bands :1.8 MHz band 1.800 to 2.000 · MHz
3.5 MHz band 3.500 to 4.000 MHz 7 MHz band 7.000 to 7.300 MHz 10 MHz band 10.100 to 10.150 MHz 14 MHz band 14.000 to 14.350 MHz 18 MHzband 18.068 to 18.168 MHz 21 MHz band 21.000 to 21.450 MHz 24 MHz band 24.890 to 24.990 MHz 28 MHz band 28.000 to 29.700 MHz
Rated output power :SSB 1 kW PEP* 1 00% duty cycle; 24 hour. CW 1 kW* 1 00% duty cycle, 24 hour. FSK/SSTV 1 kW* 100% duty cycle, 1/4 hour.
Output impedance :50 Q unbalanced, VSWR 3.0 (16.7 to 150 Q)
Harmonics :-60 dB or less
Intermodulation distortion (IMD) :-35 dB or less below PEP (at 1 kW output)
Input impedance :SOQ unbalanced
Exciting power :1 OOW max.
Frequency switching time : Less than 0.1 sec.
Power supply valtage : 85 to 264 V AC, single-phase
Power consumption :2.5 kVA or less (at 1 kW output)
Input power factor :95% or more (at 1 kW output)
Temperature range :-1 ooc to 40°C
Protection circuits :PA excess current; PA overheat; PA abnormal Ioad; AC power supply excess valtage; power supply overheat; PA failure; excessive antenna VSWR; exciting power excess; and antenna matehing anomaly.
Dimensions :430(W) X 300(h) X 402(0) mm
Weght : Approx. 28Kg
* Note :Rated output on 200 to 240V AC. The rated output power on 1 00 to 120V AC is 750W PEP.
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·12. Circuit Description
2.1 Gonfiguration and Outline
The cabinet of the JRL-2000F consists of a front panel, a top cover, a bottarn cover, a rear panel and a main chassis. The equipment of the cabinet consists of the following five units:
Unit Name Installation Position
Power amplifier At the bottom of the main chassis on the righted side
Power supply unit At the bottom of the main chassis on the left-hand side
Matehing circuit Upper part of the main chassis
Antenna switch Upper part of the rear panel
Control Upper part of the main chassis
Switch panel
Display Frontpanel
The operation of each unit will be described below. Refer to the External View (page 30) for the general configuration and Print Circuit Board Layout (page 55) for the parts Iayout of the unit, respectively.
_, 2.2 NAH-232 Power Amplifier Unit
This unit is attached to the lower part of the main chassis on the righthand side. lt amplifies the drive input power sent from the exciter up to the rated output power by the wide-band linear power amplifiers. This unit consists of two CAH-377 power amplifiers attached to each heat sink respectively, a CCB-367 PA control circuit attached to the upper side of the heat sink, a CFF-361 power combiner circuit attached to the bottarn side of the heat sink, and a cooling fan.
2.2.1 CAH-377 Power Amplifier
CAH-377 power amplifier consists of two identical wide-b~md linear amplifers which operate independently of each other on the printed circuit board. Each wide-band amplifier has 12 RF power MOSFETs and amplifies a 20 W PEP input power to 250W PEP. The RF power MOSFET is new generation's power device which has excellent resistance tothermal stress and reflected power, a high linearity and a low high-arder intermodulation distortion(IMD), as compared with the conventional bipolar transistor. As the two wide-band linear amplifiers have the same circuit, the circuit operation will be described for the left part of the connection diagram on page 39. The inputpower signal from J1 is sent to the input transformer T1, and divided into two signals with 180° phase difference.
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C1,-C2, es, R1 and R2 compose of a circuit which matches an input imped~nce.-T11 and T21 are transformers which insulate the exdtation signal from ground Ievei. The two excitation signals are consumed by R17 to R20 and R27 to R30 which are the gate terminating resistors of the RF power MOSFET. As a RF has the insulated gate, it can be assumed that only the equivalent inpuf capacitance exists between gate·and source~ The gate terminating resistor shunts this input capacitance. The RF power MOSFET TR11 to TR16 are connected parallel. They are excited by the signal voltage at both ends of the gate terminating resistor and they amplify the output currentin a half cycle. On the other hand, TR21 to TR26 amplify the output current in another half cycle. Theseoutput currents of half-cycles are fed to the primary winding of the output transformer TS and the current waveform of full-cycle is composed. These output currents flow to the Ioad circuit via output terminal J4. · As a result, the upper part of the output voltage waveform is amplified by TR11 to TR16,and the lower part by TR21 to TR26. -The SEPP circuit, in contrast to the transformer-coupled push-pull circujt, seldom generates a phase difference when composing output waveforms. Therefore, a waveform with less distortion can be obtained. The transform er T3 provides a gate-bias voltage to the RF power MOSFET for the operation in class AB. A DC bias valtage of approx. 2.5 V is provided through T3 to each RF power MOSFET from CCB-367 PA control circuit. The resistors R61 and R62, connected between the third winding of T3 and the second winding of the input transformer T1, work as a negative feedback.
(Note): The chips with same charasteristics are packaged to the RF power MOSFET 2SK408 and 2SK409. However, the Iead Iayout differs.
2SK408 2SK409
I Dimensions in mml
2SKUJ8 2SK409 (JEDEC T0-220AB)
l.C:.te I. Orai"
2. :ioura Z. Source
l. CaiA!
Fig.1
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2.2.2 CCB-367 PA Control
CCB-367 PA control is attached to the upper s.ide of the power amplifier unit and is · equipped with a bias voltage control circuit for ,the two power amplifiers, a cooling fan control circuit, protection circuits and an inputpower splitter.
1 )Power Amplifier Bias Voltage Control Circuit -
As the RF power MOSFET of CAH-377 power amplifier operates in class AB, the DC bias voltage which determines the operating point current (idling ct.irrent) is ess~ntial. The gain of the power amplifier can be changed by changing the DC bias voltage. !he normal bias voltage is about 2.5V DC. However, the bias voltage varies accmding to the KEY signal state or. the. temperatu re change of the heat sink to get the optimum gain of the power amplifier. · · IC4(1/4 to 4/4) and IC5(1/4 to 4/4) are DC amplifiers which send out a bias voltage to the RF power MOSFET block of each SEPP circuit. This biasvoltage can be adjusted with variable resistors RV11 to RV14 and RV21 to RV24. The reference voltage for this bias voltage is obtained from the developed voltage between the base and the emitter of TR1 and TR2. TR1 and TR2 are attached to the side part of the heat sink of CAH-377 power amplifier. As the base-emitter is driven by a constant current, the base-emitter voltage depends.on the temperature of the heat sink. . The base-emitter voltage is amplified by the DC amplifier IC3 (4/4) and sent to each poweramplifier block as a bias voltage. As the RF power MOSFET, employed in the JRL-2000F, has a negative thermal. coefficient, the gain decreases when the temperature of the heat sink rises. To compensate this, TR1 and TR2 check the temperature of the heat sink and operate to keep the gain constant, regardless of the temperature change, by controlling the bias voltage. · The comparator IC3 (3/4) controls the bias voltage by referencing the KEY signal. Fig.2 shows each waveform of the signal voltage. KEY & PTI signal ® from outside, passes the time-constant circuit composed of C1 and R2, and is switched by the comparator. The comparator output @, sent out from No.14 pin of IC1, passes the time-constant circuit composed of RS, CD14 and C2, and the DC amplifier IC3 (4/4) and then is formed to a signal voltage waveform @. The signal voltage waveform © is applied to the DC amplifiers IC3 (3/4) and IC (4/4), and controls the bias voltage of each power amplifier bloq_k. The bias voltage @varies according to the KEY & PTT signal.
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'. /
OFF OFF
0-H
I r-KEY & PTT signal L
ON ON
@ No.14 pin of IC1 (3/4) SV
L ov ~--~-~-
SV @ No.8pinofiC3(1/4) ( \ ( L ov
2.SV @ Bias voltage of ( ( L each PA ov
Fig.2
2)APC (Automatie Power Control) Circuit
The APC circuit prevents excessive output by controlling the bias voltage of the power amplifier when the output of the linear amplifier exceeds the rated value. The outputpower signal Vf, detected by the CFG-111 matehing circuit, is fed to the comparator IC1 (4/4) and compared with the reference voltage adjusted by the variable resistor RV3. When the Vf signal exceeds the rated value, the comparator is turned on and the comparator output voltage controls IC3 (3/4) and IC3 (4/4) (DC amplifier to control the bias voltage). As a result, the bias voltage drops and the outputpower is controlled to be constant in cas-e of excessive output. When the comparator is on, the OVER DRIVE signal is sent to the switch panel via diode CD1, and lights up the DRIVE LED in red.
3)Temperature Detector Circuit.
The base-emitter voltage of the temperature detector transistor TR1 and TR2 attached -to each of the two heat sinks is compared by the comparator IC6 (1/4) and IC6 (2/4), and IC6 (3/4) and IC6 (4/4), respectively. -. As TR1 and TR2 have a negative temperature coefficient of about -4.5 mV/ oc (degree centigrade) the base-emitter voltage drops when the temperature of the heat sink rises. Variable resistors RV1 and RV2 set the reference voltage of the comparators IC6 (2/4) and IC6 (4/4) to the base-emitter voltage which corresponds to the temperature of 80 oc of the heat sink. At this time, the reference voltage of the comparators IC6 (1/4) and IC6 (3/4) is the same as that which corresponds to the voltage when the temperature of the heat sink is 50 oc. Therefore, when the temperature of the heat sink exceeds 50 oc, the comparator IC6 (1/4) or IC6 (3/4) is turned on, and "High" Ievei voltage is applied.
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to turn on the transistor TR3 and the eooling fan starts to rotate. · When the temperature of the heat sink exeeeds 80 oc, the eomparator IC6 (2/4) or IC6(4/4) turns on. At this time a Low Ievei PA HEAT alarm signai is sent to the CDJ-1143eontrol eireuit via diode CD?. When the PA HEAT alarm is issued, the JRL-2000F displays "A3".
4)PA UNBL Alarm Deteetor Cireuit
The CFF-361 power eombiner is equipped with a sensor R7 whieh deteets unbalaneed power when the power is eombined. This sensor deteets the unbalaneed power and when the terminal valtage of the sensor inereases, the eomparator IC1 (2/4) turns on, and the PA BL alarm signal is generated. When the PA BL alarm is issued, the JRL-2000F displays "A4".
S)PA LOAD Alarm Deteetor Cireuit.
The CFF-361 power eombiner is equipped with a cireuit whieh deteets Vf and Vr of the PA output terminal. Vf and Vr are eompared by the eomparator IC2 (2/4). When the VSWR value exeeeds 3.0 at the PA outputterminal beeause of a poor matehing situation with the matehing eireuit, the ratio VrNf exeeeds 0.5 and the eomparator IC2 (2/4) ehanges from Low Ievei to High Ievei. This eomparator output signal triggers the flip-flop cireuit eomposed of IC2 (3/4) and IC2 (4/4), and turns over the output voltage to issue the PA LOADalarm signal. When the PA LOADalarm is issued, the JRL-2000F displays "A9", IC2 (1 /4) and the peripheral deviees eompose of a cireuit whieh resets the flip-flop.
6)PA OFF Cireuit
When one of the three alarm signals of the PA eontrol beeomes Low Ievei, or when PA OFFsignal whieh foreedly turns off the power amplifier beeomes Low Ievei beeause of the operation of the other proteetion eireuit, a Low Ievei signal is sent to the
· inputterminal of the eomparator IC1 (4/4) via CD4 or CD6 diode OR eireuit and the output of IC1 (1/4) turns from Low Ievei to High Ievei. ' This signal is applied to the DC amplifier whieh eontrols the bias voltage of the power amplifiers IC3 (3/4) and IC3 (4/4), and the bias voltage of the power amplifiers is set to -9V. lf the bias voltage beeomes -9V, the RF power MOSFET of the power amplifier is eut off and the output power beeomes 0 W, regardless of the existenee of the exeitation power.
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: .... _ ... )
?)Power Splitter Circuit
The excitation power supplied to J201 terminal from the exciter is applied to the RF transformer T1 via -2dB attenuator circuit. · T1 is an impedance convert transformer (50 ohms : 12.5 ohms). The excitation power is distributed to each t~rminal P21 to P24.
2.2.3 CFF-361 Power Combiner
The CFF-361 power combiner is attached to the bottarn of the power amplifier unit. . This circuit generates a 1 kW PEP by combining the output power from the power
amplifier of the four SEPP circuits. These power amplifier output currents are combined by the RF transformers T1 and T2, and finally combined by T3. As the output impedance of T3 is 12.5 ohms, the step-up transformer T 4 is converted to 50 ohms. Resistcrs R1, R2 and R3 absorb the unbalanced power generated at both ends of each combining transformer. R3 is equipped with a sensor R7 which detects temperature. When a large unbalancing power is generated among these four power amplifier, R3 produces heat to increase the resistance of R7 and the PA BL alarm circuit is activated. The circuit, consisting of a current transformer T5, diedes CD1 and CD1, capacitors C1 to C4 and resistors R51 to R54, detects Vf and Vr of the poWer combiner output terminal.· Vf and Vr issue the PA LOADalarm when the VSWR of the power combiner output terminal is 3.0 or more.Relay K4 is turned on when the PA switch is on, and the combined power is sent to the matehing circuit through this relay .
2.3 NBL-169 Power Supply Unit
The NBL-169 power supply unit is a regulated switching power supply whose power output of DC 80 V is generated using AC 100 V to 240 V. Because the pulse-shaped current flows to capacitors in a smothing circuit in a power supply unit with a capacitor-inputtype smothing circuit, the power factor of AC input is, in general, about 0.5 to 0.6. The JRL-2000F has employed apower factor corrector circuit in the formerstage of the switching regulator circuit to obtain a power factor of approx.1. · The CBB-13 power factor corrector is attached to one side of the heat sink which is in the center of the unit, and the CBG-68 main PS unit is attached to the other side. The unit also incorporates a switching power supply unit which generates a DC + 12 V ( 4A) power supply for the control circuit.
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I
I . I
i
CFR-102 NOISE FILTER '11
f=1:t CBB-13 CBG-68
I FL 1 I I n MAIN PS vo"u! e~-.a6",v• •C~~Q3 1 . -l.c PO'·'ER 35ov[o-;---;-<> [
••'"'"' _ O• 2 . · _ '"""' FACT 0 R g~, ,
~ I j CDRRECOOR o-;---=------_J
oc • 3 ] FL2 OUTPUT
30A .....
L__ ____ ---- ---- ------- --~- -----~
Fig.3 Block Diagram of NBL-169 Power Supply Unit
2.3.1 CSA-222 Relay Circuit
The CSA-222 relay circuit consists of a relay which turns on/off the AC power supply and a noise filter circuit. The AC inputvaltage is applied to the terminal boards TBi and TB2 and sent to the NBL:.i69 power supply unit via Ki-i and Ki-2 relays. · As the relay K2 is activated by the DC i 3.8 V provided from the exciter, the JRL-2000F can be turned on/off by the exciter main switch.
2.3.2 CBB-13 Power Factor Corrector
The CBB-13 power factor corrector converts AC1 00 to 240V to DC 350 V by a DC-DC converter inserted in the smothing circuit. ln this DC-DC converter, a PFC exclusive control IC of IC1 corrects the line current waveform to a sine-curved waveform. Resistor Ri absorbs the rash current generated at the re!ay Ki when the AC power is turned on. The MOSFETs TR1 to TR3 controlled by ICi, switch the current which flows through
. choke coils L 1 and L2 with a frequency of about 90 kHz. The switched MOSFET drain valtage charges the capacitors Ci to C3 via diode CD2. As a result ,a DC350 V valtage develops at the output terminal of TE3. The current transformer T1 measures the MOSFET switching current value and detects the excessive current by the feedback of the value to IC1. The circuit composed of R11 to R13 detects an AC valtage waveform and sends it to JCi. The IC1 controls the current waveform based on this waveform. Resistars R25 to R27 feed back the outputvaltage to ICi.
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The comparator IC5 detects an exccessive output valtage and sends out the PS ALM signal via CD4 photocoupler. .· ..
R30 is a sensor which detects a MOSFET overheat. When the temperature of the FET case exceeds 80 oc, the terminal valtage of R30 increases and the transistor TAB is turned on. The circuit composed of IC2, TR6, TR7, T2 ~nd IC4 is a switching regulator which generates a DC-12 V valtage.
2.3.3 CBG-68 Main PS Unit
The CBG-68 main PS unit is a regulator which generates a regulated output of DC 80 V (30A) based on the CBB-13 power factor corrector output of DC 350 V. IC201 is a control IC and it sends out pulses for the 150 kHz switching control circuit . MOSFETs TR205 and TR206 and transformes T202 and T203 compose a MOSFET drive circuit for a main switching circuit and amplify two phase switching pulses from IC201. TR201 to TR204 arepower MOSFETs for a main switching circuit and compose of a full-bridge switching circuit with an output transformer T201. The output pulse from the secondary winding of T201 is rectified to DC by diades CD301 and CD302, and smothed by capacitor C206. R232 isasensor which detects apower MOSFET overheat of the main switching circuit.When the temperature of the MOSFET case exceeds 80 oc, the terminal valtage of R232 increases and transistor TR 209 turns on. TS201 is a thermostat which detects overheat of the heat sink. lt turns on at 45 oc and drives the cooling fan. R231 is a resistor which detects a DC output current. The valtage detected by this resistor is amplified by IC202 amplifier and it moves the pointer of the ammeter (ID) on the front panel and at the same time detects an excessive current of the comparator IC203. When the output current exceeds 30A, IC203 is turned on and it triggers the control IC201 via the time constant circuit made up of TR207 and TR208 to terminate switching oscillation . At this time, the output of the transistor TR208 is applied to No.B pin of IC203 which then issues an over current alarm. The output valtage is divided by the variable resistor RV201 and resistors R233 to R235 and the constant-voltage control by IC201 is achieved by the feedback of the divided valtage to IC201. The output valtage can be changed between DC 50V to BOV by adjusting RV201. Resistars R236 to R238 divide the output valtage and the divided valtage moves the pointer of the voltmeter (VD) on the front panel and activates the excessive valtage detector circuit after entering No.1 0 pin of IC203. When the outputvaltage exceeds 90 V, No.13 pin of IC203 becomes Low Ievei and an alarm signal for an excessive valtage is issued. At the same time, the divided valtage is also applied to No.6 pin of IC203 which then sends out the VPA ON RESP signal indicating that the comparator outputvaltage is turned on.
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·J .. '.
The start circuit of the JRL~2000F consists of transistors TR21 0 to TR212 and peripheral parts. When the PAswitch on the front panel is turned on, the VPA ON CONT signal
. changes from High to Low Ievei and the collector voltage of TR21 0 increases. · This voltage turns on TR211 via the time-constant circuit and also turns on the relay K1 of the CBB-13 power facton~o-rrector. TR21 1 also turns on TR212 and activates IC201 by providing it with a DC power supply.
2.3.4 CFR-1 02 Noise Filter
The CFR-1 02 noise filter is attached inside of the power supply unit. The noise filter circuit is composed of an L-C circuit and it prevents the switching noise component generated inside of the power supply unit from leaking out.
2.4 CFG-111 Matehing Circuit
The CFG-111 matehing circuit is attached to the upper part of the main chassis. lt attenuates the unwanted harmonics components contained in the output of the power amplifier and matches the antenna impedance to 50 ohms. The matehing circuit consists of an RF matehing circuit, an impedance detector circuit, a relay drive circuit and an output power detector circuit. The bleck diagram is shown in Fig.4.
CONTROL CIRCUIT
Fig.4 Block Diagram CFG-111 Matehing Circuit
(1 )RF Matehing Circuit
This circuit consists of inductors and capacitors which are binary-combined by relay contacts, forming an L-7t-L low pass filter as shown in Fig.S. Each relay is controlled by the control program and activated by CPU intructions.
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Fig.5 L-7t-L Low Pass Filter.
(2)1mpedance Detector Circuit
The impedance detector circuit detects the impedance of the matehing circuit input terminal and the output signals are sent to the CDJ-1143 control CPU., The circuit made up of diades CD401 and CD402, IC403 and peripheral parts measures impedance. The valtage at the input terminal is detected by capacitors C401 and C402 and diode
. CD401. On the other hand, the current at the inputterminal is detected by the current transformer T1 and diode CD402. The detected valtage and current are compared by IC403 comparator. The LOADsignal changes to Low Ievei when the impedance at the inputterminal is over 50 ohms, and the signal changes to High Ievei when it is below 50 ohms. The circuit made up of IC401, IC402 and IC403 and peripheral parts detects the phase of the impedance. After the valtage and current at the input terminal are wave-shaped by IC401 , they are applied to IC402 where the D-type flip-flop detects the phase of the valtage and current. When the phase of the current is advanced tothat of the voltage, the TUNEsignal is High Ievei, and it changes to Low Ievei when the phase is behind the valtage phase. The circuit made up of diades CD421, CD441, IC404, IC405 and peripheral circuit parts detects the VSWR value of the input terminal. Diode CD421 detects the torward valtage (Vf) and diode CD441 detects reflected valtage (Vr). Vf and Vr are compared by IC404 comparator and three output signals, SWR1.1 , SWR1.5 and SWR2.0 are obtained. The Low Ievei of SWR1.1 signal means
~
that the VSWR value of the input terminal is below 1 .1 .
(3)Relay Drive Circuit
The circuit made up of IC301 to IC304 drives relays. Each IC receives serial input data and sends out an 8-bit latched parallel signal. The CDJ-1143 control CPU sends 32-bit relay data to the ICs in serial signals.
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(4)0utput Power Detector Circuit
The output power detector circuit detects Vf and Vr of the matehing circuit output terminal. · Capaeiters C201 and C202 detect the voltage of the outputterminal and transformer T2 detects current. Diedes CD201 and CD202 detect the forward voltage (Vf) and the reflected voltage (Vr). Vf and Vr are sent to the CDJ-1143 control circuit where the VSWR value is calculated, and then they are displayed in the voltmeter on the front panel.
2.5 CSC-433 Antenna Switch
The CSC-433 antenna switch is a relay circuit which switches RF signals and is controlled by the CDJ-1143 control CPU. Connector J1 is an inputterminal ofthe RF power which is sent from the exciter. J2-1 to J2-4 are the output terminals to which four antennas can be connected. Resistcrs R1 and R2 detect the exciter outputpower and send it to the CDJ-1143 via J303. The contact of the relay KB becomes open state du ring receiving state. Depending on the mode used, each relay operates as follows.
(1) ln the Antenna Switch Mode
11
Kl K2
Fig.6
14
0-----@ ANT3
o--------0 ANT 4 K4to K7
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.-#--:
')
(2) ln the Antenna Tuner Mode
(R:Receivi!l& ) T:Transffilttmg
J1
KI
(3) ln the Linear Amplifier Mode
(R:Receiving ) T:Transmitting
R J1
T KI
2.6 CDJ-1143 Control Circuit
K2
~ ANTI
o---e ANT2
~ ANT3
0----0 ANT4 K4toK7
Fig.7
ANTI
ANT2
ANT3
o---e ANT4 K4toK7
Fig.8
The CDJ-1143 control circuit is on the printed circuit bdard attached to the upper part of the JRL-2000F. lt incorporates an 8-bit microprocessor and controls the JRL-2000F and monitors its operation.
(1 )Microprocessor Circuit
IC1 is an 8-bit single-chip CPU and equipped with 1/D ports, a timer, random access memories and serial communication terminals. Control programs are stored in ROM1.
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IC3 is a memory IC which supports electrical write/erase, and the tuning date of each band is stored in it. Switch S1 provides initial conditions to the CPU of the JRL-2000F. IC2, TR3, TR4, S2 and peripheral parts compose of a CPU reset circuit, and IC2 detects the drop of the CPU operatingvaltage DC 5V.
(2)Description of 1/0 Signals
Refer to the instructions manual for the connecting signals with the exciter.
Signalname 1/0 Description
PSALM Input Alarm from NBL-169
VPA ON RESP Input Response of PA power supply valtage
VPA ON CONT Output Truns on CBG-68
--- Truns on the relay which provides MAINON Output NBL-169 with AC power supply
K1 Output Truns on K1 of CSC-433
.K2 Output Truns on K2 of CSC-433
K3 Output Truns on K3 of CSC-433
ANT1 Output Truns on ANT1 of CSC-433
ANT2 Output Truns on ANT2 of CSC-433
ANT3 Output Truns on ANT3 of CSC-433
ANT4 Output Truns on ANT4 of CSC-433
S-DATA Output Sends data to the relay. IC of CFG-111
LATCH Output Latches S-DAT A signal in the IC memory
ENABLE Output Enable output of the relay drive IC of CFG-111
K4 Output Truns on relays in CFF-361
PA KEY ON Output Truns on PA bias circuit
PA OFF Output Truns PA bias voltage to minus voltage
PA HEAT Input Alarm for overheat of PA heat sink
PA BL Input Alarm for PA unbalanced
PA LOAD Input Alarm for PA abnormal Ioad impedance
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- .j
--J !
(3)SWR Detector Circuit
Vf and Vr detected by the outputpower detectorcircuit of CFG-111 are compared by comparator IC15. · When the VSWR value which is a ratio of Vf to Vr, exceeds 3.5, No.4 pin of IC15 becomes Low Ievei to inform CPU of the SW_R alarm (A8). On the other hand, Vf and Vr are applied to the SWR operating circuit made up of IC14, IC17 and peripheral parts. The calculated SWR is indicated in the voltmeter on the front panel. The circuit made up of IC15, CD6, R54, R55 and C67 holds the peak of Vf. Data selector IC of IC1 0 selects signals which are connected to the front panel meter. Camparator IC16 which has an outputterminal (No.8 pin) compares Vf with the reference voltage adjusted by the variable resistor RV1. lf Vf exceeds the reference voltage, an ALC voltage is generated. The ALC voltage moves the pointer of the voltmeter via diode CD5 and it is inversely amplified to a negative voltage by IC17 oparational amplyfier and then sent to the exciter.
(4)Frequency Measurement Circuit
The RF signal from the exciter, which is detected by the CSC-433 antenna switch circuit, is applied to J41 0, and is then amplified by transistor TR2. The signal is wave-shaped to the reetangular Wave by the IC23 two-stage buffer amplifier. After the divider of IC11 divides this signal ten times, it is applied to the timer IC of IC4. IC4 is controlled by CPU and measures frequency of the exciter output signal by counting this signal.
2. 7 Automatie Tuning
The CDJ-1143 control CPU of the JRL-2000F automatically tunes the antenna by controlling relays of the CFG-111 matehing circuit according to the program written to ROM1. , SET and TUNE operations will be described here.
(1 )SET
When the SET switch is pressed, No.11 pin (SELBK) of the CDJ-1143 control J3 changes to Low Ievei and requires power from the exciter.
17
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:.:.j
The exciter enters transmit state and the LED of XMT on the front panellights up for as long as the signalline of No.11 pin (SELBK) of J3 is correctly connected to the exiter. The power from the exciter is divided by R1 and R2 of the CSC-433 antenna switch circuit and R61 of the CDJ-1143 control.circuit, and the frequency of the signal is measured. Refer to "2.6 CDJ-1143 control (4)" for the frequency measurement. IC16 of CDJ-1143 coritrol circuit checks the divided signal Ievei and if the input power is too small (below about 20 W), No.7 pin of IC16 changes to High Ievei. lf it is too large (over about 150 W), No.1 pin ofiC16 changes to Low Ievei. CPU checks the state of the signal at times and displays Po with the seven-segment LED on the front panel when the input is too small, and AG when it is too large. After frequency measurement is completed, the data of EEPROM is checked in relation with the obtained frequency. ln EEPROM, the data is memorized in a matrix as shown in Fig.9. For example, assume that the frequency is 14.020MHz. As the related data exists in the • No.2 antenna column, the antenna circuit is switched to No.2 antenna and relays of the CFG-111 matehing circuit are preset according to the data. The frequency display is also switched. ln addition, the antenna number last used is stored in RAM incorporated in CPU and it will be selected if two or more data exist for one frequency. The data capacity of 30-bit is required for one cell because there are 30 relays in CFG-111 matehing circuit and one more bit is added to indicate that there is data or not. The bit is set to "no data" for all cells on shipping. When the automatic tuning is completed, the bit changes to "data exists" state. As the 8-bit/1 word EEPROM is used here, four words will be assigned to a matrix.
Antenna number Freguency
1 2 3
I .600- I .6 IOMHz FFFFFFFF FFFFFFFF FFFFFFFF
14.000-14.080MHz FFFFFFFF 0543F2D6 FFFFFFFF
'
29.900-30.000MHz FFFFFFFF FFFFFFFF FFFFFFFF
All the data is set to FFFFFFFF on shipping.
Fig. 9 Memory Map
18
4
FFFFFFFF
FFFFFFFF
FFFFFFFF
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(2)TUNE
When the TUNE switch is pressed, the LED of the TUNE switch lights up. lf an exciter other than JST-135 is used, proceed to the step of "Operation of frequency measurement". The state of relays is preset according to the measured frequency without the steps of read-out of the rt:~emory and selection of the antenna:-When the JST-135D exciter is used, the procedures described above are omitted. Then the JRL-2000F returns to receive state and K1 of the antenna switch unit is switched. The JRL-2000F returns again to transmit state and changes SELBK signal to Low Ievei. The LOAD signal of the impedance detected by the impedance detector of the CFG-111 matehing circuit is checked and the relay state is changed by one bit. Then TUNE signal of the impedance phase is checked and the relay state is changed again by one bit. Again the LOAD signal is checked and the relay state is changed by one bit. The state where the LOAD and TUNEsignalsare reversed is searched for by repeating these procedures. lf the SWR value of the impedance detector circuit is less than 1.1, the automatic tuning is thought to be completed. During automatic tuning, the 7-segment LED is shown as in Fig.10 and the sound of when relays are switching is heard. Also during automatic tuning, the divided Signallevel is checked at times and "Po" is displayed when the inputpower is too small and "A6" when it is too !arge, as is the samein the SET operation, and automatic tuning is stopped temporarily. When the automatic tuning is completed, the data is written to EEPROM. The 7-segment LED on the front panel is shown as in Fig.11 for an instant, and then the frequency is displayed. lf the automatic tuning has failed, "A7'' is displayed.
Fig.10
~ ~
Fig.11
19
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2.8 CML-334 Display
The CML-334 display is attached to the back of the front panel and is equipped with 2-digit 7-segment LED which displays the frequenciy, a LED which indicate transmit state, photosensor for theinfrared remote control signal and other peripheral circuits. The LED DATA and SCAN signalslight CD1 dynamically. The LED DATA and SCAN signalsarealso sent to the CSD-387 switch panel. TR1 to TR4 are drivers which provide 5 V to light LED. R11 and R12 are resitors which Iimit the current of the LED DATA signal. IC1 is a driver with open-collector output. CD2 is a photosensor for the infrared remote control signal and the output is TTL Ievei. The output signal is processed by the CDJ-1143 control CPU. TR5 and TR6 are drivers which provide 5 V to light LED on the CSD-387 switch panel.
2.9 CSD-387 Switch Panel
The CSD-387 switch panel is attached to the back of the front panel and consists of 13 switches and 15 LEDs. The LED DATA and SCAN signalslight CD1 to CD9 and CD12 to CD16 dynamically. CD11 lights up statically. The states of S1 to S13 are read by SCAN and SW DATA signals. The signals read are processed by the CDJ-1143 control CPU.
20
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13. Troubleshooting
One of A1 to A9 (alphanumeric) is displayed on the front panel when the JRL-2000F issues an alarm. These displayes are helpful when troubleshooting. The trouble can be caused by exciter, antenna or wraparound, etc. even if the JRL-2000F issues an alarm. Troubleshooting procedures, based on alarm information, will be described in this chapter.
+ Troubleshooting procedures based on alarm information ._ When A1 or A2 (power supply failure) is displayed:
No
Gauses exist outside the JRL-2000F. (exciter etc.)
START
Does VD become 80V when PA is turned on?
Apply power graduallyfrom the exciter.
ls A1 or A2 displayed?
Power supply unit failed
No
21
Remove the 2 fuses from between the power supply and PA.
Does VD become 80V when PA is turned on?
Refer to "When PA fails (1 )"in "Detailed Troubleshooting Procedures When PA Fails"(page 24).
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." When A3 (PA overheat) is displayed:
START
Output power of I kW(continuous carrier).
Does the PA fan start to operate with >--Ye"'-'s'------. in 5 or 6 minutes?
PA fan related failure.
Checkair ventilatio and filter .
." When A4 (PA unbalaneed) is displayed: PA may be out of order.
Refer to "When PA fails (2)" in "Detailed Troubleshooting Proeedures When PA Fails" (page 25) ·
." When AB (antenna SWR) is displayed: (1 )When trouble is eaused by deteetor cireuit failure,
one of the following units may be out of order: a)CFG-111 matehing cireuit b)CDJ-1143 eontrol
(2)When the aetual refleeted power is large, one of the following units may be out of order: a)CSC-433 antenna switeh b)CFG-111 matehing cireuit
22
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~ When A9 (Ioad alarm) is displayed: ·
Possible causes:
START
Turn PA on after automatic tuning.
Turn the exciter to transmit
state without supplying
power. (e.g. transmission in
the SSB mode with
Does ID of about 6A flow?
(1 )One of CD11 to CD16 of CFF-361 power combiner fails
(2)CFF-111 matehing ckt fails. (3)CSC-433 antenna switch fails.
No
The bias circuit fails: CCB-367 PA control or CAH-377 power ampfails.
A9 alarm may be displayed when the congenial interface is poor with the exciter. Particularly be careful if it is displayed when the JRL-2000F is turned to transmission. (For details, refer to "Supplement" in the instructions manual.)
23
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+Oetailed Troubleshooting Procedures When PA Fails: .., When PA fails (1)
Phenomena: Short circuit between VOO of PA and the ground. Gauses :(1 )One of bypass capacitors C14 to C19 or C24 to C29 of CAH-377
power amplifier has short-circuited. (2)0ne of FETs TR11 to TR1 E?. TR21 to TR26, TR31 to TR36 or TR41
to TR46 of CAH-377 power amplifier has short-circuited between drain (0) and source (S).
(3)0thers
< Troubleshooting procedures >
(1 )Remove the two fuses (15 A each) from between the PA unit and power supply unit. (2)Check. two CAH-377 power amplifiers for the electric conductivity between VDO and
the ground with a tester to find which one is out of order. ln the normal state, the electric conductivity between VOO and the ground shows diode characteristics (cathode: VOO, anode: ground).
(3)Check the external appearance of the bypass capacitors or FETs of the failed CAH-377 power amplifier for damage, etc.
(4) ln the case of a short circuit between drain (0) and source (S) of FET, check the resistance value between gate (G) and source (S) to locate the failed FET because in most cases between gate (G) and source (S) has short-circuited. As shown in Fig. 12, in the case of a short-circuit between gate (G) and source (S), the resistance value between gate (G) and source (S) of each TR12 to TR16 is about 54 n. lf all FETs are normal, the resistance value between gate (G) and source (S) of each FET is about 1 0 k n .
Fig.12
24
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.", When PA fails (2): Phenomena:The input side of PA is grounded for high frequencies. Gauses :(1 )One of FETs of CAH-377 has short-circuited.
(2)0ne of input transformers of CAH-377 has short-circuited or been broken.
(3)0thers
< Troubleshooting procedures >
(1) Make PA generate power by itself if possible, and check for the heat gener ated by the resistors of the combiner to find which PA unit is out of order.
(2) Check the external appearance of FETs of CAH-377 power amplifier for damage, etc.
(3) As shown in Fig. 12, in the case of a short-circuit between gate (G) and source (S), the resistance value between gate (G) and source (S) of each TR12 to TR16 is about 54 n : lf all FETs are normal, the resistance value betwee11 gate (G) and source (S) of each FET is about 1 0 k n .
(4) lf all FETs are normal, check for a short circuit or breakage in the transformers. To compensate the external observation, turn the power on and compare the wavefroms of each·part.
25
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4. Confirmation of Operation and Readjustment
4.1 Outline When an FET is replaced in the PA unit, "4.2.2 Adjustmemt of ldling Current'~ is re-quired. . . .. . . When the PA unit is replaced, "4.4.2 Adfustment of APC Circuit" and "4.4.3 Adjustment of ALC Circuit" is required. When the power supply unit is replaced, "4.3.1 Adjustment of Output Voltage" and "4.4.1 Adjustment of Meters" is required.
4.2 Adjustment of 2 PA Units . All adjustable parts of the PA unit are in the CCB-367 PA control circuits.
4.2.1 Adjustment of Heat Sensor [ Required instruments ]
(1 )Digital tester (2) Thermometer
< Adjustment procedures >
(1 )Measure TP1 valtage with a digital tester. TP1 voltage: ETP1 140Q-1500mV
(2)Measure the room temperature (Ta). (3)Calculate TP3 valtage to be adjusted with the following formula:
ETP3=ETP1-(75°C-Ta) X 4.5 [Example] Where ETP1=1450 mV and Ta=25°C,
ETP3=1450-(75-25) X 4.5 = 1450-220=1230 mV (4)Adjust RV1 to the calculated valtage while measuring TP3. (5)0btain ETP2 by measuring TP2 voltage.
Using the same formula in step (2),(3) ETP4=ETP2-(75°C-Ta)X 4.5 Adjust RV2 to the calculated valtage while measuring TP4.
(6)Confirm that the fan does not oparate in this state.
26
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4.2.2 Adjustment of ldling Current [ Required instruments ]
(1)DC ammeter (10 A)
< Adjustment procedures >
(1) Check+ and- terminal of PA with a tester. (2) Arrange a DC ammeter between the power supply unit and PA unit as shown in
Fig.13.(Set the range of ammeter to 10 A.) (3) Turn all the volume switches, RV11 to RV14 and RV21 to RV24 of CCB-367 PA
control bias, anticlockwise until they stop. (4) Turn on PA and apply an 80 V voltage. Gonfirmthat the current is 0 A. (5) Turn the transceiver to transmit state without supplying power.(e.g. transmission in
the SSB mode with microphone gain O)Confirm that the current is 0 A. (6) Turn RV11 clockwise to adjust the DC ammeter to 0.8 A. (7) Turn RV12 clockwise to adjust the DC ammeter to 1.6 A. (8) Turn RV13 clockwise to adjust the DC ammeter to 2.4 A. (9) Turn RV14clockwise to adjust the DC ammeter to 3.2 A. (1 O)Turn RV21 clockwise to adjust the DC ammeter to 4.0 A. (11 )Turn RV22 clockwise to adjust the DC ammeter to 4.8 A. (12)Turn RV23 clockwise to adjust the DC ammeter to 5.6 A. (13)Turn RV24 clockwise to adjust the DC ammeter to 6.4 A.
(The adjusting order does not have to be consecutive from (6) to (13) as above. Adjust to flow a current of 0.8 A for a volume switch. The volume switch points in the direction of about one o'clock. lf it does not point in that direction, a failure may exist.)
[!!] POWER AIIP
;---1 ~ITJ CAH-377
Power Supply + OCOUlPUT ~
Unit t --
NBL-169 00 POWER AMP ....__ H
'----{ ITJ CAH-377
Fig.13.
27
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4.3 Adjustment of Power Supply Unit 4.3.1 Adjustment of Output Voltage
[ Required measuring instrument] (1 }Tester
< Adjustment procedures >
(1 )lnstall the power supply unit to the JRL-2000F and turn the power and PA on. (2}Remove the rubber cap from the rear panel of the JRL'-2000F. Insert a minus screw
driver until it hits the volume switch (RV201 of CBG-68 main PS unit}. Turn the volume switch to adjust it to DC + 80 V while checking the voltage of the output terminal of PA with a tester.
4.4 Total Adjustment
Totally adjustable partsexist in CDJ-1143 control and CCB-367 PA control circuits.
4.4.1 Adjustment of Meter
[ Required measuing instruments] (1 )High frequency power meter (over 1 kW max.) (2}Dummy Ioad (over 1 kW max.}
< Adjustment procedures >
(1 }Turn on the PA switch of the JRL-2000F. A yellow LED of PA lights up after approx. 0.6 second, and the pointer of the meter on the righthand side moves (VD range). Adjust RV 4 of CDJ-1143 control circuit so that the meter indicates 80 V.
(2}0utput power from the exciter. Adjust so that the external power meter (not the meter on the righthand side of the JRL-2000F.) points to 1000 Wand then adjust RV3 so that the meter (range is Po) on the lefthand side of the JRL-2000F points to 1000W.
28
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4.4.2 Adjustment of APC Circuit
[ Required measuring instruments ] (1 )High frequency power met~r (over 1 kW max.) (2)Dummy Ioad (over 1 kW max.)
< Adjustment procedures >
(1 }Turn RV3 of CCB-367 PA control anticlockwise until it stops. (2)Set the outputpower to 1050 W. Adjust RV3 APC to decrease the power a little. (3)Confirm that a drive LED lights up orange in color when the Ievei of the output
power of the transcsiver is slightly increased.
4.4.3 Adjustment of ALC Circuit
[ Required measuring instruments ] (1 )High frequency power meter (over 1 kW max.) (2)Dummy Ioad (over 1 kW max.)
< Adjustment procedures >
(1 )Turn ALC volume switch on the back of the JRL-2000F anticlockwise, viewing from the front, until it stops.
(2)Adjust the frequency to 21 MHz and power to 1000 W. (3)Switch the right meter range to ALC and adjust RV1 of CDJ-1143 control circuit.
Turn RV1 until the needle of the meter suddenly moves. Adjust RV1 so that the needle of the meter exceeds a little further from the white zone.
(4)Turn ALC volume switch on the back of the JRL-2000F anticlockwise, viewing from the front, so that the needle of the meter moves backward from the white zone. At this time, the outputpower becomes about 950 W.
(5)Turn ALC volume switch on the back of the JRL-2000F anticlockwise, viewing from the front, until it stops.
4.4.4 Adjustment of the VSWR Meter
(1 )Switch the meter range to VSWR in receive state and adjust RV5 of CDJ-1143 control circuit so that the needle of the meter points to zero.
29
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ls. External View
5.1 Front P ane I --------------------------------------------------------------------------------------31
5.2 Rear Panel---------------------------------------------------------------------------------------31
5. 3 Side Panel --------------------------------------------------------------------------------------- 31
5. 4 Sotto m Panel -------------------------------------------------------------------------------------31
5.5 When the Upper Cover is Opened ---------------------------------------------------------32
5.6 When the Lower Cover is Opened ---------------------------------------------------------32
30
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5.1 Front Panel
5.2 Rear Panel
5.3 Side Panel
5.4 Bottom Panel
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31
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5.5 When the Upper Cover is Opened
32
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33
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js. Block Diagram
6.1 Block Diagram ----------------------------------------------------------------------------------35
. 6.2 lnterconnection Diagram ---------;.;----------~----------::. ____ ::.:.. _________________ _.::. _________ ~--36
34
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17. Connection Diagram
7.1 NAH-232 Power Amplifier Unit -------------------------------------------------------------38 7.1 .1 CAH-377 Power Amplifier ---------------------------------------------------------------39 7.1 .2 CCB-367 PA Control ----------------------------------------------------------------------40 7.1 .3 CFF-361 Power Combiner ---------------~-----------------------------------------------41
7.2 NBL -169 Power Supply Unit ----------------------------------------------------------------42 7 .2.1 CSA-222 Relay Circuit -------------------~------------------------------------------------ 43 7.2.2 CBB-13 Power Factor Corrector -------------------------------------------------------44 7 .2.3 CBG-68 Main PS Unit --------------------------------------------------------------------45 7 .2.4 CFR-1 02 Noise Filter ---------------------------------------------------------------------46
7.3 CFG-111 Matehing Circuit -------------------------------------------------------------------4 7
7.4 CSC-433 Antenna Switch --------------------------------------------------------------------50
7.5 CDJ-1143 Control ------------------------------------------------------------------------------51
7. 6 CM L -334 Display -------------------------------------------------------------------------------53
7. 7 CSD-387 Switch Panel -----------------------------------------------------------------------54
37
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