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J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
1
Digital Signal Processing
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
2
Selection of an appropriate sequence of transfer function for the processing
Simulated ADC responseADC gain = 1000
Delta charge injection: Time Value120 0,34121 0,33122 0,33
160 0,2161 0,2
Processed: Original:Fn ; n=z,N <= FADCn ; n=z,N
transfer function?
Example: FADC output
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50 70 90 110 130 150 170 190 210 230 250
Sample
Am
plitu
de (
FA
DC
co
de)
FADCn n=50,250
Optimized to extractphysical quantities(charge, etc.)
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
3
Example:The moving window deconvolution transfer function
F[n] = ai * FADC[n-i] i=0,N
For an arbitrary window of L samples :
a0 = 1
ai = 1/TAUpreamp i = 1, L-1
(TAUpreamp in units of the sampling period)
aL = -1 + 1/TAUpreamp
With deconvolution, 24-point window
-200
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50 100 150 200 250
Time (nsec. X 10)
Co
rre
cte
d a
mp
litu
de
Properties Transforms an exponential intoa rectangular function of L points.
L
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
4
Simplified implementation in favorable cases
In the previous example, ai = 1/TAUpreamp i = 1, L-1 (equal weight factors)The term with identical ai’s,: G[n] = ai * FADC[n-i]
i=1,L-1
Reduces to : G[n] = G[n-1] + a * (FADC[n-1] – FADC[n-L] )
Add the new element at the head
Remove the out of range element at the tail
Value for the previous point
A -B
Accumulator
+=
Sampling Clock
G[n]
Hardware implementation:
Counter
Constant N-1
Sampling ClockA -B
Dual PortMemory
Write address
Read Address
a * FADC[n-1]
Data Ina * FADC[n-L]
Data Out
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
5
Deconvolution in the presence of noise
With deconvolution, 24-point window
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Time (nsec. X 10)
Co
rre
cte
d a
mp
litu
de
Remark:
For series noise, theRMS value of the noisein the resulting function is increased by a factorSQRT(2)
Note: It can be demonstrated that the transfer function shown on the next slide will yield the best estimate of the trend of the “flat” portion of the deconvolution
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
6
With 16-point boxcar filter
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Sample
Fil
tere
d a
mp
litu
de
Floating average (boxcar) filter applied to the deconvolution result
G[n] = aj * F[n-j]; aj = 1/K j = 0, K -1
Transfer function:
Example with K = 16; Note parameter K => Peaking time
G[n]
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
7
Some interesting properties of the filter
3 points in rise time
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Sample
Filt
ere
d a
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litu
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8 points in rise time
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Sample
Filt
ere
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L
K
1- For an input step function, the resulting shape is a symetrical trapeze with a peaking time of K and a flat-top equal to L - K
2- As long as the charge collection in the detector is shorter than L - K, the pulse shape will reach its full amplitude. => NO ballistic deficit
3- The S/N ratio is slighly better than that of an analog CR-(RC)n or pseudo gaussian filter of the same FWHM.
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
8
Performance summary of the « trapezoidal » filter
- The S/N of the trapezoidal signal is a few % better than that of a pseudo-gaussian analog filter
- For signal rise-times shorter than the parameter K, the filtered signal has zero ballistic deficit. (Same filtered pulse height for all rise-times)
- The trapezoidal signal has no « tail » . (Good behaviour for pile-up)
Other considerations: As for its analog counterpart with pole-zero suppression, the transfer function is not zero for the DC or low frequency components. It requires the equivalent of a « baseline restorer », or double sampling.
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
9
Time measurementExample: the Constant Fraction Discriminator (CFD)Principle: Compensates for the time walk associated with the pulse height.
“Black” Threshold
“Blue” Threshold
ΔtSame for all amplitudes if Tr is constant
If Tr is not constant: Use a “delay line clip” ≤ than the shortest rise time
“Black” Threshold
“Blue” Threshold
ΔtSame again! (in the case of a linear rise time)
Clipped
Not Clipped
Threshold set at MAX * Fraction:Tr
Tr1
Tclipped
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
10
Time measurement, digital CFD implementation example
Step 1: Clip the raw data samples:F[n] = ai * FADC[n-i] ; (a0=1, aMinTr=-1) = FADC[n] – FADC[n-MinTr]
i=0,N
Step 2: Arm the “find Max” process when F[n] goes above a pre defined threshold (leading edge)
Step 3: Find the maximum value of F[n]
Step 4: Calculate the constant fraction threshold ( F[Max] * Fraction)
Step 5: Produce a delayed clipped pulse shape
Step 6: Find the two points of F[n] delayed on either side of the threshold level
Step 7: Interpolate the value between the two points
result: 1) Value of the index “n” at the crossover point 2) Time interpolation value (“vernier”) ( precision << sampling period)
=> “High resolution Time Stamp”
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
11
Timing resolution in the digital CFD
Δt
Tr
Sources of error in the presence of noise:
Amplitude
Time
fraction threshold
Error on the evaluation of the maximum = Nrms
Error on the evaluation of the fraction threshold = Nrms * Fraction
Error on the evaluation of the signal amplitude = Nrms
S
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
12
Timing resolution in the digital CFD (zoom)
Δt
Tr
fraction threshold
S
Extra source of errors for the discrete sampling:- linear intrapolation of the rise time function
Notes: - Valid for analog or digital CFD- independant of digital sampling rate to first order- Error may be much smaller than the sampling rate for large signal to noise (S/Nrms) ratios
Resulting error in the evaluation of time:
TError_rms = Nrms * (1+Fraction) * Tr/S
error
Position of the sample with no noise
Position of the sample with noise
nominal
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
13
The TIG-10 ModuleCharacteristics:
Form factor: VXI-CInterface :a) Stand-alone: VME-A24D16 :b) System: 200 MHz source synchronous LVDSNumber of channels: 10
Digitizers : 100 MHz 14-bit
Signal processing:Raw data - Trigger latency buffer - Data sample buffersCharge Channel: - Preamplifier decay pole deconvolution - Trapezoidal filter - Baseline restorerTiming channel - Hit detector - CFD - Trigger generate / accept logicData flow/control: - Parameters read/write - Event builder - Communication links
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
14
Example 4: the VF48 card, (Rev 0 shown)
48 Differencial ChannelsFADCs: - 10 bit, 20-65 MS/sec
Interfaces - Serial LVDS- VME64
Signal processing:7 Altera Cyclone FPGAs - Raw data segments- Hit detection- Charge calculation- Time stamp- Event formatting
Applications:TPC readout- ILC prototypes- TACTIC detector- PET readout
Silicon and scintillation detectors readout
ASIC preamp multiplexer readout (ALPHA)
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
15
Properties of the VF48 card
Form Factor : VME 6UNumber of channels : 48Number of bits : 10 (12 bits under development)Max sampling frequency : 65 MS/sec.Max number of samples/event : 2048 (for each channel)Interface: : 1) VME64X
2) Source synchronous serial, 200 mbits/sec, copper (RJ45)
Common system clock : From front panel connector or serial linkLocal trigger signalling output : Front panel conector or serial
linkTrigger accept input : « « «
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
16
Example 3, TIGRESS DAQ architecture
720 Signals + Aux.
720+ Channels
Local Collectors
Communication links
Detectors
Communication links
System concentrators
Interface to computers
Master
Communication links
Trigger requests,Data elements: -pulse shapes- charge- time- other “features”
Event fragments,(one crystal)
Sub Events,(oneclover or more)
Trigger decisionRun control (parameters)System clock
Optional logic signals
TIG-10
TIG-C
J.P.Martin, Université de Montréal, ILC EndCap Meeting, Paris, Sept 12-14 2006
17
Example 2, TIG-C serial readout module, PCB, component layer
12 RJ45 links connector
1 RJ45 master link connector(820 Mbit/sec. Max) VME64
Altera Stratix FPGA