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NiPt SALICIDE Process Optimization for

28nm CMOS Manufacturing

James M.M. Chu (Speaker)Application Dept. ManagerSE Asia/Greater China RegionFSI International

James.chu@fsi-intl.comISS

M 2

01

0

G-NumberISSM 2010 2

Si

NiPt Silicide for CMOS

GateStack

NiSiNiSi

STI STIC

on

tact

ele

ctr

od

e

Co

nta

ct e

lec

tro

de NiSi

Source DrainGate

NiSi

NiSi

Scaling

NiSi

65nm

45nm

28nm

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NiSi Encroachment Defects

65nm node and beyond : Ni(Pt 5-10%) replace Ni for defect control.But … residual surface Pt removal become a challenge !!!

Spiking

Piping

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MotivationsTo stay with current material (NiPt) and

chemistry (SPM) for SALICIDE formation

To scale NiSi into 28nm CMOS device

To optimize wet selective etch process– Support the residual NiPt removal on the film

thickness and Pt% proposed– Reduce the process cycle time

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NiPt Salicide ProcessProcess Flow (Fig.1)

Surface preparation: wet + dry in-situ

Metal Dep.: Ni(Pt) + TiN cap main focus of this presentation

1st Anneal (RTP-1): 200-300C range

Selective wet etching main focus of this presentation

2nd Anneal (RTP-2): > 500C

Defect inspection: SEM e-beam BVC inspection

WAT Measurement: Sheet Resistance / Uniformity

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Pt Reaction ModelCommon Pt reaction model

- Aqua regia base :

Pt + 4NO3- + 8H + Pt(4+) + NO2 + 4H2O

Pt(4+) + 6Cl - + 2H + H2PtCl6

- Hydrochloric acid base :

Pt + 2H2O2 + 4H + Pt(4+) + 4H2O

Pt(4+) + 6Cl - + 2H + H2PtCl6

Sulfuric Acid Peroxide Pt reaction model- Sulfuric acid base (main focus of this presentation)

Pt + H2SO4 + H2O2 Pt(OH)2++ + PtO++ + H2SO3

SilicideAttacked !

Take placeOn

high temperature

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Batch/SWProcessor Comparison

HT SPM

wafers wafers

Fig.2(a) Batch wafer type

Closed chamber

HT SPM

wafer

Fig.2(b) Single wafer type

Closed chamber

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A B C

NiPt Thickness

BV

C C

ou

nt

(a.u

.)

NiPt film thickness (same Pt%)

Pt% / NiPt Film Optimization on Rs/BVC

5% Pt 10% PtNiPt Film

BV

C C

ou

nt

(a.u

.)

x15

Low Pt %

Same NiPt film thickness

High Pt %

Fig.3(a) Pt additive on BVC performance Fig. 3(b) NiPt thickness vs. BVC

increasing film thickness

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NiPt film thickness (same Pt%)

A B C

NiPt Thickness

BV

C C

ou

nt

(a.u

.)

Sh

ee

t R

es

ista

nc

e (

a.u

.)

Linear Program for NiPt film thickness / Pt%

Pt% / NiPt Film Optimization on Rs/BVC

Fig.3(c) Ni thickness vs. Rs Fig.3(d) Linear program for Pt Additiveto NiPt film thickness for BVC and Rs

BVC - - - Rs - - -

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Process Window - Cycle Time

Low Pt% High Pt%

Batch type HT SPM Baseline

Pt-free

Batch type HT SPMBaseline

Dual CyclesPt-free

Single wafer type

HT SPM

Pt-free Pt-free

NiPt Thickness B

Pro

ces

s t

ime

(a.u

.)Fig. 4 (a) Process time comparison of batch type to single wafer type wet chemical etch processor

Fig.4 (b) Process cycle time improvement

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Process Window – SW Time

SPM Process time (s)

90 120 150 180 210

A Pt-free Pt-free Pt-free - -

B - Pt-free Pt-free Pt-free -

C - - Pt-free Pt-free Pt-free

High Pt%NiPt Thickness

(Å)

Table 1 Process window of single wafer wet etch processor over various Pt additive and NiPt film thickness

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a

Process Time

N_Diff

NU variation range 0.45%

b

Process Time

P_Diff

NU variation range 0.35%

d

Process Time

P_Poly

NU variation range 0.35%

c

Process Time

N_Poly

NU variation range 0.49%

Process SelectivityRs Uniformity Variation Range

Fig. 5 Rs Uniformity variation range by different wet etch process times

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Summary

• Satisfactory Rs/ Rs uniformity performance

• 15x Improvement on NiSi encroachment through BVC count

• 15x Improvement in cycle time with single wafer system

28nm NiPt Salicide process with co-optimization of NiPt film thickness, Pt additive and the complementary wet selective etch processor

Results