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8/7/2019 irfs3207zpbf
1/1104/07/
Benefits
l Improved Gate, Avalanche and Dynamicdv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche SOAl Enhanced body diode dV/dt and dI/dt
Capability
www.irf.com 1
IRFB3207ZPbFIRFS3207ZPbF
IRFSL3207ZPbFApplicationsl High Efficiency Synchronous Rectification in
SMPSl Uninterruptible Power Supplyl High Speed Power Switchingl Hard Switched and High Frequency Circuits
HEXFETPower MOSFET
S
D
G
G D S
Gate Drain Source
TO-220ABIRFB3207ZPbF
D
S
DG
DD
SG
D2Pak
IRFS3207ZPbFTO-262
IRFSL3207ZPbF
SDG
VDSS 75V
RDS(on) typ. 3.3m:
max. 4.1m:
ID (Silicon Limited) 170Ac
ID (Package Limited) 120A
Absolute Maximum RatingsSymbol Parameter Units
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100C Continuous Drain Current, VGS @ 10V (Silicon Limited) A
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Wire Bond Limited)IDM Pulsed Drain Current d
PD @TC = 25C Maximum Power Dissipation W
Linear Derating Factor W/C
VGS Gate-to-Source Voltage V
dv/dt Peak Diode Recovery f V/ns
TJ Operating Junction and C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche CharacteristicsEAS (Thermally limited) Single Pulse Avalanche Energye mJ
IAR Avalanche Currentd A
EAR Repetitive Avalanche Energy g mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case k 0.50
RCS Case-to-Sink, Flat Greased Surface , TO-220 0.50 C/W
RJA Junction-to-Ambient, TO-220 k 62
RJA Junction-to-Ambient (PCB Mount) , D2Pakjk 40
170
See Fig. 14, 15, 22a, 22b
300
16
-55 to + 175
20
2.0
10lbxin (1.1Nxm)
300
Max.
170c
120c
670120
PD - 97213C
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Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 120A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25C, L = 0.033mHRG = 25, IAS = 102A, VGS =10V. Part not recommended for use
above this value.
S
D
G
ISD 75A, di/dt 1730A/s, VDD V(BR)DSS, TJ 175C.
Pulse width 400s; duty cycle 2%.Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-99
R is measured at TJ approximately 90C.
Static @ TJ = 25C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. UnitsV(BR)DSS Drain-to-Source Breakdown Voltage 75 V
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient 0.091 V/C
RDS(on) Static Drain-to-Source On-Resistance 3.3 4.1 mVGS(th) Gate Threshold Voltage 2.0 4.0 V
RG(int) Internal Gate Resistance 0.80 IDSS Drain-to-Source Leakage Current 20 A
250
IGSS Gate-to-Source Forward Leakage 100 nA
Gate-to-Source Reverse Leakage -100
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
gfs Forward Transconductance 280 S
Qg Total Gate Charge 120 170 nC
Qgs Gate-to-Source Charge 27
Qgd Gate-to-Drain ("Miller") Charge 33
Qsync Total Gate Charge Sync. (Qg - Qgd) 87
td(on) Turn-On Delay Time 20 ns
tr Rise Time 68
td(off) Turn-Off Delay Time 55
tf Fall Time 68
Ciss Input Capacitance 6920 pF
Coss Output Capacitance 600
Crss Reverse Transfer Capacitance 270
Coss eff. (ER) Effective Output Capacitance (Energy Related)i 770
Coss eff. (TR) Effective Output Capacitance (Time Related)h 960
Diode CharacteristicsSymbol Parameter Min. Typ. Max. Units
IS Continuous Source Current 170c
A(Body Diode)
ISM Pulsed Source Current 670
(Body Diode)di
VSD Diode Forward Voltage 1.3 V
trr Reverse Recovery Time 36 54 ns TJ = 25C VR = 64V,
41 62 TJ = 125C IF = 75A
Qrr Reverse Recovery Charge 50 75 nC TJ = 25C di/dt = 100A/s g
67 100 TJ = 125C
IRRM Reverse Recovery Current 2.4 A TJ = 25C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions
VDS = 50V, ID = 75A
ID = 75A
VGS = 20V
VGS = -20V
MOSFET symbolshowing the
VDS = 38V
Conditions
VGS = 10V g
VGS = 0V
VDS = 50V
= 1.0MHz
VGS = 0V, VDS = 0V to 60V j
VGS = 0V, VDS = 0V to 60V h
TJ = 25C, IS = 75A, VGS = 0Vg
integral reverse
p-n junction diode.
ConditionsVGS = 0V, ID = 250A
Reference to 25C, ID = 5mAd
VGS = 10V, ID = 75A g
VDS = VGS, ID = 150A
VDS = 75V, VGS = 0V
VDS = 75V, VGS = 0V, TJ = 125C
ID = 75A
RG = 2.7
VGS = 10V g
VDD = 49V
ID = 75A, VDS =0V, VGS = 10V
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Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID,Drain-to-Sourc
eCurrent(A)
VGSTOP 15V
10V8.0V6.0V5.5V5.0V4.8V
BOTTOM 4.5V
60s PULSE WIDTHTj = 25C
4.5V
2 3 4 5 6 7
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID,Drain-to-SourceCurrent(A)
TJ = 25C
TJ = 175C
VDS = 25V
60s PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (C)
0.5
1.0
1.5
2.0
2.5
RDS(on),Drain-to-SourceOnResistance
(Normalized)
ID = 75A
VGS = 10V
1 10 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C,Capacitance(pF)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = CgdCoss = Cds + Cgd
Coss
Crss
Ciss
0 20 40 60 80 100 120 140
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
VGS,Gate-to-Sourc
eVoltage(V)
VDS= 60V
VDS= 38V
VDS= 15V
ID= 75A
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID,Drain-to-Sourc
eCurrent(A)
4.5V
60s PULSE WIDTHTj = 175C
VGSTOP 15V
10V8.0V6.0V5.5V5.0V4.8V
BOTTOM 4.5V
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Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 11. Typical COSS Stored Energy
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
0.0 0.5 1.0 1.5 2.0 2.5
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD,ReverseDra
inCurrent(A)
TJ = 25C
TJ = 175C
VGS = 0V
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Temperature ( C )
70
75
80
85
90
95
100
V(BR)D
SS,
Drain-to-SourceBreakdownVoltage(V)
Id = 5mA
-10 0 10 20 30 40 50 60 70 80
VDS, Drain-to-Source Voltage (V)
0.0
0.5
1.0
1.5
2.0
2.5
Energy(
J)
1 10 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
10000
ID,Drain-to-SourceCurrent(A)
OPERATION IN THIS AREALIMITED BY RDS(on)
Tc = 25CTj = 175CSingle Pulse
100sec
1msec10msec
DC
25 50 75 100 125 150 175
TC , Case Temperature (C)
0
20
40
60
80
100
120
140
160
180
ID, DrainCurrent(A)
Limited By Package
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (C)
0
100
200
300
400
500
600
700
EAS,SinglePulseAvala
ncheEnergy(mJ) ID
TOP 17A
30A
BOTTOM102A
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Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:(For further info, see AN-1005 at www.irf.com)1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far inexcess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.3. Equation below based on circuit and waveforms shown in Figures 16a, 16b4. PD (ave) = Average power dissipation per single avalanche pulse.5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceedTjmax (assumed as
25C in Figure 14, 15).tav = Average time in avalanche.D = Duty cycle in avalanche = tav f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3BVIav) =DT/ ZthJC
Iav =2DT/ [1.3BVZth]
EAS (AR) = PD (ave)tav
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
ThermalRespon
se(Z
thJC
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE( THERMAL RESPONSE )
Notes:1. Duty Factor D = t1/t22. Peak Tj = P dm x Zthjc + Tc
Ri (C/W) i (sec)
0.1049 0.000099
0.2469 0.001345
0.1484 0.008469
J
J
1
1
2
2
3
3
R1R1 R2
R2 R3R3
C
Ci= i/Ri
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (C)
0
20
40
60
80
100
120
140
160
180
200
EAR
,AvalancheEnergy(mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 102A
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
AvalancheCurrent(A)
0.05
Duty Cycle =Single Pulse
0.10
Allowed avalanche Current vs avalanchepulsewidth, tav, assuming j = 25C andTstart = 150C.
0.01
Allowed avalanche Current vs avalanchepulsewidth, tav, assuming Tj = 150C andTstart =25C (Single Pulse)
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Fig. 17 - Typical Recovery Current vs. dif/dtFig 16. Threshold Voltage vs. Temperature
Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt
Fig. 20 - Typical Stored Charge vs. dif/dt
-75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Temperature ( C )
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS(th),G
atethres
holdVoltage(V)
ID = 150A
ID = 250A
ID = 1.0mA
ID = 1.0A
0 200 400 600 800 1000
diF/dt (A/s)
0
5
10
15
20
IRR(
A)
IF = 45A
VR = 64V
TJ = 25C
TJ = 125C
0 200 400 600 800 1000
diF/dt (A/s)
0
5
10
15
20
IRR(
A)
IF = 30A
VR = 64V
TJ = 25C
TJ = 125C
0 200 400 600 800 1000
diF/dt (A/s)
20
100
180
260
340
QRR(
A)
IF = 30A
VR = 64V
TJ = 25C
TJ = 125C
0 200 400 600 800 1000
diF/dt (A/s)
20
100
180
260
340
QRR(A
)
IF = 45A
VR = 64V
TJ = 25C
TJ = 125C
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Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms
VGS
VDS
90%
10%
td(on) td(off)tr tf
VGS
Pulse Width < 1sDuty Factor < 0.1%
VDD
VDS
LD
D.U.T
+
-
Fig 21b. Unclamped Inductive WaveformsFig 21a. Unclamped Inductive Test Circuit
tpV(BR)DSS
IAS
RG
IAS
0.01tp
D.U.T
LVDS
+-
VDD
DRIVER
15V
20VVGS
Fig 23a. Gate Charge Test Circuit Fig 23b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-ChannelHEXFETPower MOSFETs
1K
VCCDUT
0
L
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W.Period
di/dt
Diode Recoverydv/dt
Ripple 5%
Body Diode Forward Drop
Re-AppliedVoltage
Reverse
RecoveryCurrent
Body Diode ForwardCurrent
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D =P.W.
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+-
-
-
RGVDD dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
Inductor Current
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TO-220AB packages are not recommended for Surface Mount Application.
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
@ Y 6 H Q G @ )
D I U C @ 6 T T @ H 7 G ` G D I @ 8
U C D T D T 6 I D S A
G P U 8 P 9 @ & ' (
6 T T @ H 7 G @ 9 P I X X ( ( ( &
Q 6 S U I V H 7 @ S
6 T T @ H 7 G `
G P U 8 P 9 @
9 6 U @ 8 P 9 @
` @ 6 S & 2 ( ( &
G D I @ 8
X @ @ F (
G P B P
S @ 8 U D A D @ S
D I U @ S I 6 U D P I 6 G
Note: "P" in assembly lineposition indicates "Lead-Free"
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D2Pak (TO-263AB) Part Marking Information
D2Pak (TO-263AB) Package OutlineDimensions are shown in millimeters (inches)
9 6 U @ 8 P 9 @
` @ 6 S 2 !
X @ @ F !
6 2 6 T T @ H 7 G ` T D U @ 8 P 9 @
S @ 8 U D A D @ S
D I U @ S I 6 U D P I 6 G
Q 6 S U I V H 7 @ S
Q 2 9 @ T D B I 6 U @ T G @ 6 9 A S @ @
Q S P 9 V 8 U P Q U D P I 6 G
A $ " T
D I U C @ 6 T T @ H 7 G ` G D I @ G
6 T T @ H 7 G @ 9 P I X X ! !
U C D T D T 6 I D S A $ " T X D U C
G P U 8 P 9 @ ' ! #
D I U @ S I 6 U D P I 6 G
G P B P
S @ 8 U D A D @ S
G P U 8 P 9 @
6 T T @ H 7 G `
` @ 6 S 2 !
Q 6 S U I V H 7 @ S
9 6 U @ 8 P 9 @
G D I @ G
X @ @ F !
25
A $ " T
G P B P
6 T T @ H 7 G `
G P U 8 P 9 @
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/pkhexfet.html
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10 www.irf.com
TO-262 Part Marking Information
TO-262 Package OutlineDimensions are shown in millimeters (inches)
G P B P
S @ 8 U D A D @ S
D I U @ S I 6 U D P I 6 G
G P U 8 P 9 @
6 T T @ H 7 G `
G P B P
S @ 8 U D A D @ S
D I U @ S I 6 U D P I 6 G
9 6 U @ 8 P 9 @
X @ @ F (
` @ 6 S & 2 ( ( &
Q 6 S U I V H 7 @ S
6 2 6 T T @ H 7 G ` T D U @ 8 P 9 @
25
Q S P 9 V 8 U P Q U D P I 6 G
Q 2 9 @ T D B I 6 U @ T G @ 6 9 A S @ @
@ Y 6 H Q G @ ) U C D T D T 6 I D S G " " G
G P U 8 P 9 @ & ' (
6 T T @ H 7 G `
Q 6 S U I V H 7 @ S
9 6 U @ 8 P 9 @
X @ @ F (
G D I @ 8
G P U 8 P 9 @
` @ 6 S & 2 ( ( &
6 T T @ H 7 G @ 9 P I X X ( ( ( &
D I U C @ 6 T T @ H 7 G ` G D I @ 8
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/pkhexfet.html
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Data and specifications subject to change without notice
This product has been designed and qualified for the Industrial market
Qualification Standards can be found on IRs Web site
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903Visit us at www.irf.com for sales contact information. 04/08
D2Pak (TO-263AB) Tape & Reel InformationDimensions are shown in millimeters (inches)
3
4
4
TRR
FEED DIRECTION
1.85 (.073)1.65 (.065)
1.60 (.063)1.50 (.059)
4.10 (.161)3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)10.70 (.421)
16.10 (.634)15.90 (.626)
1.75 (.069)1.25 (.049)
11.60 (.457)11.40 (.449)
15.42 (.609)15.22 (.601)
4.72 (.136)4.52 (.178)
24.30 (.957)23.90 (.941)
0.368 (.0145)0.342 (.0135)
1.60 (.063)1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00(14.173)MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)MAX.
26.40 (1.039)24.40 (.961)
NOTES :1. COMFORMS TO EIA-418.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/pkhexfet.html