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Lovely Professional University, PunjabCourse Code Course Title Course Planner Lectures Tutorials Practicals CreditsECE213 DIGITAL ELECTRONICS 13402::Bharat Sanklecha 3.0 0.0 0.0 3.0Course Category Courses with conceptual focus
TextBooks Sr No Title Author Edition Year Publisher NameT-1 Digital Design Principles and
PracticesJohn F. Wakerly 4th 2008 Pearson Education, Inc.
Reference BooksSr No Title Author Edition Year Publisher NameR-1 Digital Fundamentals Thomas L. Floyd , R. P
Jain8th Pearson
R-2 Digital Electronics Principles and Integrated Circuits
Anil K Maini 1st Wiley
R-3 Digital Integrated Electronics H. Taub and D. Schilling 1st 2008 M. G.HillsR-4 Analysis & Design of Digital
Integrated CircuitsResve Saleh, David Hodges, Horace Jackson
3rd 2005 M. G.Hills
Relevant WebsitesSr No (Web address) (only if relevant to the course) Salient FeaturesRW-1 http://www.tutorialspoint.com/computer_logical_organization/octal_arithmetic.htm Octal and hexadecimal Aritmetic
Audio Visual AidsSr No (AV aids) (only if relevant to the course) Salient FeaturesAV-1 http://nptel.iitm.ac.in/video.php?subjectId=117106086 Video LecturesAV-2 http://filebox.ece.vt.edu/~jgtront/introcomp/flipflop_noaudio.swf Animation of flip Flops
Software/Equipments/Databases
Sr No (S/E/D) (only if relevant to the course) Salient FeaturesSW-1 Proteus Circuit Design and Simulation Tool
Virtual Labs
Sr No (VL) (only if relevant to the course) Salient FeaturesVL-1 http://www.digital.iitkgp.ernet.in/dec/index.php Circuit Simulation
LTP week distribution: (LTP Weeks)
Week Number
Lecture Number
Broad Topic(Sub Topic) Chapters/Sections of Text/reference books
Other Readings,Relevant Websites, Audio Visual Aids, software and Virtual Labs
Lecture Description Learning Outcomes Pedagogical ToolDemonstration/ Case Study / Images / animation / ppt etc. Planned
Week 1 Lecture 1 Number Systems(Digital Systems) T-1:Chapter 1 Section 1.1 and 1.2
Lecture will explain the digital systems in detail with all system requirement
Students will understand basic difference between analog and digital systems
Number Systems(Data representation and coding)
T-1:Chapter 1 Section 1.4
Lecture will explain the Electronic aspect of digital design
how to represent data in different formats
Lecture 2 Number Systems(Logic circuits) T-1:Chapter 3 Section 3.1
How to design basic logic circuits using examples
designing of basic logic circuits
Lecture 3 Number Systems(Implementation of digital systems)
T-1:Chapter 1 Section 1.1 and 1.2
practical aspects of digital system
understanding a digital system its applications and advantages
Number Systems(Number Systems)
R-2:Chapter 1 Section 1.2
Lecture will explain about different mathematical notations that will represent numbers of given set
Different methods of expressing numbers with symbols
Number Systems(Codes- Positional number system)
T-1:Chapter 2 Section 2.1
Lecture will explain placevalue notation is a method of representing or encoding numbers
use of the same symbol for the different orders of magnitude
Week 2 Lecture 4 Number Systems(Binary number system)
R-2:Chapter 1 Section 1.4
Lecture will explain the usual base 2 system that is a positional notation with a radix of 2
Representation of numeric values using two symbols 0 and 1 and its simplicity in digital system
Number Systems(Methods of base conversions)
T-1:Chapter 2 Section 2.3
Lecture will explain the substitution,Division and Summation method for general positional number system conversions
Conversion of one number system to another number system
Detailed Plan For Lectures
Weeks before MTE 7
Weeks After MTE 7
Spill Over 3
Week 2 Lecture 4 Number Systems(Binary arithmetic)
T-1:Chapter 2 Section 2.4 section
2.8 and 2.9
Binary addition Subtraction Multiplication and division
Students will understand basic rules of binary addition subtraction Multiplication and Division method
Lecture 5 Number Systems(Representation of signed numbers)
T-1:Chapter 2 Section 2.5
Lecture will explain representation of negative numbers using simple and complement method
Different formats used for binary representation of negative numbers
Number Systems(Fixed numbers) R-2:Chapter 1 Section 1.2
Introduction to number system and its represntation
Difference between representation of fixed and floating point number system
Lecture 6 Number Systems(Binary coded decimalcodes)
T-1:Chapter 2 Section 2.10
Lecture will explain the method to represent decimal numbers using 8421 excess 3 and 2421 code
Students will understand how digital devices process and display numbers in tens
Number Systems(Gray codes) T-1:Chapter 2 section 2.11
Lecture will explain two ways to construct a gray code one is reflected code and other is n bit method
Students will understand the Electromechanical applications of digital systems
Week 3 Lecture 7 Number Systems(Error detection code)
T-1:Chapter 2 Section 2.15
Lecture will explain different error detection codes and how to detect one bit two bit and three bit error using these codes
students will be able to detect the error in the different codes using these techniques
Number Systems(Parity check codes)
R-2:Chapter 1 Section 1.23
Lecture explain error detection technique by adding extra bits
Students will understand even and odd parity error detection technique
Lecture 8 Number Systems(octal number system)
T-1:Chapter 2 Section 2.2
RW-1 Lecture will explain the representation of number using radix 8
Students will understand the representation of multi bit numbers using radix radix 8
Number Systems(Hexadecimal number system)
T-1:Chapter 2 Section 2.16
Lecture will explain the representation of number using radix 16
Students will understand the representation of multi bit numbers using radix radix 16
Week 3 Lecture 9 Number Systems(Error correction code)
T-1:Chapter 2 Section 2.15
Lecture will explain different error correction codes and how to correct one bit two bit and three bit error using these codes
students will be able to correct the error in the different codes using these techniques
Number Systems(Hamming code) T-1:Chapter 2 Section 2.15.3
Lecture 9 will explain the Hamming codes that is the one bit error correction code on message of any length and Lecture 10 is reserved for contingency
Students will understand the complete algorithm and its use in telecommunication , computing and other applications
Week 4 Lecture 10 Number Systems(Hamming code) T-1:Chapter 2 Section 2.15.3
Lecture 9 will explain the Hamming codes that is the one bit error correction code on message of any length and Lecture 10 is reserved for contingency
Students will understand the complete algorithm and its use in telecommunication , computing and other applications
Lecture 11 Number Systems(Octal arithmetic) T-1:Chapter 2 Section 2.2
RW-1 Octal addition and subtraction
students will understand to perform arithmetic operations with the numbers of radix 8
Number Systems(Hexadecimal arithmetic)
T-1:Chapter 2 Section 2.2
RW-1 Hexadecimal addition and subtraction
students will understand to perform arithmetic operations with the numbers of radix 16
test 1 allocation
Lecture 12 Number Systems(Floating point numbers)
R-2:Chapter 1 Section 1.17
Lecture will explain the conventional representation of small fractional or mixed numbers
Students will understand the most common format for representing floating point numbers
mini project allocation
Week 5 Lecture 13 Combinational Logic System(Truth table)
T-1:Chapter 3 Section 3.1
Lecture will explain the three basic logic functions AND OR and NOT and its use to build any combinational digital logic circuit
Students will be able to design the combinational circuits using basic gates
Combinational Logic System(Basic logic operation)
T-1:Chapter 3 Section 3.1
Lecture will explain basic logic operations using simple gates and lecture will explain the all these basic gates in detail
Students will be able to design combinational circuits by understanding these basic gates
Lecture 14 Combinational Logic System(Basic postulates)
T-1:Chapter 4 Section 4.1.1
Lecture will explain the basic axioms of a mathematical system
Students will understand that how digital abstraction will take place
Week 5 Lecture 14 Combinational Logic System(Standard representation of logic functions -SOP forms)
T-1:Chapter 4 Section 4.3.5
Lecture will explain the method of reducing the complex logic expression into simple logic expression using SOP reduction method
Students will understand how to design digital circuits using minimum logic gates
Lecture 15 Quiz,Test,Mini project 1Week 6 Lecture 16 Combinational Logic System
(Simplification of switching functions - K-map)
T-1:Chapter 4 Section 4.3.2
Graphical representation of logic function truth table
Input combination for any cell can be easily determined and circuit simplification
Combinational Logic System(Quine-McCluskey tabular methods)
T-1:Chapter 4 Section 4.4.1
Algorithm for circuit minimization
How to reduce number of components by using truth table
Lecture 17 Combinational Logic System(Synthesis of combinational logic circuits)
T-1:Chapter 4 Section 4.3
SW-1 Different methods of synthesis like canonical SOP,POS and truth table method
How to design combinational logic circuits
Simulation of Basic gates on Proteus
Combinational Logic System(Logic gates)
R-2:Chapter 3 Section 3.3
SW-1 all the logic gates with truth tables and logic symbols
how to implement these logic gates in boolean expression
Simulation of Basic gates on Proteus
Combinational Logic System(Fundamental theorems of Boolean algebra)
R-1:Chapter 1 Section 1.6
Representation of binary variables in letters
Understanding of duals or boolean algebra theorems
Combinational Logic System(Standard representation of logic functions POS forms)
T-1:Chapter 4 Section 4.3.6
Lecture will explain the method of reducing the complex logic expression into simple logic expression using POSreduction method
Students will understand how to design digital circuits using minimum logic gates
Lecture 18 Logic Families(Introduction to different logic families)
R-1:Chapter 4 Section 4.1
Unipolar and Bipolar Logic Families
understanding of group of compatible ICs with the same logic levels and supply voltages
Logic Families(Operational characteristics of BJT)
T-1:Chapter 3 Section 3.9.3
Characteristics of Transistors
How to use BJTs for designing Digital circuits using there characteristics
Logic Families(Operational characteristics of MOSFET as switch)
R-1:Chapter 3 Section 3.7
Designing of digital switches
How to use on off logic using MOSFETs
Logic Families(TTL inverter) T-1:Chapter 3 Section 3.2
Not gate implementation using TTL logic
understanding of different logic implementation using TTLs
Logic Families(CMOS inverter) T-1:Chapter 3 Section 3.3.3
Not gate implementation using CMOS
Understand the use of NMOS and PMOS for designing different gates
Week 6 Lecture 18 Logic Families(Structure and operations of TTL gates)
R-1:Chapter 4 Section 4.8
TTL gate with totem pole output driver and implementation of gates
Design of different gates using TTL
Week 7 Lecture 19 Logic Families(Electrical characteristics of logic gates)
T-1:Chapter 3 Section 3.5
Behaviour of logic gates problems with logic gates in real time
Logic Families(Decoders) T-1:Chapter 5 Section 5.4
SW-1 Multiple inputs and multiple outputs logic circuit
How to convert coded inputs into coded outputs
Simulation of decoder on proteus
Logic Families(Encoders) T-1:Chapter 5 Section 5.5
SW-1 Coding the output of decoder into fewer bits like using priority encoder
How to minimize the output before sending it on channel
Simulation of encoder on proteus
Logic Families(Multiplexers) T-1:Chapter 5 Section 5.7
SW-1 Circuits used to send multiple inputs on a single channel like 2 raise to the power n t0 1 MUX
Digital circuits used to combine the data on a single channel and how to simplify the circuit designingh
Simulation of multiplexer on proteus
Logic Families(Demultiplexers) T-1:Chapter 5 Section 5.7.3
Circuits used to send single inputs on a multiple channels after decoding it
Digital circuits used to separate the data and send it on multiple channels
Logic Families(Parity circuits) T-1:Chapter 5 Section 5.8
Even parity and odd parity circuits
Understanding of different circuits that will be used for error correction
Logic Families(Adders) T-1:Chapter 5 Section 5.10
SW-1 Half adder and Full adder
How to design and perform addition operation in ALU using Digital circuits
simulation of adder on proteus
Lecture 20 Logic Families(Subtractors) T-1:Chapter 5 Section 5.10
SW-1 Half subtracter and full subtracter
How to design and perform subtraction operation in ALU using Digital circuits
Simulation of Subtractor on proteus
Logic Families(ALU) R-1:Chapter 6 Section 6.6
Block diagram of 74181 how to design ALU using digital gates
Logic Families(Comparators) R-1:Chapter 6 Section 6.7
2 bit and 4 bit comparator
Students will be able to design comparators and use them for comparison of bits
Logic Families(Structure and operations of CMOS gates)
R-1:Chapter 4 Section 4.14
Lecture 20 will cover all the basic gates using NMOS and PMOS combinations and Lecture 21 will be reserved for contingency
students will be able to design any gate using CMOS technology
Week 7 Lecture 21 Logic Families(Structure and operations of CMOS gates)
R-1:Chapter 4 Section 4.14
Lecture 20 will cover all the basic gates using NMOS and PMOS combinations and Lecture 21 will be reserved for contingency
students will be able to design any gate using CMOS technology
MID-TERMWeek 8 Lecture 22 Sequential Logic systems
(Definition of state machines)T-1:Chapter 7
Section 7.1AV-1 What is state machine,
use of machine Basics of state machines
Video lectures
Lecture 23 Sequential Logic systems(State machine as a sequential controller)
T-1:Chapter 7 Section 7.3
AV-1 application of state machine to design sequential circuit
How to design sequential circuits using state machines
Lecture 24 Sequential Logic systems(Basic sequential circuits)
T-1:Chapter 7 Section 7.3
explanation of basic sequential circuit and its major component
Understand the designing of state machines like basic flip flops
Week 9 Lecture 25 Sequential Logic systems(SR-latch)
T-1:Chapter 7 Section 7.2.1 and
7.2.2 and 7.2.3
AV-2 Explanation of basic SR latchits circuits and component and its working
Basic working of SET RESET LATCH,its drawbacks and applications
Animation
Lecture 26 Sequential Logic systems(D-latch) T-1:Chapter 7 Section 7.2.4 and
7.2.5
AV-2 Explanation of basic D latch circuit and its working
How to store a single bit of information and how to design this basic flip flop using gates
AnimationQuiz allocation
Lecture 27 Sequential Logic systems(D flip-flop)
T-1:Chapter 7 Section 7.2.5 and
7.2.6
AV-2 Explanation of D flip flop circuit and its working
Difference between latch and flip flop and its circuit
Animation
Week 10 Lecture 28 Sequential Logic systems(JK flip-flop)
T-1:Chapter 7 Section 7.2.9 and
7.2.10
AV-2 Explanation of JK flip flop circuit and its working
How to improve drawbacks of JK Flip Flop
Animation
Lecture 29 Sequential Logic systems(T flip-flop)
T-1:Chapter 7 Section 7.2.11
AV-2 Explanation of T flip flop circuit and its working
Use of toggle flip flop its applications and working
Animation
Sequential Logic systems(Timing hazards and races)
T-1:chapter 7 section 7.9.3
What is hazards and race condition in flip flop
Why race condition its drawback and how to avoid it practiaclly
Lecture 30 Sequential Logic systems(Analysis of state machines using D flip-flops)
T-1:chapter 7 section 7.4.6
Lecture 30 is for How to design state machine by using D Flip Flop and its simplificationLecture 31 is reserved for contingency
Designing of state machines using flip flops
Week 11 Lecture 31 Sequential Logic systems(Analysis of state machines using D flip-flops)
T-1:chapter 7 section 7.4.6
Lecture 30 is for How to design state machine by using D Flip Flop and its simplificationLecture 31 is reserved for contingency
Designing of state machines using flip flops
Lecture 32 Quiz,Test,Mini project 2Lecture 33 Sequential Logic systems(Design
of state machines)T-1:chapter 7 section
7.5AV-1 How to design state
tables and state machines and its use in real world
applications of state machines in real world like in controlling the rear lights of the car system
Sequential Logic systems(Designing state machine using ASM charts)
T-1:chapter 7 section 7.12
AV-1 Introduction about Algorithmic State Machine
Designing of Sequential circuits using ASM charts
Week 12 Lecture 34 Sequential Logic systems(Designing state machine using state diagram)
T-1:chapter 7 section 7.5
AV-1 How to design state tables and state machines and its use in real world
applications of state machines in real world like in controlling the rear lights of the car system
Lecture 35 Sequential Logic systems(Analysis of state machines using JK flip-flops)
T-1:chapter 7 section 7.3.5
how to implement State machines using JK Flip flop or the clocked synchronous state machine design
what are drawbacks of implementing state machines using other flip flops and how they can be removed by using this Flip Flop
Lecture 36 Sequential logic Application(Multi-bit latches)
T-1:chapter 8 section 8.2.5
introduction hazard free logic circuits
How to design latches which can have large number of bits
Mini Project Submission
Week 13 Lecture 37 Sequential logic Application(Registers)
T-1:chapter 8 section 8.2.5 and 8.2.6
VL-1 How to combine two more flip flops and give them common clock to design a register
to store a collection of related bits
Virtual labs
Sequential logic Application(Shift register)
T-1:chapter 8 section 8.5
VL-1 How to design a system that will shift one bit of data at each tick of clock
practical applications of shift registers like in moving displays etc
Virtual labs
Lecture 38 Memory(Read-only memory) R-1:chapter 14 section 14.5
ROM architecture,Types and its applications
Internal structure of ROM with its appliactions
Memory(read/write memory - SRAM and DRAM)
R-1:chapter 14 section 14.4
basic building blocks of RAM Cell and its internal structure
Difference between static and dynamic RAM its applications and internal structure
Sequential logic Application(Counters)
T-1:chapter 8 section 8.4
VL-1 to design a clocked sequential circuit whose state diagram contains a single cycle ripple,synchronous and asynchronous counters
to design counters and use them in real time applications
Virtual labs
Week 13 Lecture 39 Memory(PLAs and their applications)
T-1:chapter 5 section 5.3
How to realize any SOP Logic expression using two level AND OR device
Applications and designing of PLAs
Memory(Sequential PLDs and their applications)
T-1:chapter 8 section 8.3
Designing of Bipolar sequential PLDs and and Sequential GAL devices
Appliacations of PLDs and its designing
Week 14 Lecture 40 Memory(State- machine design with sequential PLDs)
T-1:chapter 9 section 9.1
applications of PLDs in State Machine Design
PLDs and PLAs its difference in designing and state machines
Memory(Introduction to field programmable gate arrays)
R-1:Chapter 12 Section 12.6
Logic cell array and its design
how to increase the effective size and to add more functionality in a single programmable device
Lecture 41 Memory(PALs and their applications)
T-1:chapter 8 section 8.3.4
Lecture 41 introduction to PLA , functioning and designing and application of PALsLecture 42 is reserve for contingency
applications of PALs
Lecture 42 Memory(PALs and their applications)
T-1:chapter 8 section 8.3.4
Lecture 41 introduction to PLA , functioning and designing and application of PALsLecture 42 is reserve for contingency
applications of PALs
SPILL OVERWeek 15 Lecture 43 Spill Over
Lecture 44 Spill Over
Lecture 45 Spill Over
Scheme for CA:Component Frequency Out Of Each Marks Total Marks
Quiz,Test,Mini project 2 3 10 20Total :- 10 20
Details of Academic Task(s)
AT No. Objective Topic of the Academic Task Nature of Academic Task(group/individuals/field
work
Evaluation Mode Allottment / submission Week
Quiz 1 To Test Basic Knowledge about subject
MCQ based test. Level of question will be similar to gate. Individual Performance in Test 9 / 10
Test 1 To test the knowledge about subject
Analytical question Individual Performance in Test 4 / 5
Mini project 1 To test design skills of students
Mini project to design digital circuit on hardware. Group size not more than 4
Group Based on innovation and quality
4 / 12