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[footnoteRef:1] [1: The authors would like to thank the
UGC-UKIERI for financial support (Grant numbers 2017/18-015 and
184-15/2018(IC)). N. Mohammadian is with the Department of
Electrical and Electronic Engineering, The University of
Manchester, Manchester, M13 9PL, UK(e-mail:
[email protected]).B. C. Das is with the
Department of Physics, Indian Institute of Science Education and
Research, Thiruvananthapuram, Maruthamala PO, Vithura, Kerala
695551, India (e-mail: [email protected]).L. A. Majewski is with
the is with the Department of Electrical and Electronic
Engineering, The University of Manchester, Manchester, M13 9PL, UK
(e-mail: [email protected]).]
Low-voltage IGZO TFTs using solution-deposited OTS-modified
Ta2O5 dielectric
N. Mohammadian, Member, IEEE, B. C. Das, and L. A. Majewski,
Senior Member, IEEE
Abstract— Low voltage, high performance thin film transistors
(TFTs) that use amorphous metal oxide (MO) semiconductors as the
active layer have been getting tremendous attention due to their
essential role in future portable electronic devices and systems.
However, reducing the operating voltage of these devices to or
below 1 V is a very challenging task because it is very difficult
to obtain low threshold voltage (VTH), small subthreshold swing
(SS) MO TFTs. In this paper, indium gallium zinc oxide (IGZO) TFTs
that use solution-deposited Ta2O5 operating at 1 V are
demonstrated. To enhance the dielectric properties of the
fabricated ultra-thin (d ~ 22 ± 2 nm) tantalum pentoxide films,
n-octadecyltrichlorosilane (OTS) self-assembled monolayer (SAM) was
used. The morphology and electrical properties of both pristine and
OTS-treated Ta2O5 films have been studied. The optimized Ta2O5/OTS
IGZO TFTs operate at 1 V with saturation field-effect mobility
larger than 2.3 cm2/Vs, threshold voltage of around 400 mV,
subthreshold swings below 90 mV/dec, and current on-off ratios well
above 105. The performance of the presented TFTs is high enough for
many commercial applications such as disposable sensors or
throwaway, low-end electronics significantly reducing the cost of
their production.
Index Terms— Low voltage thin film transistors (TFTs), Tantalum
pentoxide, Anodization, Self-assembled monolayer (SAM), Indium
gallium zinc oxide (IGZO).
INTRODUCTION
M
etal oxides (MOs) play a very important role in many areas of
chemistry, physics, and materials science. Since the metal elements
can form a large diversity of oxide compounds these elements can
adopt many structural geometries with an electronic structure that
can exhibit metallic, semiconductor, or insulator character. In
practical applications, MOs are used in sustainable wastewater
treatment and energy production [1], solar-driven conversion of CO2
to hydrocarbons [2], solar-driven water splitting [3], as well as
the fabrication of supercapacitors [4], aqueous solar cells [5],
gas and pressure sensors [6, 7], piezoelectric devices, fuel cells
[8], and microelectronic circuits. Indeed, most of the modern
electronic chips used in electronic devices contain an oxide
component. Amongst MOs, high-k oxide dielectrics such as Al2O3,
ZrO2, HfO2, TiO2, Y2O3, CeO2, and Ta2O5 have drawn a lot of
attention in recent years because they can be used in the
fabrication of high-performance thin film capacitors (TFCs) [9],
low voltage thin film transistors (TFTs) [10] and TFT-based bio-
and chemical sensors [11]. Typically, to deposit high quality metal
oxide dielectric films sophisticated deposition techniques such as
atomic layer deposition (ALD), pulsed laser deposition (PLD),
chemical vapor deposition (CVD) and radio frequency (RF) magnetron
sputtering are used. However, these techniques require expensive
equipment and depend on controlled environment and temperature
which significantly increases the material and device processing
costs. The next generation of thin film electronic devices and
systems will have limited power budgets, and as result, the
development of high quality, solution-processed dielectric
materials that can be cost-efficiently deposited on large areas as
ultra-thin films is urgently required. Recently, anodic oxidation
(so-called anodization) has attracted a lot of attention because it
is a low-cost, solution-based deposition process that can be used
to fabricate high quality, ultra-thin metal oxide films [12].
Anodization is a self-limiting and self-healing process that gives
pinhole-free, homogenous oxide layers that can be grown in an
ambient atmosphere at room temperature using low-cost set-ups and
environmentally friendly chemicals. Considering high-k oxide
dielectrics, tantalum pentoxide (Ta2O5) is a promising candidate in
terms of optical, physical, chemical and electrical properties
[13]. Ta2O5 has high transparency, high melting point (1785 °C),
high permeability for hydrogen gas, and high dielectric constant,
which can be exploited in a wide range of electronic applications.
As a result, tantalum pentoxide has been abundantly used in
metal-insulator-metal (MIM) capacitors,
metal-insulator-semiconductor (MIS) and Schottky diode sensors,
DRAM devices and TFTs [14–17]. The dielectric constant (k) of Ta2O5
depends on its thickness and deposition techniques and varies from
~ 35 in the bulk to ~25 in a thin film [13]. This is at least two
and six times larger than k of Al2O3 (k = 9) and SiO2 (k = 3.9),
respectively, which makes it a good candidate for gate insulator in
TFTs [18-19]. To date, low threshold voltage (VTH = 0.25 V) IGZO
TFTs operating at 3 V gated with 200 nm thick, sputtered Ta2O5 have
been reported [20]. However, the demonstrated devices displayed
subthreshold swings larger than 600 mV/dec that is aboutten times
bigger than the theoretical limit of SS at 300 K(~ 60 mV/dec), and
as result, could not be effectively operated with voltages below 3
V. This shows that the fabrication of metal oxide semiconductor
TFTs that can be operated at or below 1 V is not trivial.
(a) (c)
(b) (d)
Fig. 1. 2D and 3D AFM topographical images of (a, b) untreated
and (c, d) OTS-treated Ta2O5 films.
In a TFT, the gate voltage, VG, required to switch the
transistor “on” scales with the insulator thickness, d, and
inversely with the insulator dielectric constant, k, i.e. VG ∼ d/k.
Consequently, high k at low d is desirable. However, both
minimizing d and maximizing k leads to practical problems: a thin,
fragile dielectric may lead to increased leakage currents through
the insulation layer, and in consequence rise in power consumption
and shorten the device life-time, whereas high-k insulators
introduce undesirable effects at the semiconductor-insulator
interface which generally leads to increased trapping which causes
a rise of VTH and SS, as well as lowers the field-effect mobility
of charge carriers in TFTs [21]. To overcome both issues in low
voltage organic thin film transistors (OTFTs) passivation of the
high-k oxide surfaces with self-assembled monolayer (SAM) compounds
is routinely used [22]. For example, modifying Al2O3 with
n-octadecyltrichlorosilane (OTS) SAM results in considerably
improved dielectric performance of alumina films and significant
increases of the field-effect mobility in OTFTs [23]. Although
modification of ultra-thin (d ≤ 20 nm) metal oxide gate dielectrics
with SAMs is currently a common process in organic TFTs, this
approach has not yet been fully explored in metal oxide
semiconductor transistors. Here, we show that treating anodically
oxidized Ta2O5 films with OTS results in the same benefits to IGZO
TFTs as it is in the case of OTFTs. As a result, high performance,
low voltage IGZO TFTs gated with OTS-passivated Ta2O5 that can be
operated at 1 V are demonstrated. The optimized transistors show
highly reproducible characteristics with virtually no
voltage-current hysteresis, saturation field-effect mobilities
higher than 2 cm2/Vs, threshold voltages around 400 mV,
subthreshold swings below 90 mV/dec, and current “on/off” ratios in
excess of 105. As a result of this combination of favorable
properties, we have demonstrated high performance IGZO TFTs that
can be operated with voltages well below 1 V.
(a) (c)
(b) (d)
Fig. 1. 2D and 3D AFM topographical images of (a, b) untreated
and (c, d) OTS-treated Ta2O5 films.
Experimental procedure
MIM capacitors with Ta/Ta2O5/Al and Ta/Ta2O5/OTS/Al structures
were fabricated on 2×1.5 cm ultra-flat quartz coated glass
substrates (Ossila, UK). Firstly, the substrates were rinsed with
deionized water in order to remove any water-soluble contaminants
and dried with compressed N2. Next, the slides were sonicated for
30 min in acetone, methanol and isopropyl alcohol (IPA). Then, the
glass slides were taken from the sonic bath and again dried with
pure N2. To remove any residual organic contaminants, the
substrates were put into UV Ozone cleaner for 30 min. The
fabrication of the MIM capacitors and IGZO TFTs started with
depositing a 100-nm thick layer of Ta through a shadow mask by
using radio frequency (RF) magnetron sputtering with a 2-inch
diameter Ta target (Kurt J. Lesker, 99.9% pure) at a power of 70 W
in a pure Ar atmosphere with a total pressure of 0.5 Pa at room
temperature. Next, the patterned Ta was oxidized using anodization
process to form a thin Ta2O5 film. The anodization process was
carried out in 1 mM citric acid which served as the electrolyte. A
pure Au wire (99.999%) and the patterned Ta film were used as the
cathode and the anode, respectively [24]. To form Ta2O5 films with
different thicknesses, various anodization voltages VA = 20, 15,
10, and 5 V and a constant current density JA = 0.01 mA/cm2 were
applied using Keithley 2400 Source Meter. The anodization was
carried out until JA dropped to 0.005 mA/cm2. Then, the samples
were rinsed with deionized water and dried using pure N2. Based on
the anodization ratio of tantalum reported in the literature ([c]Ta
= 2.2 ± 0.2 nm/V) [24], the Ta2O5 thicknesses for 20, 15, 10, and 5
V anodization voltages were approximately 44 ± 4, 33 ± 3, 22 ± 2,
and 11 ± 1 nm, respectively. To study the effect of OTS on the
dielectric properties of the anodically oxidized Ta2O5 films, some
of the as-prepared Ta/Ta2O5 samples were treated by O2 plasma for 2
min and then immersed in 5 mM of fresh OTS solution (Sigma-Aldrich,
≥ 99.5%) in anhydrous toluene for 30 min in ambient conditions.
Afterwards, the substrates were taken from the OTS solution and
promptly rinsed with fresh toluene, acetone and IPA and blow-dried
with compressed N2. Finally, the OTS-treated samples were placed on
a hot plate at ~150 °C under flow of N2 for 2 h. To finish MIM
capacitors, a 100-nm thick, 1000 m x 100 m layer of Al was
thermally evaporated through a shadow mask to form the top
electrode of the devices (the total area of capacitors including
the connection to the contact pads was 1.70×10-3 cm2). To confirm
the reproducibility of the measured dielectric parameters, 100
Ta/Ta2O5/Al and 100 Ta/Ta2O5/OTS/Al MIM capacitors for each Ta2O5
film anodized with VA = 20, 15, 10, and 5 V were fabricated and 20
of each lot were randomly chosen for the measurements. To finish
IGZO TFTs, a 25-nm thick layer of IGZO was firstly deposited onto
the as-prepared Ta/Ta2O5 and OTS-treated Ta/Ta2O5 samples through a
shadow mask by RF magnetron sputtering using a 2-inch diameter IGZO
target (In:Ga:Zn = 1:1:1) at the power of 50 W at room temperature.
Then, a 100 nm (1000 m x 100 m) Al film was deposited onto the IGZO
films to form the source and drain contacts through a shadow mask.
The transistor channel widths (W) and lengths (L) were 1 mm and 30
µm, respectively. In order to test the TFT fabrication
reproducibility, 50 Ta2O5/IGZO and 50 Ta2O5/OTS/IGZO TFTs for each
Ta2O5 film anodized with VA = 20, 15, and 10 V were fabricated and
20 of each TFTs were arbitrarily chosen for the measurements. The
electrical characterization of capacitors and TFTs were measured by
an Agilent E4980A LCR meter and an Agilent E5270B semiconductor
analyzer at room temperature, respectively.
(a) (b)
(c) (d)
Fig. 2. (a) Capacitance density vs. frequency, (b) leakage
current density vs. applied voltage, (c) loss tangent vs.
frequency, and (d) capacitance-voltage (C-V) characteristics of the
studied Ta/Ta2O5/Al capacitors.
Results and Discussion
Fig. 3. 3D schematic of the fabricated Ta/Ta2O5/IGZO/Al TFTs
using pristine Ta2O5 gate dielectric.
Fig. 1 shows 500 nm × 500 nm 2D and 3D atomic force microscopy
(AFM) topography images of Ta/Ta2O5 (a/b) and Ta/Ta2O5/OTS (c/d)
surfaces, respectively. AFM images were obtained with a PSIA XE100
non-contact AFM, with 100-micron scanner. Measurements were
performed in the tapping mode and a NT-MDT ultra-sharp cantilever
was used for the data collection. As can been seen, the pristine
and OTS-modified Ta2O5 films are relatively flat and featureless.
The root-mean-square (RMS) roughness of the unmodified Ta2O5 is
found to be 0.92 nm. It appears that the anodization process is
capable of delivering as smooth Ta2O5 films as it is in the case of
Ta2O5 deposited using ALD [25]. The RMS roughness of the
OTS-modified Ta2O5 is significantly reduced and is found to be 0.55
nm. This result is in a good agreement with the previously
published reports where it was shown that the modification of metal
oxide dielectrics with self-assembled monolayers significantly
reduces their surface roughness [26].
In order to obtain high performance thin film transistors, the
optimization of the gate dielectric properties is essential.
Consequently, different thicknesses of Ta2O5 films were grown by
varying the anodization voltage from 20 to 5 V in step of 5 V. To
confirm the reproducibility of the measured dielectric parameters,
20 Ta/Ta2O5/Al MIM capacitors for each Ta2O5 film anodized with VA
= 20, 15, 10, and 5 V were randomly chosen from 100 fabricated
devices. Fig. 2(a) illustrates the capacitance density vs.
frequency of the capacitors from 100 Hz to 100 kHz. As shown,
decreasing the anodization voltage VA from 20 V to 5 V increases
the capacitance density (Ci) from 585 nF/cm2 to 1840 nF/cm2 with a
maximum standard deviation of 20 nF/cm2 at 1 kHz. However, as the
VA decreases from 20 to 5 V, the measured values of Ci from 100 Hz
to 100 kHz become unstable especially at high-end frequency range.
This is particularly obvious for Ta2O5 anodized at 5 V. This
behaviour of Ci is very likely due to the increase of the leakage
current through the dielectric. Indeed, as shown in Fig. 2(b), the
leakage current density (JLEAK) rises sharply by at least three
orders of magnitude when measured at 1 V from 2.8 × 10-5 A/cm2 for
20 V to 0.1 A/cm2 for 5 V anodized Ta2O5, respectively. High JLEAK
is extremely undesirable because it strongly influences the
characteristics of MIM capacitors, as well as the operation of
TFTs. The negative effect of the leakage current on the capacitor
characteristics is reflected in Fig. 2(c) where Ta2O5 anodized at 5
V shows a considerable deterioration of the loss tangent (tan(δ))
at both ends of the probed frequency range. Typically, all
dielectrics have two types of losses, namely, conduction loss and
dielectric loss. Conduction loss occurs when a charge flows through
the dielectric from one electrode to another and dielectric loss is
defined as a rotation or movement of atoms or molecules within the
dielectric medium in an alternating electric field. An effective
approach to defining these losses in detail is to express them by a
dielectric constant as a complex number as shown in (1):
(1)
where ε' is the ac capacitivity, ε'' dielectric loss factor and
δ dielectric loss angle, respectively. However, loss tangent (tan
δ) is usually expressed by ε' and ε" and δ as shown in (2):
(2)
Fig. 3 presents a cross-section of the fabricated bottom-gate,
top-contact IGZO TFTs (Ta/Ta2O5/IGZO/Al). Representative output and
transfer characteristics of the devices using the Ta2O5 anodized at
10 V (~22 ± 2 nm, device A), 15 V (~33 ± 3 nm, device B), and 20 V
(~44 ± 4 nm, device C) are shown in Fig. 4 (a-f), respectively. As
demonstrated in Fig. 4, all three types of transistors operate at 1
V in n-channel enhancement mode and show a clear linear, pinch-off
and saturation regimes with a very small hysteresis between forward
(-0.1 to 1 V) and backward (1 to -0.1 V) sweeps. The drain current
(ID) measured at the drain voltage (VD) and the gate voltage (VG)
equal to 1 V for the device A is found to be about 18 µA. This is
almost two times higher than for the device B and more than three
times higher than for the device C. Although high ID is one of the
most important parameters when considering the performance of TFTs,
other transistor parameters such as leakage current (ILEAK),
field-effect mobility (), threshold voltage (VTH), subthreshold
swing (SS), onset voltage (VO), off current (IOFF), and on/off
current ratio (Ion/off) should also be considered. The field-effect
mobility in the saturation regime has been estimated using the
drain current equation by applying a linear fit to the ID1/2 vs. VG
as shown in:
(3)
where VG is the gate voltage, VT is the threshold voltage, Ci is
the gate capacitance density, is saturation field-effect mobility,
and W and L are channel width and length, respectively. In
addition, to be able to compare the quality of the
semiconductor-insulator interface of the fabricated transistors,
the interfacial trap density (Nit) can be calculated using (4)
[27]:
(a) (b)
(c) (d)
(e) (f)
Fig. 4. Representative output and transfer characteristics of
IGZO TFTs using (a, b) 10 V anodized Ta2O5 (22 ± 2 nm, device A),
(c, d) 15 V anodized Ta2O5 (33 ± 3 nm, device B), and (e, f) 15 V
anodized Ta2O5 (44 ± 4 nm, device C).
(a) (b)
(c) (d)
Fig. 5. (a) Capacitance density vs. frequency, (b) leakage
current density vs. applied voltage, (c) loss tangent vs.
frequency, and (d) capacitance-voltage (C-V) characteristics of the
studied Ta/Ta2O5/OTS/Al capacitors.
TABLE I
Electrical properties of the fabricated IGZO TFTs using
pristine, Anodically oxidized Ta2 O5 as the gate dielectric.
(4)
where CG is the gate capacitance density, q is the electron
charge, k is the Boltzmann’s constant, T is the temperature, and SS
is subthreshold swing. Table I shows all key parameters of the
fabricated IGZO TFTs.
It can be seen that the device C displays the highest mobility
SAT = 6.3 cm2/Vs. At the same time, it shows the highest VTH = 650
mV and the lowest SS = 96 mV/dec. It is believed that charge
carrier mobility in TFTs is directly affected by the interfacial
trap density [28]. Nit is calculated to be 4.1×1012 cm-2 eV-1,
4.4×1012 cm-2 eV-1, and 2.1×1012 cm-2 eV-1 for device A, B, and C,
respectively. Indeed, since the device C has the lowest interfacial
trap density it exhibits the highest mobility. Also, since the
capacitance density ofthe device C is lowest (Ci = 585 nF/cm2) it
shows the highest VTH. On the contrary, it appears that
significantly reduced channel capacitance, which is a sum of the
depletion capacitance Cdep and Cit being related to the charging of
the semiconductor-dielectric interface traps, contributes to the
low SS [29]. Indeed, the SS in device C is reduced to 96 mV/dec.
Although 1 V operation was achieved for all types of the fabricated
IGZO TFTs using pristine Ta2O5, it was believed that the Ta2O5
dielectric needed further optimization to be able to compete with
the recently demonstrated state-of-the-art IGZO TFTs [30],
[31].
Fig. 6. 3D schematic of the fabricated Ta/Ta2O5/OTS/IGZO/Al TFTs
using SAM-modified Ta2O5 gate dielectric.
(a)
(b)
Fig. 7. A representative (a) output and (b) transfer of IGZO
TFTs gated with OTS-treated, 10 V anodized Ta2O5.
It has been reported previously that the passivation of metal
oxide dielectrics with n-octadecyltrichlorosilane (OTS) SAM is an
effective approach to improve the performance of OTFTs [24].
Therefore, to see whether a SAM treatment has the same beneficial
effect on the performance of Ta2O5 thin film capacitors, 15 V (33 ±
3 nm) and 10 V (22 ± 2 nm) anodized Ta2O5 films have been modified
with OTS. To confirm the reproducibility of the measured dielectric
parameters, 20 Ta/Ta2O5/OTS/Al MIM capacitors for each Ta2O5 film
anodized with VA = 15, and 10 V were randomly chosen from 100
fabricated devices. Fig. 5(a) demonstrates the capacitance density
of Ta/Ta2O5/Al and Ta/Ta2O5/OTS/Al capacitors (cf. inset of Fig.
5(a)) as a function of frequency from 100 Hz to 100 kHz. As can be
seen, the Ta/Ta2O5/OTS/Al capacitors are much more stable in the
whole studied frequency range than the capacitors with pristine
Ta2O5. Although adding a monolayer dielectric layer to the main
dielectric appears to make the MIM capacitors more stable this
results in an increase of total dielectric thickness, and in
consequence, decrease of the capacitance density, because the two
dielectric layers (i.e. Ta2O5 + OTS) are equivalent to two
capacitors in series. Before the OTS surface modification, the
capacitance density of 15 V and 10 V Ta2O5 films at 1 kHz is 875
nF/cm2 and 1020 nF/cm2, respectively. As expected, after the OTS
treatment, the capacitance density is reduced to 346 and 433 nF/cm2
with a maximum standard deviation of 10 nF/cm2 at 1 kHz. Fig. 5(b)
shows the leakage current density of Ta2O5 and OTS-treated Ta2O5
films vs. applied voltage bias from -1 to 1 V. As it is clear, the
leakage current density of OTS-treated samples at ± 1 V has been
dramatically reduced and found to be at least three orders of
magnitude lower than their untreated counterparts. The leakage
current of the OTS-treated Ta2O5 is somewhat asymmetric and
slightly lower for positive voltages. This is very likely caused by
the differences in the roughness of the Ta/Ta2O5 and Ta/Ta2O5/OTS
interfaces and the use of electrodes with different work functions
[32]. Fig. 5(c) shows the loss tangent as a function of frequency
for both samples. Due to the lower leakage current in OTS-treated
samples, tan(δ) is also showing a lower value which implies that
the dielectric loss of these capacitors approaches the ideal value
for this parameter. This fact is also reflected in the capacitance
density vs. voltage characteristics presented in Fig. 5(d).
Conversely, the OTS-treated Ta2O5 films show a constant value of Ci
in the -1 to 1 voltage bias range the pristine Ta2O5 films appear
somewhat unstable.
TABLE II
Electrical properties of the proposed IGZO TFTs
usingOTS-modified, Anodically oxidized Ta2 O5 as the gate
dielectric.
To see if the OTS-treated Ta2O5 results in better performing
IGZO TFTs, Ta/Ta2O5/OTS/IGZO/Al transistors with 10 V (22 ± 2 nm)
anodized Ta were fabricated (Fig. 6). Fig. 7 illustrates a typical
output and transfer characteristics of the transistors. The key
parameters of the fabricated IGZO TFTs gated with OTS-treated, 10 V
anodized Ta2O5 are summarized in Table II. As shown in Fig. 7(a)
and 7(b), the devices operate in n-type enhancement mode with a
clear linear, pinch-off and saturation regimes. The clear linear
increment of ID with VD at low VG implies that low resistance
contacts were formed between the IGZO and Al. From Fig. 7(b), the
field-effect mobility, the threshold voltage, the subthreshold
swing, and Ion/off ratio are found to be 2.3 cm2/Vs, 400 mV, 88
mV/dec, and > 105, respectively. Comparing the transistors with
IGZO TFTs using pristine Ta2O5, the mobility is reduced by a factor
of three. This is very likely caused by the different structure and
composition of IGZO on Ta2O5 and T2O5/OTS surfaces or OTS coating
deterioration. The calculated interfacial trap densities for both
types of transistors suggest that TFTs using OTS-modified Ta2O5
possess less interfacial traps than TFTs using pristine Ta2O5.
However, more detailed studies of the SAM/IGZO interfaces are
needed to fully understand this phenomenon. The gate leakage
current (IG) is found to be about 0.1 nA at 1 V which is at least
two orders of magnitude smaller than in our Ta2O5/IGZO TFTs [cf.
ref. 19]. Recently reported IGZO TFTs using 10 nm CVD SiO2 as the
gate dielectric display IG < 1 pA [33]. However, the area of the
source and drain contacts here is at least 100 times larger than in
[25]. Also, it is not obvious if the anodically oxidized Ta2O5
films with thicknesses at or below 20 nm are stoichiometric Ta2O5
which may lead to the increased conductivity of such films [34]. As
a result, currently the performance and the application of the
demonstrated TFTs is somewhat limited by the gate leakage (i.e.
high off current) and a significant reduction of the source/drain
contact area is needed for their use in displays. The onset voltage
of the OTS-treated Ta2O5 IGZO TFTs is reduced to 100 mV, the
threshold voltage is decreased to 400 mV, and the subthreshold
swing is below 90 mV/dec. Hence, it appears that the modification
of the tantalum pentoxide with SAMs may be a useful approach
towards ultra-low voltage, high performance IGZO TFTs.
Conclusions
Low threshold voltage IGZO TFTs gated with pristine and
OTS-treated Ta2O5 operating at 1 V are demonstrated. The effect of
different anodization voltages on the properties of Ta/Ta2O5/Al and
Ta/Ta2O5/OTS/Al MIM capacitors and IGZO TFTs have been studied. It
is shown that the best performing capacitors and transistors are
realized with 10 V anodized (22 ± 2 nm), OTS-treated Ta2O5. The
fabricated Ta2O5/OTS capacitors show good stability in the 100 Hz
to 100 kHz and capacitance density in excess of 400 nF/cm2. The
fabricated TFTs display relatively high field-effect mobilities
(2.3 cm2/Vs), threshold voltages around 400 mV, subthreshold swings
below 90 mV/dec, and high current on/off ratios well in excess of
105. It is envisaged that this approach is a very promising
alternative to fabricate low voltage, inexpensive TFTs and
TFT-arrays for low cost sensors and low-end, disposable
electronics.
Acknowledgments
We would like to thank Christopher Muryn from the Department of
Chemistry at the University of Manchester who obtained and helped
analyse the atomic force microscopy (AFM).
References
[1]A. D. Sekar, T. Jayabalan, H. Muthukumar, N. I.
Chandrasekaran, S. N. Mohamed, and M. Matheswaran, “Enhancing power
generation and treatment of dairy waste water in microbial fuel
cell using Cu-doped iron oxide nanoparticles decorated anode,”
Energy, vol. 172, pp. 173–180, 2019.
[2]T. N. Huan et al., “Low-cost high-efficiency system for
solar-driven conversion of CO2 to hydrocarbons,” Proc. Natl. Acad.
Sci., vol. 116, no. 20, pp. 9735–9740, 2019.
[3]S. Ho-Kimura et al., “Origin of high-efficiency
photoelectrochemical water splitting on hematite/functional
nanohybrid metal oxide overlayer photoanode after a low temperature
inert gas annealing treatment,” ACS omega, vol. 4, no. 1, pp.
1449–1459, 2019.
[4]A. Pedico et al., “High-performing and stable wearable
supercapacitor exploiting rGO aerogel decorated with copper and
molybdenum sulfides on carbon fibers,” ACS Appl. Energy Mater.,
vol. 1, no. 9, pp. 4440–4447, 2018.
[5]F. Bella et al., “Boosting the efficiency of aqueous solar
cells: A photoelectrochemical estimation on the effectiveness of
TiCl4 treatment,” Electrochim. Acta, vol. 302, pp. 31–37, 2019.
[6]F. I. M. Ali, F. Awwad, Y. E. Greish, A. F. S. Abu-Hani, and
S. T. Mahmoud, “Fabrication of low temperature and fast response
H2S gas sensor based on organic-metal oxide hybrid nanocomposite
membrane,” Org. Electron., vol. 76, p. 105486, 2020.
[7]M. Jung et al., “transparent and flexible Mayan-pyramid-based
pressure Sensor using facile-transferred indium tin oxide for
Bimodal Sensor Applications,” Sci. Rep., vol. 9, no. 1, pp. 1–11,
2019.
[8]L. Lefrançois Perreault et al., “Spray‐Dried Mesoporous Mixed
Cu‐Ni Oxide@ Graphene Nanocomposite Microspheres for High Power and
Durable Li‐Ion Battery Anodes,” Adv. Energy Mater., vol. 8, no. 35,
p. 1802438, 2018.
[9]E. Hourdakis, A. Travlos, and A. G. Nassiopoulou,
“High-Performance MIM Capacitors With Nanomodulated Electrode
Surface,” IEEE Trans. Electron Devices, vol. 62, no. 5, pp.
1568–1573, May 2015, doi: 10.1109/TED.2015.2411771.
[10]W. Tang, J. Li, J. Zhao, W. Zhang, F. Yan, and X. Guo,
“High-performance solution-processed low-voltage polymer thin-film
transistors with low-k/High-k bilayer gate dielectric,” IEEE
Electron Device Lett., vol. 36, no. 9, pp. 950–952, 2015, doi:
10.1109/LED.2015.2462833.
[11]J. T. Smith, S. S. Shah, M. Goryll, J. R. Stowell, and D. R.
Allee, “Flexible ISFET Biosensor Using IGZO Metal Oxide TFTs and an
ITO Sensing Layer,” IEEE Sens. J., vol. 14, no. 4, pp. 937–938,
Apr. 2014, doi: 10.1109/JSEN.2013.2295057.
[12]N. Mohammadian, S. Faraji, S. Sagar, B. C. Das, M. L.
Turner, and L. A. Majewski, “One-Volt, Solution-Processed Organic
Transistors with Self-Assembled Monolayer-Ta2O5 Gate Dielectrics,”
Materials, vol. 12, no. 16, pp. 2563–2575, 2019, doi:
10.3390/ma12162563.
[13]S. Ezhilvalavan and T. Y. Tseng, “Preparation and properties
of tantalum pentoxide (Ta2O5) thin films for ultra large scale
integrated circuits (ULSIs) application -- A review,” J. Mater.
Sci. Mater. Electron., vol. 10, no. 1, pp. 9–31, 1999, doi:
10.1023/A:1008970922635.
[14]S. Dueñas, E. Castán, J. Barbollas, R. R. Kola, and P. A.
Sullivan, “Use of anodic tantalum pentoxide for high-density
capacitor fabrication,” J. Mater. Sci. Mater. Electron., vol. 10,
no. 5-6, pp. 379–384, 1999, doi: 10.1023/A:100890162.
[15]S. Kim, “Hydrogen gas sensors using a thin Ta2O5 dielectric
film,” J. Korean Phys. Soc., vol. 65, no. 11, pp. 1749–1753, 2014,
doi: 10.3938/jkps.65.1749.
[16]J. Yu et al., “Hydrogen gas sensing properties of Pt/Ta2O5
Schottky diodes based on Si and SiC substrates,” Sensors Actuators,
A Phys., vol. 172, no. 1, pp. 9–14, 2011, doi:
10.1016/j.sna.2011.02.021.
[17]L. Zhang, J. Li, X. W. Zhang, X. Y. Jiang, and Z. L. Zhang,
“High performance ZnO-thin-film transistor with Ta2O5 dielectrics
fabricated at room temperature,” Appl. Phys. Lett. vol. 95, no. 7,
pp. 072112–072112-3, 2009, doi: 10.1063/1.3206917.
[18]P. Barquinha et al., “Low-temperature sputtered mixtures of
high-κ and high bandgap dielectrics for GIZO TFTs,” J. Soc. Inf.
Disp., vol. 18, no. 10, pp. 762–772, 2010, doi:
10.1889/JSID18.10.762.
[19]L. Zhang, W. Xiao, W. Wu, and B. Liu, “Research progress on
flexible oxide-based thin film transistors,” Appl. Sci., vol. 9,
no. 4, 2019, doi: 10.3390/app9040773.
[20]C. J. Chiu, S. P. Chang, and S. J. Chang, “High-performance
a-IGZO thin-film transistor using Ta2O5 gate dielectric,” IEEE
Electron Device Lett., vol. 31, no. 11, pp. 1245–1247, 2010, doi:
10.1109/LED.2010.2066951.
[21]J. K. Jeong, “The status and perspectives of metal oxide
thin-film transistors for active matrix flexible displays”
Semicond. Sci. Technol., vol. 26, no. 3, pp. 034008–034018, 2011,
doi: 10.1088/0268-1242/26/3/034008.
[22]S. A. DiBenedetto, A. Facchetti, M. A. Ratner, and T. J.
Marks, “Molecular Self-Assembled Monolayers and Multilayers for
Organic and Unconventional Inorganic Thin-Film Transistor
Applications,” Adv. Mater., vol. 21, no. 14‐15, pp. 1407–1433,
2009, doi: 10.1002/adma.200803267.
[23]P. Sista et al., “Enhancement of OFET performance of
semiconducting polymers containing benzodithiophene upon surface
treatment with organic silanes,” J. Polym. Sci. Part A Polym.
Chem., vol. 49, no. 10, pp. 2292–2302, 2011, doi:
10.1002/pola.24663.
[24]Y.-H. Kim and K. Uosaki, “Preparation of Tantalum Anodic
Oxide Film in Citric Acid Solution - Evidence and Effects of
Citrate Anion Incorporation,” J. Electrochem. Sci. Technol., vol.
4, no. 4, pp. 163–170, 2014, doi: 10.5229/JECST.2013.4.4.163.
[25]C.-H. Kao, H. Chen, and C.-Y. Chen, “Material and electrical
characterizations of high-k Ta2O5 dielectric material deposited on
polycrystalline silicon and single crystalline substrate,”
Microelectron. Eng., vol. 138, pp. 36–41, 2015, doi:
https://doi.org/10.1016/j.mee.2015.01.011.
[26]W. Wang, X. Shi, X. Li, and Y. Zhang, “Improved Electrical
Properties of Pentacene MIS Capacitor with OTS Modified Ta2O5
Dielectric,” IEEE Electron Device Lett., vol. 37, no. 10, pp.
1332–1335, 2016, doi: 10.1109/LED.2016.2601626.
[27]J. Raja, K. Jang, H. H. Nguyen, T. T. Trinh, W. Choi, and J.
Yi, “Enhancement of electrical stability of a-IGZO TFTs by
improving the surface morphology and packing density of active
channel,” Curr. Appl. Phys., vol. 13, no. 1, pp. 246–251, 2013,
doi: https://doi.org/10.1016/j.cap.2012.07.016.
[28]J. S. Park, W.-J. Maeng, H.-S. Kim, and J.-S. Park, “Review
of recent developments in amorphous oxide semiconductor thin-film
transistor devices,” Thin Solid Films, vol. 520, no. 6, pp.
1679–1693, 2012, doi:
https://doi.org/10.1016/j.tsf.2011.07.018.
[29]L. Feng, W. Tang, X. Xu, Q. Cui, and X. Guo,
“Ultralow-Voltage Solution-Processed Organic Transistors With Small
Gate Dielectric Capacitance,” IEEE Electron Device Lett., vol. 34,
no. 1, pp. 129–131, Jan. 2013, doi: 10.1109/LED.2012.2227236.
[30]R. Yao et al., “Low-temperature fabrication of sputtered
high-k HfO2 gate dielectric for flexible a-IGZO thin film
transistors,” Appl. Phys. Lett., vol. 112, no. 10, p. 103503, 2018,
doi: 10.1063/1.5022088.
[31]J. Yang et al., “High-Performance 1-V ZnO Thin-Film
Transistors With Ultrathin, ALD-Processed ZrO2 Gate Dielectric,”
IEEE Trans. Electron Devices, vol. 66, no. 8, pp. 3382–3386, Aug.
2019, doi: 10.1109/TED.2019.2924135.
[32]W. S. Lau, D. Q. Yu, X.Wang, H. Wong, Y. Xu, "Mechanism of
I-V asymmetry of MIM capacitors based on high-k dielectric". In
Proceedings of the 2015 China Semiconductor Technology
International Conference, Shanghai, China, 18–19 March 2015, doi:
10.1109/CSTIC.2015.7153403.
[33]Y. Zhang, H. Yang, H. Peng, Y. Cao, L. Qin, and S. Zhang, “
Self-Aligned Top-Gate Amorphous InGaZnO TFTs With Plasma Enhanced
Chemical Vapor Deposited Sub-10 nm SiO2 Gate Dielectric for
Low-Voltage Applications,” IEEE Electron Device Lett., vol. 40, no.
9, pp. 1459–1462, 2019, doi: 10.1109/led.2019.2931358.
[34]T. V. Perevalov, V. A. Gritsenko, A. A. Gismatulin, V. A.
Voronkovskii, A. K. Gerasimova, V. Sh. Aliev, and I. A. Prosvirin,
" Electronic structure and charge transport in nonstoichiometric
tantalum oxide," Nanotechnology, vol. 29, no. 26, pp.
264001-264010, 2018, doi: 10.1088/1361-6528/aaba4c.
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