Introduction to Microfabrication · 24.3 Laser Direct Writing 301 24.4 AFM Patterning 305 24.5 Ink Jetting 306 24.6 Mechanical Structuring 307. Preface to the First Edition Preface

Introduction to MicrofabricationSecond Edition

Sami Franssila

Professor of Materials Science at Aalto Universityand Adjunct Professor of Micro- and Nanotechnology

at University of Helsinki, Finland

A John Wiley and Sons, Ltd., Publication

Administrator9780470666722.jpg

Introduction to Microfabrication

Introduction to MicrofabricationSecond Edition

Sami Franssila

Professor of Materials Science at Aalto Universityand Adjunct Professor of Micro- and Nanotechnology

at University of Helsinki, Finland

A John Wiley and Sons, Ltd., Publication

This edition first published 2010 2010, John Wiley & Sons, Ltd

First Edition published in 2004

Registered officeJohn Wiley & Sons Ltd, The Atrium, Southern Gate, Chichester, West Sussex, PO19 8SQ, United Kingdom

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Library of Congress Cataloguing-in-Publication Data

Franssila, Sami.Introduction to microfabrication / Sami Franssila. – 2nd ed.

p. cm.Includes index.ISBN 978-0-470-74983-8 (cloth)1. Microelectromechanical systems. 2. Integrated circuits. 3. Semiconductor processing. 4. Nanotechnology.5. Microfabrication. I. Title.TK7875.F73 2010621.381 – dc22

2010010076

A catalogue record for this book is available from the British Library.

ISBN: 978-0-470-74983-8

Set in 9/11pt Times by Laserwords Private Limited, Chennai, IndiaPrinted and Bound in Markono Print Media Pte Ltd, Singapore

www.wiley.com

Contents

Preface to the First Edition ixPreface to the Second Edition xiiiAcknowledgements xv

1 Introduction 11.1 Substrates 21.2 Thin Films 31.3 Processes 51.4 Dimensions 71.5 Devices 81.6 MOS Transistor 101.7 Cleanliness and Yield 101.8 Industries 111.9 Exercises 12

References and Related Reading 132 Micrometrology and Materials Characterization 15

2.1 Microscopy and Visualization 152.2 Lateral and Vertical Dimensions 172.3 Optical Techniques 182.4 Electrical Measurements 192.5 Physical and Chemical Analyses 212.6 Practical Issues with Micrometrology 252.7 Measurements Everywhere 262.8 Exercises 27

References and Related Reading 273 Simulation of Microfabrication Processes 29

3.1 Simulator Types 293.2 Levels of Simulation 293.3 The 1D Simulators 303.4 The 2D Simulators 313.5 The 3D Simulators 323.6 Other Simulation Needs in Microfabrication 333.7 Exercises 33

References and Related Reading 344 Silicon 35

4.1 Silicon Material Properties 354.2 Silicon Crystal Growth 364.3 Silicon Crystal Structure 394.4 Silicon Wafering Process 414.5 Defects and Non-Idealities in Silicon

Crystals 444.6 Advanced Wafers 454.7 Exercises 45

References and Related Reading 465 Thin-Film Materials and Processes 47

5.1 Thin Films vs. Bulk Materials 475.2 Physical Vapor Deposition 485.3 Chemical Vapor Deposition 505.4 PECVD: Plasma-Enhanced CVD 525.5 ALD: Atomic Layer Deposition 535.6 Electrochemical Deposition (ECD) 54

5.7 Other Methods 565.8 Thin Films Over Topography: Step

Coverage 575.9 Stresses 58

5.10 Metallic Thin Films 605.11 Polysilicon 615.12 Oxide and Nitride Thin Films 625.13 Polymer Films 645.14 Advanced Thin Films 655.15 Exercises 66

References and Related Reading 66

6 Epitaxy 696.1 Heteroepitaxy 696.2 Epitaxial Deposition 716.3 CVD Homoepitaxy of Silicon 726.4 Doping of Epilayers 736.5 Measurement of Epitaxial Deposition 746.6 Simulation of Epitaxy 746.7 Advanced Epitaxy 756.8 Exercises 76


7 Advanced Thin Films 777.1 General Features of Thin-Film Processes 777.2 Film Growth and Structure 777.3 Thin-Film Structure Characterization 807.4 Surfaces and Interfaces 827.5 Adhesion 847.6 Two-Layer Films 847.7 Alloys and Doped Films 857.8 Multilayer Films 867.9 Selective Deposition 86

7.10 Reacted Films 877.11 Simulation of Deposition 897.12 Thickness Limits of Thin Films 907.13 Exercises 91


8 Pattern Generation 938.1 Pattern Generators 938.2 Electron Beam Lithography 958.3 Laser Pattern Generators 978.4 Photomask Fabrication 978.5 Photomask Inspection, Defects and Repair 988.6 Photomasks as Tools 998.7 Other Pattern Generation Methods 1008.8 Exercises 101


9 Optical Lithography 1039.1 Lithography Process Flow 1039.2 Resist Chemistry 1069.3 Resist Application 107

vi Introduction to Microfabrication

9.4 Alignment and Overlay 1089.5 Exposure 1089.6 Resist Profile 1099.7 Resolution 1099.8 Process Latitude 1099.9 Basic Pattern Shapes 110

9.10 Lithography Practice 1109.11 Photoresist Stripping 1119.12 Exercises 112

References and Related Reading 11310 Advanced Lithography 115

10.1 Projection Optical Systems 11510.2 Resolution of Projection Optical Systems 11710.3 Resists 11710.4 Thin-Film Optics in Resists 11810.5 Lithography Over Steps 12010.6 Optical Extensions of Optical Lithography 12110.7 Non-Optical Extension of Optical

Lithography 12310.8 Lithography Simulation 12410.9 Lithography Triangles 124

10.10 Exercises 125References and Related Reading 125

11 Etching 12711.1 Etch Mechanisms 12711.2 Etching Profiles 12811.3 Anisotropic Wet Etching 13011.4 Wet Etching 13011.5 Plasma Etching (RIE) 13211.6 Isotropic Dry Etching 13411.7 Etch Masks 13411.8 Non-Masked Etching 13511.9 Multistep and Multilayer Etching 135

11.10 Etch Processes for Common Materials 13611.11 Ion Beam Etching 13811.12 Etch Process Characteristics 13811.13 Selecting Etch Processes 13911.14 Exercises 140

References and Related Reading 14112 Wafer Cleaning and Surface Preparation 143

12.1 Classes of Contamination 14312.2 Chemical Wet Cleaning 14412.3 Physical Wet Cleaning 14512.4 Rinsing and Drying 14612.5 Dry Cleaning 14612.6 Particle Removal 14612.7 Organics Removal 14812.8 Metal Removal 14812.9 Contact Angle 149

12.10 Surface Preparation 15012.11 Exercises 151

References and Related Reading 15213 Thermal Oxidation 153

13.1 Thermal Oxidation Process 15313.2 Deal–Grove Oxidation Model 15413.3 Oxidation of Polysilicon 15613.4 Oxide Structure 15613.5 Local Oxidation of Silicon 15713.6 Stress and Pattern Effects in Oxidation 15813.7 Simulation of Oxidation 16013.8 Thermal Oxides vs. other Oxides 16013.9 Exercises 161


14 Diffusion 16514.1 Diffusion Process 16514.2 Diffusion Mechanisms 16714.3 Doping of Polysilicon 16714.4 Doping Profiles in Diffusion 16814.5 Diffusion Applications 16914.6 Simulation of Diffusion 17014.7 Diffusion at Large 17114.8 Exercises 171

References and Related Reading 17215 Ion Implantation 173

15.1 The Implantation Process 17315.2 Implant Applications 17515.3 Implant Damage and Damage Annealing 17715.4 Tools for Ion Implantation 17715.5 Ion Implantation Simulation 17915.6 Implantation Further 17915.7 Exercises 179

References and Related Reading 18016 CMP: Chemical–Mechanical Polishing 181

16.1 CMP Process and Tool 18216.2 Mechanics of CMP 18316.3 Chemistry of CMP 18416.4 Non-Idealities in CMP 18416.5 Monitoring CMP Processes 18516.6 Applications of CMP 18516.7 CMP as a Whole 18816.8 Exercises 188


17 Bonding 19117.1 Bonding Basics 19117.2 Fusion Bonding Blanket Silicon Wafers 19317.3 Anodic Bonding 19417.4 Metallic Bonding 19517.5 Adhesive Bonding 19617.6 Layer Transfer and Temporary Bonding 19617.7 Bonding of Structured Wafers 19817.8 Bond Quality Measurements 19917.9 Bonding for Packaging 200

17.10 Bonding at Large 20117.11 Exercises 201


18 Polymer Microprocessing 20318.1 Polymer Materials 20318.2 Polymer Thermal Properties 20618.3 Thick-Resist Lithography 20718.4 Molding Techniques 20918.5 Hot Embossing 21218.6 Nanoimprint Lithography 21318.7 Masters for Replication 21518.8 Processing on Polymers 21618.9 Polymer Bonding 217

18.10 Polymer Devices 22018.11 Polymer Overview 22218.12 Exercises 222


19 Glass Microprocessing 22519.1 Structure and Properties of Glasses 22519.2 Glass Substrates 22619.3 General Processing Issues with Glasses 22719.4 Glass Etching 22919.5 Glass Bonding 230

Contents vii

19.6 Glass Devices 23219.7 Specialty Glasses 23319.8 Exercises 235

References and Further Reading 235

20 Anisotropic Wet Etching 23720.1 Basic Structures on Silicon 23720.2 Etchants 23720.3 Etch Masks and Protective Coatings 23920.4 Etch Rate and Etch Stop 24020.5 Front-Side Processed Structures 24120.6 Convex Corner Etching 24320.7 Membrane Fabrication 24520.8 Through-Wafer Structures 24720.9 Etching 249

20.10 Silicon Etching 25020.11 Comparison of , and

Etching 25120.12 Exercises 252

References and Related Reading 25321 Deep Reactive Ion Etching 255

21.1 RIE Process Capabilities 25521.2 RIE Process Physics and Chemistry 25821.3 Deep Etching 25921.4 Combining Anisotropic and Isotropic DRIE 26021.5 Microneedles and Nozzles 26121.6 Sidewall Quality 26421.7 Pattern Size and Pattern Density Effects 26521.8 Etch Residues and Damage 26721.9 DRIE vs. Wet Etching 268


22 Wafer Engineering 27122.1 Silicon Crystals 27122.2 Gettering 27222.3 Wafer Mechanical Specifications 27422.4 Epitaxial Wafers 27522.5 SOI Wafers 27522.6 Bonding Mechanics 27922.7 Advanced Wafers 28022.8 Variety of Wafers 28022.9 Exercises 281

References and Further Reading 282

23 Special Processes and Materials 28323.1 Substrates other than Silicon 28323.2 Pattern Generation 28423.3 Patterning 28723.4 Powder Blasting 28823.5 Deposition 28823.6 Porous Silicon 29123.7 Molding with Lost Mold 29423.8 Exercises 295


24 Serial Microprocessing 29924.1 Focused Ion Beam (FIB) Processing 29924.2 Focused Electron Beam (FEB) Processing 30124.3 Laser Direct Writing 30124.4 AFM Patterning 30524.5 Ink Jetting 30624.6 Mechanical Structuring 30724.7 Chemical and Chemomechanical Machining

Scaled Down 30824.8 Conclusions 310

24.9 Exercises 310References and Further Reading 311

25 Process Integration 31325.1 The Two Sides of the Wafer 31425.2 Device Example 1: Solar Cell 31525.3 Device Example 2: Microfluidic Sieves 31625.4 Wafer Selection 31725.5 Masks and Lithography 31825.6 Design Rules 31825.7 Resistors 32025.8 Device Example 3: PCR Reactor 32225.9 Device Example 4: Integrated Passive Chip 323

25.10 Contamination Budget 32425.11 Thermal Processes 32525.12 Metallization 32625.13 Passivation and Packaging 32725.14 Exercises 327


26 MOS Transistor Fabrication 32926.1 Polysilicon Gate CMOS 32926.2 Polysilicon Gate CMOS: 10 µm to 1 µm

Generations 33026.3 MOS Transistor Scaling 33326.4 CMOS from 0.8 µm to 65 nm 33526.5 Gate Module 33626.6 SOI MOSFETs 33926.7 Thin-Film Transistors 34026.8 Integrated Circuits 34326.9 Exercises 343


27 Bipolar Transistors 34727.1 Fabrication Process of SBC Bipolar

Transistor 34727.2 Advanced Bipolar Structures 34927.3 Lateral Isolation 35127.4 BiCMOS Technology 35227.5 Cost of Integration 35427.6 Exercises 354


28 Multilevel Metallization 35728.1 Two-Level Metallization 35728.2 Planarized Multilevel Metallization 35928.3 Copper Metallization 36028.4 Dual Damascene MetallizXation 36128.5 Low-k Dielectrics 36228.6 Metallization Scaling 36428.7 Exercises 366


29 Surface Micromachining 36929.1 Single Structural Layer Devices 36929.2 Materials for Surface Micromachining 37129.3 Mechanics of Free-Standing Films 37229.4 Cantilever Structures 37329.5 Membranes and Bridges 37429.6 Stiction 37629.7 Multiple Layer Structures 37829.8 Rotating Structures 37929.9 Hinged Structures 381

29.10 CMOS Wafers as Substrates 38329.11 Exercises 383


viii Introduction to Microfabrication

30 MEMS Process Integration 38730.1 Silicon Microbridges 38730.2 Double-Sided Processing 38930.3 Membrane Structures 39130.4 Piezoresistive Pressure Sensor 39230.5 Tilting and Bending Through-Wafer Etched

Structures 39430.6 Needles and Tips, Channels and Nozzles 39630.7 Bonded Structures 39930.8 Surface Micromachining Combined with

Bulk Micromachining 40030.9 MEMS Packaging 401

30.10 Microsystems 40530.11 Exercises 405

References and Related Reading 40631 Process Equipment 409

31.1 Batch Processing vs. Single WaferProcessing 409

31.2 Process Regimes: Temperature and Pressure 41031.3 Cluster Tools and Integrated Processing 41231.4 Measuring Fabrication Processes 41231.5 Equipment Figures of Merit 41531.6 Simulation of Process Equipment 41531.7 Tool Lifecycles 41631.8 Cost of Ownership 41631.9 Exercises 417

References and Related Reading 41732 Equipment for Hot Processes 419

32.1 High-Temperature Equipment: Hot Wallvs. Cold Wall 419

32.2 Furnace Processes 41932.3 Rapid Thermal Processing/Rapid Thermal

Annealing 42132.4 Furnaces vs. RTP Systems 42332.5 Exercises 423

References and Related Reading 42433 Vacuum and Plasmas 425

33.1 Vacuum Physics and Kinetic Theory ofGases 425

33.2 Vacuum Production 42633.3 Plasma Etching 42733.4 Sputtering 42833.5 Residual Gas Incorporation into Deposited

Film 43033.6 PECVD 43033.7 Residence Time 43133.8 Exercises 432

References and Related Reading 43234 CVD and Epitaxy Equipment 433

34.1 Deposition Rate 43334.2 CVD Rate Modeling 43434.3 CVD Reactors 43534.4 CVD with Liquid Sources 43634.5 Silicon CVD Epitaxy 43734.6 Epitaxial Reactors 43734.7 Control of CVD Reactions 43934.8 Exercises 439

References and Related Reading 44035 Cleanrooms 441

35.1 Cleanroom Construction 44135.2 Cleanroom Standards 44235.3 Cleanroom Subsystems 444

35.4 Environment, Safety and Health (ESH) 44535.5 Cleanroom Operating Procedures 44635.6 Mini-Environments 44735.7 Exercises 447

References and Related Reading 44736 Yield and Reliability 449

36.1 Yield Definitions and Formulas 44936.2 Yield Models 45036.3 Yield Ramping 45036.4 Package Reliability 45236.5 Metallization Reliability 45236.6 Dielectric Defects and Quality 45336.7 Stress Migration 45536.8 Die Yield Loss 45536.9 Exercises 456

References and Related Reading 45637 Economics of Microfabrication 457

37.1 Silicon 45737.2 IC Costs and Prices 45837.3 IC Industry 45937.4 IC Wafer Fabs 46037.5 MEMS Industry 46237.6 Flat-Panel Display Industry 46337.7 Solar Cells 46437.8 Magnetic Data Storage 46637.9 Short Term and Long Term 467


38 Moore’s Law and Scaling Trends 46938.1 From Transistor to Integrated Circuit 46938.2 Historical Development of IC

Manufacturing 47038.3 MOS Scaling 47138.4 Departure from Planar Bulk Technology 47338.5 Memories 47438.6 Lithography Future 47638.7 Moore’s Law 47838.8 Materials Challenges 48038.9 Statistics and Yield 480

38.10 Limits of Scaling 48138.11 Exercises 482

References and Related Reading 48239 Microfabrication at Large 485

39.1 New Devices 48539.2 Proliferation of MEMS 48639.3 Microfluidics 48639.4 BioMEMS 48839.5 Bonding and 3D Integration 48939.6 IC–MEMS Integration 49039.7 Microfabricated Devices for

Microfabrication 49439.8 Exercises 495


Appendix A Properties of Silicon 499

Appendix B Constants and ConversionFactors 501

Appendix C Oxide and Nitride Thicknessby Color 503

Index 505

Preface to the First Edition

Microfabrication is generic: its applications includeintegrated circuits, MEMS, microfluidics, micro-optics,nanotechnology and countless others. Microfabricationis encountered in slightly different guises in all of theseapplications: electroplating is essential for deep sub-micron IC metallization and for LIGA-microstructures;deep-RIE is a key technology in trench DRAMs and inMEMS; imprint lithography is utilized in microfluidicswhere typical dimensions are 100 µm, as well as innanotechnology, where feature sizes are down to 10 nm.This book is unique because it treats microfabrication inits own right, independent of applications, and thereforeit can be used in electrical engineering, materials science,physics and chemistry classes alike.

Instead of looking at devices, I have chosen toconcentrate on microstructures on the wafer: linesand trenches, membranes and cantilevers, cavities andnozzles, diffusions and epilayers. Lines are sometimesisolated and sometimes in dense arrays, irrespective oflinewidths; membranes can be made by timed etching orby etch stop; source/drain diffusions can be aligned to thegate in a mask aligner or made in a self-aligned fashion;oxidation on a planar surface is easy, but the oxidation oftopographic features is tricky. The microstructure-viewof microfabrication is a solution against outdating:alignment must be considered for both 100 µm fluidicchannels and 100 nm CMOS gates, etch undercuttingtarget may be 10 nm or 10 µm, but it is there; dopantswill diffuse during high temperature anneals, but thejunction depth target may be tens of nanometres or tensof micrometres.

A common feature of older textbooks is concentrationon physics and chemistry: plasma potentials, boundarylayers, diffusion mechanisms, Rayleigh resolution,thermodynamic stability and the like. This is certainlya guarantee against outdating in rapidly evolvingtechnologies, but microfabrication is an engineeringdiscipline, not physics and chemistry. CMOS scalingtrends have in fact been more reliable than basic physicsand chemistry in the past 40 years: optical lithographywas predicted to be unable to print submicron lines and

gate oxides today are thinner than the ultimate limitsconceived in the 1970s. And it is pedagogically betterto show applications of CVD films before plunging intopressure dependence of deposition rate, and to discussmetal film functionalities before embracing sputteringyield models.

In this book, another major emphasis is on materials.Materials are universal, and not outdated rapidly. Newmaterials are, of course, being introduced all the time, butthe basic materials properties like resistivity, dielectricconstant, coefficient of thermal expansion and Young’smodulus must always be considered for low-k andhigh-k dielectrics, SnO2 sensor films, diamond coatingsand 100 µm-thick photoresists alike. Silicon, silicondioxide, silicon nitride, aluminium, tungsten, copper andphotoresist will be met again in various applications:nitride is used not only in LOCOS isolation, but also inMEMS thermal isolation; aluminium not only serves as aconductor in ICs but also as a mirror in MOEMS; copperis used for IC metallization and also as a sacrificial layerunder nickel in metal MEMS; photoresist acts not onlyas a photoactive material but also as an adhesive in waferbonding.

Devices are, of course, discussed but from thefabrication viewpoint, without thorough device physics.The unifying idea is to discuss the commonalities andgeneric features of the fabrication processes. Resistorsand capacitors serve to exemplify concepts like alignmentsequence and design rules, or interface stability. Afterbasic processes and concepts have been introduced,process integration examples show a wide spectrum offull process flows: for example, solar cell, piezoresistivepressure sensor, CMOS, AFM cantilever tip, microfluidicout-of-plane needle and super-self-aligned bipolartransistor. Small process-sequence examples include,similarly, a variety of structures: replacement gate, cavitysealing, self-aligned rotors and dual damascene-low-koptions are among the others.

Older textbooks present microfabrication as a toolboxof MEMS or as the technology for CMOS manufactur-ing. Both approaches lead to unsatisfactory views on

x Preface to the First Edition

microfabrication. Ten years ago, chemical–mechanicalpolishing was not detailed in textbooks, and five yearsago discussion on CMP was included in multilevelmetallization chapter. Today, CMP is a generic tech-nology that has applications in CMOS front-end deviceisolation and surface micromechanics, and is used tofabricate photonic crystals and superconducting devices.It therefore deserves a chapter of its own, independent ofactual or potential applications. Similarly, wafer cleaningused to be presented as a preparatory step for oxidation,but it is also essential for epitaxy, wafer bonding andCMP. Device-view, be it CMOS or some other, limitsprocesses and materials to a few known practices, andexcludes many important aspects that are fruitful in otherapplications.

The aim of the book is for the student to feel comfort-able both in a megafab and in a student lab. This meansthat both research-oriented and manufacturing-driven as-pects of microfabrication must be covered. In order tokeep the amount of material manageable, many thingshave had to be left out: high density plasmas are men-tioned, but the emphasis is on plasma processing in gen-eral; KOH and TMAH etching are both described, butcommonalities rather than differences are shown; imprintlithography and hot embossing are discussed but polymerrheology is neglected; alternatives to optical lithographyare mentioned, but discussed only briefly. Emphasis is oncommon and conceptual principles, and not on the latesttechnologies, which hopefully extends the usable life ofthe book.

Structure of the Book

The structure of this book differs from the traditionalstructure in many ways. Instead of discussing individ-ual process steps at length first and putting full processestogether in the last chapter, applications are presentedthroughout the book. The chapters on equipment are sep-arated from the chapters on processes in order to keepthe basic concepts and current practical implementationsapart.

The introduction covers materials, processes, devicesand industries. Measurements are presented next, andmore examples of measurement needs in microfabrica-tion are presented in almost every chapter. A generaldiscussion of simulation follows, and more specificsimulation cases are presented in the chapters that follow.

Materials of microfabrication are presented next:silicon and thin films. Silicon crystal growth is shortlycovered but from the very beginning, the discussioncentres on wafers and structures on wafers: therefore,silicon wafering process, and resulting wafer properties

are emphasized. Epitaxy, CVD, PVD, spin coating andelectroplating are discussed, with resulting materialsproperties and microstructures on the centre stage, ratherthan equipment themselves. Lithography and etchingthen follow. This order of presentation enables morerealistic examples to be discussed early on.

The basic steps in silicon technology, such as oxida-tion, diffusion and ion implantation are discussed next,followed by CMP and bonding. Moulding and stamp-ing techniques have also been included. In contrast toolder books, and to books with CMOS device emphasis,this book is strong in back-end steps, thin films, etching,planarization and novel materials. This reflects the grow-ing importance of multilevel metallization in ICs as wellas the generic nature of etch and deposition processes,and their wide applicability in almost all microfabrica-tion fields. Packaging is not dealt with, again in line withwafer-level view of microfabrication. This also excludesstereomicrolithography and many miniaturized traditionaltechniques like microelectrodischarge machining.

Microfabrication is an engineering discipline, and vol-ume manufacturing of microdevices must be discussed.Discussions on process equipment have often beenbogged by the sheer number of different designs: shouldthe students be shown both 13.56 MHz diode etcher,triode, microwave, ECR, ICP and helicon plasmas, andshould APCVD, LPCVD, SA-CVD, UHV-CVD andPECVD reactors all be presented? In this book, theprocess equipment discussion is again tied to structuresthat result on wafers, rather than in the equipment perse: base vacuum interaction with thin-film purity isdiscussed; the role of RTP temperature uniformity onwafer stresses is considered; and surface reaction versustransport controlled growth in different CVD reactors isanalysed. Cleanroom technology, wafer fab operations,yield and cost are also covered. Moore’s law and othertrends expose students to some current and future issuesin microfabrication processes, materials and applications.

In many cases, treatment has been divided into twochapters: for example, Chapter 5 treats thin film basics,and Chapter 7 deals with more advanced topics. Lithogra-phy and etching have been divided similarly. This enablesshort or long course versions to be designed around thebook. The figures from the book are available to teach-ers via the Internet. Please register at Wiley for accesswww.wileyeurope.com/go/microfabrication.

Advice to Students

This book is an introductory text. Basic university physicsand chemistry suffices for background. Materials scienceand electronics courses will of course make many aspects

Preface to the First Edition xi

easier to understand, but the structure of the book doesnot necessitate them. The book contains 250 homeworkproblems, and in line with the idea of microfabrication asan independent discipline, they are about fabrication pro-cesses and microstructures; not about devices. Problemsfall mainly in three categories: process design/analysis,simulations and back-of-the-envelope calculations. Theproblems that are designed to be solved with a simulatorare marked by “S”. A simple one-dimensional simulatorwill do. The “ordinary” problems are designed to de-velop a feeling for orders of magnitude in the microworld:linewidths, resistances, film thicknesses, deposition rates,stresses etc. It is often enough to understand if a processcan be done in seconds, minutes or hours; or whetherresistance range is milliohms, ohms or kiloohms. Youmust learn to make simplifying assumptions, and to livewith uncertain data. Searching the Internet for answersis no substitute to simple calculations that can be donein minutes because the simple estimates are often as ac-curate (or inaccurate) as answers culled from Internet.It should be borne in mind that even constants are of-ten not well known: for instance, recent measurements

of silicon melting point have resulted in values 1408 ◦Cby one group, 1410 ◦C by one, 1412 ◦C by seven groups,1413 ◦C by eight groups and 1416 ◦C by three groups,and if older works are encountered, values range from1396 ◦C to 1444 ◦C. With thin film materials propertiesare very much deposition process dependent, and differ-ent workers have measured widely different values forsuch basic properties as resistivity or thermal conductiv-ity. Even larger differences will pop up, if, for instance,the phase of metal film changes from body-centered cu-bic to β-phase: temperature coefficient of resistivity canthen be off by a factor of ten. Polymeric materials, too,exhibit large variation in properties and processing. Thereare also calculations of economic aspects of microfabri-cation: wafer cost, chip size and yield. A bit of memorycosts next to nothing, but the fabs (fab is short for fabri-cation facility) that churn out these chip are enormouslyexpensive.

Comments and hints to selected homework problemsare given in Appendix A. In Appendix B you can finduseful physical constants, silicon material properties andunit conversion factors.

Preface to the Second Edition

If you search on “microfabrication” in Google Scholar,there will be over 100 000 hits; if you type in “MEMS”in Science Direct, you will get in excess of 300 000 hits;“transistor” in IEEE Xplore produces 60 000 articles; and“thin film” in Scirus, over a million articles. There isobviously no problem finding the scientific literature.

This book is a primer that prepares you to access theprimary literature. It is a textbook, not a reference workor an encyclopedia, and even less a review article. Thismeans that the topics and examples are chosen on ped-agogic grounds, so many remarkable seminal works andrecent breakthroughs are not addressed. It also means thatmost fabrication processes are not shown in full detail,rather fundamental ideas are described, and nuances andspecial features are left out, in order to highlight the mainideas. The articles and books in the “References and Fur-ther Reading” sections have been selected to be accessibleto students, and serve as supplementary reading for as-signments and exercises.

This is a fabrication text, and device physics is dis-cussed only briefly. It would be impossible to includedevice physics because microfabrication can be appliedto hundreds of different microdevices. In this book theexamples are drawn mostly from CMOS, MEMS, mi-crofluidics and solar cells, but there are examples fromhard disk drives, flat panel displays, optics and opto-electronics, DNA chips, bipolar and power semiconductordevices, and nanotechnology.

What is New in this Second Edition?

There is about 25% more material, and the text and figureshave been revised throughout. The basic structure of thebook remains unchanged, and the order of chapters ismostly as in the first edition.

Silicon wafer basics are discussed in Chapter 4. Moreadvanced wafers, and wafer behavior during processing,are discussed elsewhere, in Chapters 6 (epitaxy), 17(bonding) and 22 (wafer engineering). Chapters 5 and

7 on thin films have been reorganized into basic andadvanced chapters, with step coverage and stresses nowincluded in the basic chapter.

Pattern generation (Chapter 8) now includes additionalmaterial on electron beam lithography. Chapter 9 intro-duces photoresists and optical lithography, but it is lim-ited to 1× contact/proximity lithography only. Chapter10 deals with advanced IC fabrication lithography withreduction steppers and scanners.

Chapter 12, on wafer cleaning and surface preparation,has been expanded to include polymer surface treatmentsand aspects of fluid behavior on surfaces that are impor-tant in fluidics.

Chapter 17 on bonding has been completely rewritten.It now covers fusion, anodic, metallic and adhesive bond-ing, including process physics and chemistry as well astechnical implementations. Much of the more specializedmaterial on silicon fusion bonding and SOI wafers hasbeen moved to Chapter 22 on wafer engineering.

Chapter 18 has been completely rewritten and is nowcalled “Polymer Microprocessing.” In addition to the oldmaterial on embossing, imprinting and replica molding, itnow contains more on polymer materials properties, thick-resist lithography, polymer bonding and a great numberof device examples, especially in fluidics.

Chapter 19, on glass microprocessing, is new, butit incorporates some elements of a dismantled chapter“Processing on Non-silicon Substrates”. The new chapter,however, concentrates on processing glass itself, to makemicrodevices of glass, in addition to fabricating deviceson glass.

Chapter 23, on special processes, is a collection of tech-niques which are not in the mainstream of microfabrica-tion: namely, niche techniques, non-standard approaches,special materials, and the like. For instance, porous sili-con by electrochemical etching has been moved from theetching chapter to this chapter, in order to streamline thebasic etching chapter.

Another new chapter, Chapter 24, deals with serialmicroprocessing. This includes many direct writing and

xiv Preface to the Second Edition

machining techniques, like focused ion beam processing,laser microfabrication and micromilling and machining.

The core of the book, Chapter 25, on process integra-tion, is now hopefully more general because CMOS- andMEMS-specific issues have been moved to their respec-tive chapters, Chapters 26 and 30. Examples include solarcell devices, fluidic filters, resistors and integrated passivedevices and PCR chips for DNA amplification. The MOSchapter now covers thin film transistors (TFTs) as well.Advanced CMOS is treated in Chapter 38 in order to keepthe introduction to CMOS simple enough.

The old Chapter 22, on sacrificial structures, has beenmoved, greatly expanded and renamed. It is now Chapter29, entitled “Surface Micromachining.” Chapter 30 con-cerns MEMS process integration. It has been completelyrewritten and contains almost 100% more material withmany device examples.

Chapter 31 on process equipment has been rewrittenwith elements from a dismantled chapter on integrated

processing, and with parts from an old Chapter 37,Wafer fab.

Chapter 36 is now called “Yield and Reliability.” Itdraws on the old chapters on yield, process integration andwafer fab. The discussion has been expanded, especiallyregarding MEMS reliability.

Each of Chapters 37, 38 and 39 can serve as a conclud-ing chapter, with a slightly different emphasis: Chapter37, on the economics of microfabrication, centers on costsand markets for CMOS, MEMS, solar and flat-panel dis-plays, and magnetic data storage; Chapter 38, on Moore’slaw, deals with scaling trends in ICs; and Chapter 39, onmicrofabrication at large, concerns the integration of dif-ferent technologies, materials and functionalities, scalingwith “More than Moore.”

Teachers adopting the text will have access to allthe figures and tables in the book as PDF slides.Additionally, a solutions manual will be available atwww.wiley.com/go/Franssila_Micro2e.

Acknowledgements

A number of people have contributed to this 2nd editionin various capacities. Sardar Bilal Alam, Susanna Aura,Kestas Grigoras, Eero Haimi, Klas Hjort, Ville JoksaJokinen, Jari Koskinen, Heikki Kuisma, Tomi Laurila,Marianne Leinikka, Antti Niskanen, Victor Ovtchinnikov,Ville Saarela, Lauri Sainiemi, Ali Shah, GianmarioScotti, Pia Suvanto, Markku Tilli and Santeri Tuomikoskieach read part of the manuscript and gave input that ledto rewriting and reorganizing of the text.

Numerous colleagues and friends have providedassistance in finding material, editing figures, helpingwith software, looking for articles, and contributing theirSEMs and other primary material. These people includeVeli-Matti Airaksinen, Tapani Alasaarela, FlorenceAmez-Droz, Nikolai Chekurov, Nico de Rooij, Kai-ErikElers, Jean-Christophe Eloy, Martin Gijs, Leif Grönberg,Ulrika Gyllenberg, Atte Haapalinna, Kalle Hanhijärvi,Ole Hansen, Paula Heikkilä, Ari Hokkanen, Scotten

W. Jones, Tord Karlin, Ivan Kassamakov, HannuKattelus, Marianna Kemell, Kimmo Kokkonen, KaiKolari, Jorma Koskinen, Anders Kristensen, AnuKärkkäinen, Boris Lamontagne, Volker Lerche, LauriLipiäinen, Laura Luosujärvi, Merja Markkanen, JyrkiMolarius, Juha Muhonen, Joachim Oberhammer, PeterOchojski, Antti Peltonen, Tuomas Pensala, RistoJ. Puhakka, Mikko Ritala, Tapani Ryhänen, HenrikRödjegård, Tomi Salo, Anke Sanz-Velasco, Jens Schmid,Pekka Seppälä, Andreas Stamm, Andrey Timofeev,Daniel Tracy, Esa Tuovinen, Albert van den Berg,Brandon Van Leer and Matthias Worgull.

Simone Taylor, Nicky Skinner, Laura Bell and ClarissaLim at Wiley have been instrumental in pulling it alltogether.

Last but not least, thanks are due to Anna, Aku, Atte,Kiira and Oliver.

1

Introduction

Integrated circuits, microsensors, microfluidics, solarcells, flat-panel displays and optoelectronics rely onmicrofabrication technologies. Typical dimensions arearound 1 micrometer in the plane of the wafer (the rangeis rather wide, from 0.02 to 100 µm). Vertical dimensionsrange from atomic layer thickness (0.1 nm) to hundreds ofmicrometers, but thicknesses from 0.01 to 10 µm are mosttypical. Microfabrication is the collection of techniquesused to fabricate devices in the micrometer range.

The historical developments of microfabrication-relateddisciplines are shown below. The invention of the tran-sistor in 1947 sparked a revolution. The transistor wasborn out of the fusion of radar technology (fast crystaldetectors for electromagnetic radiation) and solid statephysics. Developments of microfabrication methods en-abled the fabrication of many transistors on a single pieceof semiconductor and, a few years later, the fabrication ofintegrated circuits; that is, transistors were connected toeach other on the wafer, rather than separated from eachother and reconnected on the circuit board.

Microelectronics makes use of the semiconductor prop-erties of silicon, but it is also important that silicon dioxideis such a useful material, for passivating silicon surfacesand protecting silicon during wafer processing. Silicondioxide is readily formed on silicon, and it is high-qualityelectrical insulator. In addition to silicon transistors, inte-grated circuits require multiple levels of metal wiring, toroute signals. Silicon microelectronic devices today arecharacterized by their immense complexity and minia-turization: a billion transistors fit on a chip the size ofa fingernail.

Micromechanics makes use of the mechanical pro-perties of silicon. Silicon is extremely strong, andflexible beams, cantilevers and membranes can bemade from it. Pressure sensors, resonators, gyroscopes,switches and other mechanical and electromechanicaldevices utilize the excellent mechanical properties ofsilicon. Microelectromechanical systems (MEMS) or

Introduction to Microfabrication, Second Edition Sami Franssila 2010 John Wiley & Sons, Ltd

NEMSPowerMEMS

RF MEMS Microacoustics Microsensors MEMS

Microelectronics Microfluidics BioMEMS Optoelectronics Micro-optics Lab-on-a-Chip

Optical MEMSOptofluidics

Figure 1.1 Evolution of microtechnology subfields fromthe 1960s onwards

microsystems, as they are also called, have expanded inevery possible direction: microfluidics, microacoustics,biomedical microdevices, DNA microarrays, microre-actors and microrockets to name a few. New subfieldshave emerged: BioMEMS, PowerMEMS, RF MEMS, asshown in Figure 1.1.

Silicon optoelectronic devices can be used as lightdetectors like diodes and solar cells, but light emitters likelasers and LEDs are made of gallium arsenide and indiumphosphide semiconductors. Micro-optics makes use ofsilicon in another way: silicon, silicon dioxide and siliconnitride are used as waveguides and mirrors. MOEMS, oroptical MEMS, utilize silicon in yet another way: siliconcan be machined to make tilting mirrors, adjustablegratings and adaptive optical elements. The micromirrorof Figure 1.2 takes advantage of silicon’s smoothnessand flatness for optics and its mechanical strengthfor tilting.

Microtechnology has evolved into nanotechnologyin many respects. Some of the tools are common, likeelectron beam lithography machines, which were usedto draw nanometer-sized structures long before the termnanotechnology was coined. Electron beam and ion beamdefined nanostructures are shown in Figure 1.3. Thinfilms down to atomic layer thicknesses have been grown

2 Introduction to Microfabrication

Figure 1.2 Micromirror made of silicon, 1 mm in diameter, is supported by torsion bars 1.2 µm wide and 4 µm thick(detail figure). Reproduced from Greywall et al. (2003), Copyright 2003, by permission of IEEE

Figure 1.3 Electron microscope image of an electron beam defined gold–palladium horizontal nanobridge (courtesy JuhaMuhonen, Aalto University) and vertical ion beam patterned nanopillars (courtesy Nikolai Chekurov, Aalto University);100 nm minimum dimension in both

and deposited in the microfabrication communities fordecades. Novel ways of creating nanostructures byself-assembly (self-organization) are being continuouslyadopted by the microfabrication community as tools toextend the capabilities of microfabrication. The tools ofnanotechnology, such as the atomic force microscope(AFM), have been adopted in microfabrication as a wayto characterize microstructures.

Solar cells and flat-panel displays can be large in area,but the crucial microstructures are similar to those in mi-crodevices. Hard disks, and hard disk read/write headsespecially, are microfabricated devices, with some of the

most demanding feature size and film thickness issuesanywhere in microfabrication.

Listed in the references and further reading section atthe end of this chapter are a number of books and reviewarticles on microfabrication in diverse disciplines.

1.1 Substrates

Silicon is the workhorse of microfabrication. Silicon is asemiconductor, and the power of microelectronics arisesstrongly from the fact that silicon is available in bothp-type (holes as charge carriers) and n-type (electrons as

Introduction 3

Figure 1.4 Silicon wafer, 100 mm in diameter, with about200 device chips and a dozen test chips on it. Courtesy VTT

charge carriers), and its resistivity can be tailored over awide range, from 0.001 to 20 000 ohm-cm. Silicon wafersare available in 100, 125, 150, 200 and 300 mm diametersand various thicknesses. Silicon is available in differentcrystal orientations, and the control of its crystal qualityis very advanced.

Bulk silicon wafers (Figure 1.4) are single crystalpieces cut from larger single crystal ingots and polished.Silicon is extremely strong, on a par with steel, and italso retains its elasticity to much higher temperaturesthan metals. However, single crystalline (also known asmonocrystalline) silicon wafers are fragile: once a fracturestarts, it immediately develops across the wafer becausecovalent bonds do not allow dislocation movements.

Many microfabrication disciplines use silicon for con-venience: it is available in a wide variety of sizes andresistivities; it is smooth, flat, mechanically strong andfairly cheap. Most of the machinery for microfabricationwas originally developed for silicon ICs and newer tech-nologies ride on those developments.

Single crystalline substrates include silicon, quartz(crystalline SiO2), gallium arsenide (GaAs), siliconcarbide (SiC), lithium niobate (LiNbO3) and sapphire(Al2O3). Polycrystalline silicon is widely used in solarcell production. Amorphous substrates are also common:glass (which is SiO2 mixed with metal oxides likeNa2O), fused silica (pure SiO2; chemically it is identicalto quartz) and alumina (Al2O3) are used in microfluidics,optics and microwave circuits, respectively. Sheets ofpolyimides, acrylates and many other polymers are alsoused as substrates. Substrates must be evaluated foravailable sizes, purities, smoothness, thermal stability,

mechanical strength, etc. Round substrates are compatiblewith silicon, but square and rectangular ones need specialprocessing because tools for microfabrication are gearedfor round silicon wafers.

1.2 Thin Films

More functionality is built on the substrates by deposition(and further processing) of thin films: various conducting,semiconducting, insulating, transparent, superconducting,catalytic, piezoelectric and other layers are deposited onthe substrates. Thin films for microfabrication includea wide variety of elements: metals of common usageinclude aluminum, copper, tungsten, titanium, nickel,gold and platinum. Metallic alloys and compoundscommonly encountered include Al–0.5% Cu, TiW,titanium silicide (TiSi2), tungsten silicide (WSi2) andtitanium nitride (TiN). The compound is stoichiometricif its composition matches the chemical formula; forexample, there is one nitrogen atom for each titaniumatom in TiN. In practice, however, titanium nitrideis more accurately described as TiNx , with the exactvalue of x determined by the details of the depositionprocess. The most common dielectric thin films aresilicon dioxide (SiO2) and silicon nitride (Si3N4). Otherdielectrics include aluminum oxide (Al2O3), hafniumdioxide (HfO2), diamond, aluminum nitride (AlN) andmany polymers.

A special case of thin-film deposition is epitaxy: thedeposited film registers the crystalline structure of the un-derlying substrate, and, for example, more single crystalsilicon can be deposited on a silicon wafer but with dif-ferent dopant atoms and different dopant concentration.

The general material structure of a microfabricateddevices is shown in Figure 1.5. Interfaces between thethin film and bulk, and between films, are important forthe stability of structures. Wafers experience a number

substrate

thin film 1

thin film 2

surface

interface 2

interface 1

Figure 1.5 Materials and interfaces in a schematicmicrostructure


Figure 1.6 Single crystalline, polycrystalline and amorphous materials

of thermal treatments during their fabrication, andvarious chemical and physical processes are operative atinterfaces, for example chemical reactions and diffusion.Sometimes reactions between films are desired, but mostoften they should be prevented. This can be achieved byadding extra films, known as barriers, in between films.

For example, thin film 1 might present an aluminumconductor and thin film 2 the passivation layer of siliconnitride; or films 1 and 2 are antireflective and scratch-resistant coatings in optics; or film 1 is thin tunnel oxideand film 2 a charge storage layer (as in memory cards).

Surface physical properties like roughness and reflec-tivity are material and fabrication process dependent. Thechemical nature of the surface is important: some sur-faces are reactive, others passive. Many surfaces will becovered by native oxide films if left unattended for sometime: for example, silicon, aluminum and titanium formsurface oxides over a time scale of hours. Water vapor ad-sorbed on surfaces must be eliminated before the wafersare processed further.

Thick substrates are not immune to thin films: a thinfilm 0.1 µm thick may have such a high stress that asilicon wafer 500 µm thick will be curved by tens of mi-crometers; or minute iron contamination on the surfacewill diffuse through a wafer 500 µm thick during a fairlymoderate thermal treatment.

Just like substrate wafers, the grown and deposited thinfilms can be

• single crystalline• polycrystalline• amorphous

as shown in Figure 1.6. During wafer processing, singlecrystal films usually stay single crystalline, but they canbe amorphized by ion bombardment for example. Poly-crystalline films experience grain growth, for instanceduring heat treatments. Foreign atoms, dopants and

100 nm

Figure 1.7 Atomic layer deposited aluminum oxide andtitanium oxide thin films over silicon waveguide ridges.Courtesy Tapani Alasaarela, Aalto University

alloying atoms do not distribute themselves uniformlyin polycrystalline material but aggregate at grain bound-aries, which can lead to both beneficial and detrimentaleffects, depending on the particular materials and processconditions. Amorphous films can stay amorphous or theycan crystallize during high-temperature steps, usuallyinto the polycrystalline state.

Sometimes it is enough to deposit films on flat, planarwafers, but most often the films have to extend over stepsand into trenches (Figure 1.7). These severe topographiesintroduce further deposition process-dependent subtleties.

Note on notations

single crystal materialc-Si single crystal materialα-Si/a-Si amorphous materiala-Si:H amorphous material with imbedded

hydrogen (atomic % sometimes given)

Introduction 5

nc-Si nanocrystalline material (grain size afew nanometers)

µc-Si microcrystalline material (grain size inthe range of tens of nanometers)

mc-Si multicrystalline (large-grainedpolycrystalline, grain size � filmthickness)

Al–0.5% Cu aluminum alloy with 0.5% copperW2N, Si3N4 stoichiometric compoundsSiNx , x ≈ 0.8 non-stoichiometric compoundW:N stuffed material, nitrogen at grain

boundaries (non-stoichiometric)WF6 (g) material in gas phase (for WF6,

boiling point 17 ◦C)WF6 (l) material in liquid phaseW (s) material in solid phaseH2SiOF6 (aq) aqueous solutionSiH2 (ad) material adsorbed on a surfaceSi/SiO2/Si3N4 film stacks are marked with substrate

or bottom film on the left

1.3 Processes

Microfabrication processes consist of four basic opera-tions:

1. High-temperature processes to modify the substrate.2. Thin-film deposition on the substrate.3. Patterning of thin films and the substrate.4. Bonding and layer transfer.

Under each basic operation there are many specific tech-nologies, which are suitable for certain devices, substrates,linewidths or cost levels. Some techniques work well inresearch, producing a few devices with elaborate features,but completely different methods may be required if thosedevices are to be mass produced.

Surface preparation and wafer cleaning could betermed the fifth basic operation but, unlike the other four,no permanent structures are made. Surfaces are modifiedby etching away a few atomic layers, or by depositingone molecular layer. Surface preparation requirementsare widely different in different process steps: in waferbonding it is paramount to eliminate particles that wouldcreate voids if left between the wafers, while in oxidationit is important to eliminate metallic contamination and inepitaxy to ensure that native oxides are removed.

High-temperature steps are used to oxidize silicon andto dope silicon by diffusion, and they are crucial formaking transistor, diodes and other electronic devices.

3.5 eV

2.2 eV

Figure 1.8 Diffusion process: the 2.2 eV barrier can becrossed at ease at 900 ◦C but the frequency of crossing the3.5 eV barrier is low. A higher temperature, for example1050 ◦C, would be needed for the 3.5 eV barrier to becrossed at ease

Devices like piezoresistive pressure sensors also rely onhigh-temperature steps, with epitaxy and resistor diffu-sion as the key processes. High-temperature steps canbe simulated extensively, by solving diffusion equationson a computer. The high-temperature regime in micro-fabrication is ca. 900 ◦C to 1200 ◦C, temperatures wheredopants readily diffuse and the silicon oxidation rate istechnically relevant.

Many chemical and physical processes are exponen-tially temperature dependent. The Arrhenius equation(Equation 1.1) is a very general and very useful descri-ption of the rates of thermally activated processes.Activation energy can be illustrated as a jumping processover a barrier (Figure 1.8). According to the Boltzmanndistribution, an atom at temperature T has an excessof energy Ea with a probability exp (−Ea/kT ). Highertemperature leads higher barrier crossing probability:

rate = z(T ) e(−Ea/kT )

k = 1.38 × 10−23 J/K = 8.62 × 10−5 eV/K (1.1)

The magnitude of the pre-exponential factor z(T ) and theactivation energy Ea vary a lot.

In etching reactions, the activation energy is below1 eV, in polysilicon chemical vapor deposition Ea is1.7 eV, in substitutional dopant diffusion it is 3.5–4 eVand in silicon self-diffusion 5 eV. For a silicon etchingprocess with 0.7 eV activation energy, raising the temper-ature from 20 to 40 ◦C results in a rate six times higher.

A great many microfabrication processes showArrhenius-type dependence: etching, resist development,oxidation, epitaxy, chemical vapor deposition (which arechemical processes) are all governed by exponential tem-perature dependencies, as are diffusion, electromigrationand grain growth (which are physical processes).

Low-temperature processes leave metal-to-silicon inter-faces stable, and generally 450 ◦C is regarded as the upperlimit for low temperatures. Between 450 and 900 ◦C there


is a middle range which must be discussed with specificmaterials and interfaces in mind.

The high-temperature regime is also known as the front-end of the line (FEOL) in the silicon IC business andthe low-temperature regime as the back-end of the line(BEOL). But these terms have other meanings as well:for many people in the electronics industry outside sil-icon wafer fabrication, front-end includes all processingon wafers, and back-end refers to dicing, testing, encap-sulation and assembly. We will use the first definition.

Many thin-film steps can be carried out identically onsilicon wafers and other substrates; by definition they arelayers deposited on top of a substrate. Thin-film steps donot affect the dopant distribution inside silicon; that is,diodes and transistors are unaffected by them.

Processes act on whole wafers – this is the basicpremise. The whole wafer is subject to, for instance, dif-fusion from the gas phase, and metal is evaporated every-where. Either selected areas must be protected by masksbefore the process, or else the material must be removedfrom selected areas afterward, by etching or polishing.

Patterning processes define structures usually in twosteps: polymer processing to form an intermediate patternwhich then acts as a mask for etching, deposition, ionimplantation or other modification of the underlying ma-terial; and after the pattern has been transferred to solidmaterial, the intermittent polymer mask is removed.

The main patterning technique in microfabrication isoptical lithography, also known as photolithography. InFigure 1.9 photolithography is shown side by side withthe thermal imprint/embossing process. In both processesa polymer film is modified locally to create patterns. Inlithography, photosensitive polymer film is exposed toUV light, which hardens the polymer by crosslinking(so-called negative resists). In imprinting, a thermoplasticpolymer softens upon heating, and a master stamp ispressed against it. The system is allowed to cool downbefore the stamp is released, and then the polymer retainsits imprinted shape.

Many old methods have been successfully scaleddown to micrometer and nanometer scales. Etching wasonce used by knights to engrave their armor with theircoats-of-arms, and metal etching with similar acidicsolutions can make aluminum patterns in the micrometerrange. Once an original microstamp or nanostamp hasbeen made, its replication into polymers is fairly easy (itis actually the detachment that is difficult). Electroplatingis likewise easily applicable to nanometer structures.Casting polymers into micromolds is also popular inmicrofabrication: the elastomeric (rubber-like) materialPDMS (poly(dimethyl)siloxane) is a favorite material forsimple microfluidic devices.

UV exposure of polymer Stamping of polymer

Detachment of stamp

Development of image Bottom clearing etch

Figure 1.9 Optical lithography (left) and thermal imprint(right): UV light crosslinks photosensitive polymer, and un-exposed parts are developed away (in so-called negativeresists). In imprinting, softened polymer is forced to shape,and after cooling the shape is retained even though the mas-ter is removed. In imprinting, some material remains at thebottom and must be cleared by etching

Wafer bonding and layer transfer enable more complexstructures to be made. Bonding a wafer on top of a trenchturns it into a channel, useful for microfluidics. Bondingmore wafers can lead to elaborate fluidic channel patterns,as in the burner of a flame ionization detector, Figure 1.10.Bonding two wafers with electrodes creates a capacitor,for instance for pressure sensing. Bonding two differentwafers can also be used simply as a method to create anew kind of a starting wafer, with the best properties ofthe two wafers combined.

These elementary operations of patterning, modifica-tion, deposition and bonding are combined many timesover to create devices. Process complexity is often dis-cussed in terms of the number of lithography steps (the

Introduction 7

pyrex cover

silicon substrate

oxyhydrogenpyrex base

sample gas

nozzlechamber

injection systemmicro nozzle

Figure 1.10 Oxyhydrogen burner of a flame ionization detector by Pyrex–glass/silicon/Pyrex–glass bonding. Reproducedfrom Zimmermann et al. (2002), Copyright 2002 by permission of Elsevier Science Ltd

term mask levels is also used): five lithography steps areenough for a simple PMOS transistor (late 1960s’ tech-nology, and still used as a student lab process in manyuniversities), and many MEMS, solar cell and flat-paneldisplay devices can be made with two to six photolithogra-phy steps, but 32 nm linewidth microprocessors and logiccircuits require over 30 patterning steps.

1.4 Dimensions

Microfabricated systems have minimum dimensions from20 nm to 50 µm, depending on the device types. Ad-vanced microprocessors and memories and the read/writeheads of hard disk drives must have features


0.1 nm 1 nm 10 nm 100 nm 1 µm 10 µm 100 µm

atoms biomolecules viruses bacteria cells

TEM AFM SEM NSOM optical microscope

X-rays EUV UV visible IR

smog smoke dust

R&Dtransistors

CMOSproduction

MEMSdevices

fluidicdevices

Figure 1.12 Dimensions in the microworld: electromagnetic radiation, natural objects, humanmade devices, microscopymethods and dirt

Figure 1.13 Silicon microneedle, about 100 µm. Repro-duced from Griss and Stemme (2003), Copyright 2003, bypermission of IEEE

rate. Chemical vapor deposition (CVD) can be used foranything from a few nanometers to a few micrometers.Sputtering also produces films from 0.5 nm to 5 µm. Spincoating is able to produce films as thin as 100 nm, oras thick as 100 µm. Typical applications include polymerspinning. Electroplating (galvanic deposition) can producemetal layers of almost any thickness, from a few nanome-ters up to hundreds of micrometers.

But almost every device includes structures with di-mensions of about 100 µm. These are needed to interfacethe microdevices to the outside world: most devices needelectrical connections (by a wire-bonding or bumping

process); microfluidic devices must be connected tocapillaries or liquid reservoirs; solar cells and powersemiconductors must have thick and large metal areasto bring in and take out the high currents involved; andconnections to and from optical fibers require structuresabout the size of fibers, which is also on the orderof 100 µm.

1.5 Devices

Microfabricated device can be classified in many ways:

• material: silicon, III–V, wide band gap (SiC, diamond),polymer, glass

• integration: monolithic integration, hybrid integration,discrete devices

• active vs. passive: transistor vs. resistor, valve vs. sieve• interfacing: externally (e.g., sensor) vs. internally

(e.g., processor).

The above classifications are based on device material orfunctionality. In this book we are concentrating on fabri-cation technologies, so the following classification is moreuseful:

• volume (bulk) devices• surface devices• thin-film devices• stacked devices.

Power transistors, thyristors, radiation detectors and solarcells (Figure 1.14) are volume devices: currents are gen-erated and transported (vertically) through the wafer, or,alternatively, device structures extend through the wafer,as in many bulk micromechanical devices. The starting

Introduction 9

Drain

n+

n+n+

p+p+ pp

n−

Source Gate Source

Cell space (Ls)

Halfcell

Width(Lw)

RCHRCH RACC

RJFET

Repl

RACC

(a)

(b)

Finger

Rear contact Oxide

‘Inverted’ pyramids

p+

nn+

p-silicon

Oxide

p+p+p+

Figure 1.14 Volume devices: (a) passivated emitter, rearlocally diffused solar cell, reproduced from Green (1995)by permission of University of New South Wales; (b) n-channel power MOSFET cross-section, reproduced fromYilmaz et al. (1991) by permission of IEEE

wafers for volume devices need to be uniform throughout.Patterns are often made on both sides of the wafer and itis important to note that some processes affect both sidesof the wafer and some are one sided.

Surface devices make use of the material properties ofthe substrate but generally only a fraction of wafer thick-ness is utilized in making the devices. However, devicestructure or operation is connected with the properties ofthe substrate. Most ICs fall under this category: namely,MOS and bipolar transistors, photodiodes, CCD imagesensors as well as III–V optoelectronic devices.

In silicon CMOS, only the top 5 µm layer of the wafer isused in making the active devices, the remaining 500 µmof wafer thickness being for support: that is, mechanicalstrength and impurity control. Shown in Figure 1.15 areCMOS polysilicon gates of 0.5 µm width and 0.25 µm

Figure 1.15 Surface devices: 0.5 µm minimum linewidthCMOS in a scanning electron microscope (SEM) view

Figure 1.16 Curl switch. Reproduced from Oberham-mer and Stemme (2004), Copyright 2004, by permissionof IEEE

height. Surface devices can have very elaborate 3D struc-tures, like multilevel metallization in logic circuits, whichcan be 10 µm thick, but this is still only a fraction of waferthickness; therefore the term surface device applies.

Devices can be built by depositing and patterningthin films on the wafers, where the wafer has no rolein device operation. Wafer properties like thermal con-ductivity or optical transparency may be part of deviceoperation, but another substrate could be used instead.Thin-film transistors (TFTs) are most often fabricated onnon-semiconductor substrates of glass, plastic or steel.Devices like RF switches and relays, optical modulatorsor DNA arrays are often fabricated on silicon wafersfor convenience, but they could be fabricated on glassor polymer substrates as well. Figure 1.16 shows aRF switch: the silicon nitride/gold thin film flap curlsup because of film stresses, but can be forced flat byelectrostatic actuation.

In MEMS devices with free-standing elements, mem-branes and cantilevers pose certain processing limitations


Figure 1.17 A microturbine by five-wafer silicon-to-silicon bonding. Reproduced from Lin et al. (1999) bypermission of IEEE

of their own. Many processes cannot be done on movable,bending structures because they are not stable enough, andtherefore the release step is often the very last processstep. Similarly, devices with through-wafer holes poseserious limitations in many process steps.

Stacked devices are made by layer transfer and bond-ing techniques. Two or more wafers are joined togetherpermanently. Devices with vacuum cavities, for exampleabsolute pressure sensors, accelerometers and gyroscopes,are stacked devices made of bonded silicon/glass waferpairs. Micropumps and valves are typically stacks of manywafers. Figure 1.17 shows a microturbine. It is made bybonding together five wafers. More and more layer trans-fer and wafer bonding techniques are being developed,and stacked devices of various sorts are expected to beappear, for example GaAs optical devices bonded to Si-based electronics, or MEMS devices bonded to ICs.

1.6 MOS Transistor

The MOS transistor is a capacitor with a silicon substrateas the bottom electrode, the gate oxide as the capac-itor dielectric and the gate metal as the top electrode(Figure 1.18). The MOS transistor has been the drivingforce of the microfabrication industries. It is the top deviceby all measures: number of devices sold, the narrowestlinewidths and the thinnest oxides in mass production,as well as dollar value of production. Most equipmentfor microfabrication was originally designed for MOS ICfabrication, and later adapted to other applications.

Despite the name MOS, the gate electrode is usuallymade of phosphorus-doped polycrystalline silicon, not of

S Dchannel

SiO2 SiO2

gate

gate oxide

Figure 1.18 Schematic of a MOS transistor: gate, source(S) and drain (D) in an active area defined by thick isolationoxide

metal. The basic function of a MOS transistor is to con-trol the flow of electrons from the source to drain by thegate voltage and the field it generates in the channel. Ina NMOS transistor, a positive voltage on the gate pullselectrons from the p-type channel to the Si/SiO2 interfacewhere an overabundance of electrons inverts the regionunder the gate to n-type, enabling electrons to flow fromthe n+ source to the n+ drain.

Transistors are isolated electrically from neighboringtransistors by SiO2 field oxide areas. This isolationtakes up a lot of area, and therefore the transistorpacking density on a chip does not depend on transistordimensions alone.

Scaling down MOS transistor channel length makes thetransistors faster. The other main aspect is area scaling:a factor N linear dimension scaling reduces the area toA/N2. Gate width, gate oxide thickness and source/draindiffusion depths are closely related, and the ratios aremore or less unchanged when the transistors are scaleddown. As a rough guide, for a gate width of L, theoxide thickness is L/50, and the source/drain junctiondepth is L/5.

1.7 Cleanliness and Yield

Microfabrication takes place under carefully controlledconditions of constantly circulating purified airflow, withtemperature, humidity and vibrations also under strict con-trol because micrometer-scale structures would otherwisebe destroyed by particles or else the lithography processwould be ruined by vibrations or temperature and humid-ity fluctuations. Personnel in cleanrooms wear gowns toprevent particle emissions (Figure 1.19), and work proce-dures have been developed to minimize all disturbances.

Wafers are cleaned actively during processing: thou-sands of liters of ultrapure water (UPW, as known asde-ionized water, DIW) is used for each wafer during

Introduction 11

Figure 1.19 Working in a cleanroom, courtesy VTT

device fabrication. This is the dynamic part of particlecleanliness: the passive part comes from careful selec-tion of materials for cleanroom walls, floors and ceilings,including sealants and paints, as well as selection of mate-rials for design and for process equipment, wafer storageboxes and all associated tools, fixtures and jigs.

Even though extreme care is taken to ensure cleanlinessin microprocessing, some devices will always be defec-tive. As the number of process steps increases, yield Ygoes down according to

Y = Yn0 (1.2)

where Y0 is the yield of a single process step and n isthe number of steps. With 100 process steps and 99%yield in each individual step, this results in a 37% yield(representative of a 64 k DRAM chip), but a 99% yield fora 500-step process (representative of a 16 Mbit DRAM)results in a yield


Table 1.1 Wafer size and linewidth distributionin 2009

Wafer size % of area % of wafers

300 mm 38 15200 mm 38 35150 mm 17 30

Documents

Introduction to Microfabrication · 24.3 Laser Direct Writing 301 24.4 AFM Patterning 305 24.5 Ink Jetting 306 24.6 Mechanical Structuring 307. Preface to the First Edition Preface