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Integrated Systems Design Trends, Challenges and Solutions Global Workflow 2006 Seminar. Sami Aarras Team Leader, PWB Design Tools Mentor Graphics Finland. Mentor Graphics. Revenue - over $700 million in 2004 Market Share ~19% of worldwide EDA market Third ranking in EDA industry - PowerPoint PPT Presentation
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Integrated Systems DesignTrends, Challenges and Solutions
Global Workflow 2006 Seminar
Sami AarrasTeam Leader, PWB Design ToolsMentor Graphics Finland
SAa, Jan 2006, Integrated Systems Design - Company Confidential2
Mentor Graphics
Revenue - over $700 million in 2004 Market Share ~19% of worldwide EDA market Third ranking in EDA industry Focused on growth through internal development
Source: EDAC Market Statistics
SAa, Jan 2006, Integrated Systems Design - Company Confidential3
Mentor Graphics Around the World
Key Sales Offices R&D Sites
Operates through 28 engineering sites and 48 sales offices around the world
SAa, Jan 2006, Integrated Systems Design - Company Confidential4
Mentor’s SystemsDesign
Organization Delivers TOTAL flow solutions for
Integrated Systems Design (ISD)— Design content— Design intent— Analysis— Verification— FPGA Synthesis— Manufacturing outputs— Data management— Harness Systems
Worldwide PCB market share leader*
400+ employees
*Source: Dataquest June 2004
SAa, Jan 2006, Integrated Systems Design - Company Confidential5
Corporate Infrastructure Systems
Mentor’s Integrated Systems Design Focus
Connectivity
PackageIn
tegr
atio
n
SAa, Jan 2006, Integrated Systems Design - Company Confidential6
Integrated Systems Design Flow
SAa, Jan 2006, Integrated Systems Design - Company Confidential7
The Electronics Industry Faces Many Challenges
Drive to reduce design cycle time and time-to-market
Use of latest IC and PCB technology to compete
— Form factor— Performance
Leverage resources of a global enterprise
Reduce product costs and increase margins
Reliability and quality
SAa, Jan 2006, Integrated Systems Design - Company Confidential8
Systems Design Complexity on the Rise
SAa, Jan 2006, Integrated Systems Design - Company Confidential9
Business Pressures Continue
Market Developments … … result in much lower Margins
Year
Margin %
2004 2005 2006 2007 2008
Digitalization of Products
Entrance of C-brands and new Competitors with
different Business Models
Shortened Life Cycles
Price Erosion
Margin Deterioration
SAa, Jan 2006, Integrated Systems Design - Company Confidential10
Time-to-Market is Critical, but,…
Design Cycle
SAa, Jan 2006, Integrated Systems Design - Company Confidential11
Design Cycle
.. Increasing Systems Design Complexity Lengthens Design Cycle Time
Design Complexities•More high-complexity FPGAs on board
•Higher speed interconnects & system performance•Higher pin-count FPGA & IC packages
•Consumer product use of flex & rigid-flex•HDI/Microvia layer fabrication
•Embedded components•Industry globalization
•Outsourcing
SAa, Jan 2006, Integrated Systems Design - Company Confidential12
Design Cycle
Continued Investment is Required to Counteract Complexities
Mentor’s Investmentin Integrated Systems Design
•Reduced design cycle•Use of advanced technologies•Support for Global companies
SAa, Jan 2006, Integrated Systems Design - Company Confidential13
Electronics Industry Has Gone Global
Global companies have design teams, manufacturing and outsource in locations worldwide.
Global companies have design teams, manufacturing and outsource in locations worldwide.
SAa, Jan 2006, Integrated Systems Design - Company Confidential14
Challenges Faced By Large Global Companies
Leveraging design teams located locally or globally dispersed— Need to have the design “follow-the-sun” to cut design cycle time— Expertise may exist in several locations (RF, digital, analog)
Need to efficiently create, control and provide access to intellectual property on a global scale
— Design data— Library data— Design constraints, rules, information
Provide seamless communication between OEM and “outsourcees”
— Electronic manufacturing suppliers (EMS)— ODMs and third parties performing all of part of design process
Protection and control of IP
SAa, Jan 2006, Integrated Systems Design - Company Confidential15
Global Design Teams
Local or globally dispersed design teams must be able to work on the Local or globally dispersed design teams must be able to work on the same design at the same time. Goal: Reduce design cycle time!same design at the same time. Goal: Reduce design cycle time!
Local or globally dispersed design teams must be able to work on the Local or globally dispersed design teams must be able to work on the same design at the same time. Goal: Reduce design cycle time!same design at the same time. Goal: Reduce design cycle time!
SAa, Jan 2006, Integrated Systems Design - Company Confidential16
Support for Global Design Teams…On Large, Complex Designs
Solution: Simultaneous layout by multiple designers
SAa, Jan 2006, Integrated Systems Design - Company Confidential17
Support for Global Design Teams…On Mixed Technology Designs
Solution: Simultaneous layout by technical specialists
SAa, Jan 2006, Integrated Systems Design - Company Confidential18
XtremePCB Design
Multiple designers — The same design— The same application— At the same time— LAN or WAN enabled — Edits automatically
synchronized in real time Changes checked, merged,
broadcasted— For all PCB layout tasks
Placement, routing, verification, drafting, manufacturing prep
Value— Significant reduction in layout design cycle time — Enable globally dispersed design teams and specialists to
work simultaneously on the same design
Designer
SAa, Jan 2006, Integrated Systems Design - Company Confidential19
Outsourcing Design
Many global companies outsource a Many global companies outsource a part of their designpart of their design to 3 to 3rdrd party party design houses or ODMs. Goal: capitalize on outsourced expertise.design houses or ODMs. Goal: capitalize on outsourced expertise.Many global companies outsource a Many global companies outsource a part of their designpart of their design to 3 to 3rdrd party party design houses or ODMs. Goal: capitalize on outsourced expertise.design houses or ODMs. Goal: capitalize on outsourced expertise.
SAa, Jan 2006, Integrated Systems Design - Company Confidential20
Adding to the Complexity!“55% of Companies Outsource All or Part of their Board Designs”
0%
10%
20%
30%
40%
50%
60%
70%
80%
Chip-levelDesign
Board-levelDesign
Software SystemDesign
All Companies Large companies
Source: EEtimes Research Report, January 2005
SAa, Jan 2006, Integrated Systems Design - Company Confidential21
Innovation in Global Team Design
TeamPCB ™— Divide design into sections— Layout sections in parallel— Share progress with other
designers— Merge sections back into
master design— Totally automated & error free
Master
Split &Join
Digital Designer
Analog Designer
Digital Designer
RF Designer
Designer-to-designer
updates
SAa, Jan 2006, Integrated Systems Design - Company Confidential22
Managing Intellectual Property is a Challenge
SAa, Jan 2006, Integrated Systems Design - Company Confidential23
Intellectual Property
What constitutes IP?— Design data— Re-useable blocks— Library parts data— Design constraint rules and design intent information
What are the challenges?— Efficient access and download of supply chain info.— Searching and choosing the right component— Capture, access and control of constraint rules and intent— Bi-directional communication between design and manufacturing
BOMs, parts availability and manufacturability
SAa, Jan 2006, Integrated Systems Design - Company Confidential24
Example - Choosing the Right ComponentSimple Decision, Global Consequences
SAa, Jan 2006, Integrated Systems Design - Company Confidential25
Product Costs Committed Early
SAa, Jan 2006, Integrated Systems Design - Company Confidential26
Choosing the Wrong Component Can be a Disaster
Cost— E.g., consumer product designer picks very expensive
part— Not discovered until purchase requisition issued— Either redesign or non-competitive price product
Availability— E.g., designer chooses “perfect” part— Manufacturer gets BOM and can not get part in volume— Either redesign or lag in volume production
Manufacturability— E.g., designer chooses good part for design— However, part requires specialized manufacturing— Either redesign or increase in manufacturing costs
?
SAa, Jan 2006, Integrated Systems Design - Company Confidential27
EDA Tool Integration Required with Corporate PLM Systems and the Industry Supply Chain
PLM & ERP•Business & Manufacturing•Operations Management
DMS•Library
•Component Information•BoM & Design Data
Management
EDATools
EnterpriseIntegration
SAa, Jan 2006, Integrated Systems Design - Company Confidential28
EDA Tool to Corp. Infrastructure IntegrationDMS Reduces Design Time & Product Cost
Complete part information available
— Cost— Availability— Value— Characteristics
The right choice early in the process Component
Data
Design/part Information•Availability
•Cost•Manufacturability
Designer
BOMs
SAa, Jan 2006, Integrated Systems Design - Company Confidential29
Technology ChallengesThe Ripple Effect of Advancing Technology
Advances in IC/FPGA
Advances in PCB Fabrication
Advances in EDA Tools
MHZ and GHz speeds1500 to 3000 pins/packageMore FPGAs on PCBElectro-magnetic interference
HDI/MicroviaEmbedded ComponentsMCMLead-freeHigh-speed MaterialsOptical
SAa, Jan 2006, Integrated Systems Design - Company Confidential30
The Need for Speed
Exponentially increasing clock speeds Exponentially decreasing timing margins
Faster rise times; signal integrity issuesThe SERDES Design Trend
0
1
2
3
4
5
6
7
8
9
1985 1992 1996 1998 2000
Ed
ge
Ra
te (
ns
)
74F244
74ABT244
74ALVCH16244
74AVC16244
HCT
FAST
ABT
LVT
Timing Budget (ns)
Clo
ck S
pee
d (
MH
z)
0 20 40 60 80 100
10
30
100
300
Clk to Q Setup/Hold Trace Delay Margin
1515
1010
55
11
80s 90s 00s
ISA8.33 MHz
PCI
UP TO 66 MHz
VESAVL
EISAMCA
OpticalInterconnects
SignalingRate
(Gbps)
SignalingRate
(Gbps) PCI-X
HyperTransportPL4
RapidIO
AGPx
SATA
InfiniBand
1Gbps Parallel Bus Limit?
>12 Gbps Copper Signaling Limits
PCIExpress
FibreChannel
SerialRIO
GbE
10 GbE
SAa, Jan 2006, Integrated Systems Design - Company Confidential31
Multi-Gigabit Design Issues
Require a whole new analysis and verification approach,
including analysis of ...— Loss and rise-time degradation
— Jitter
— Crosstalk
— Complex via effects
— Pre-emphasis/Equalization
— Differential path matching
-400.0
-200.0
0.0
200.0
400.0
600.0
800.0
1000.0
1200.0
1400.0
1600.0
11000.0
11200.0
11400.0
11600.0
11800.0
12000.0 Time (ps)
V
oltage -mV
-
20 inches
Lossless
30 inches
40 inches
SAa, Jan 2006, Integrated Systems Design - Company Confidential32
High-end FPGAs are now commonplace on most PCB designs
Implementing these on a PCB presents many challenges:— Timing closure on both the FPGA and PCB
— System performance optimization
— Reduction of design cycle time – concurrent design
— Reduction of PCB layout time and manufacturing costs
— Use of advanced high speed (classic and SERDES)
— Use of advanced PCB fabrication technologies
Mentor has addressed these challenges with our Integrated Systems Design (ISD) solutions and Partnerships with leading FPGA suppliers
Integrated Systems Design
SAa, Jan 2006, Integrated Systems Design - Company Confidential33
Expedition™ Enterprise Flow
SAa, Jan 2006, Integrated Systems Design - Company Confidential34
Expedition EnterpriseAddressing the Challenges of the Global Enterprise
Challenges of product design within a global enterprise— Design team collaboration— Intellectual property management— Corporate enterprise integration— Integrated system design— Government regulation compliance
Expedition Enterprise enables design teams to leverage the power of their enterprise environment to reduce product cost and design cycle times
SAa, Jan 2006, Integrated Systems Design - Company Confidential35