Integrated hybrid Si/InGaAs 50 Gb/s DQPSK receiverocpi.ece.ucsb.edu/.../12/2012_Faralli_Integrated-hybrid-Si-InGaAs.pdf · Integrated hybrid Si/InGaAs 50 Gb/s DQPSK receiver Stefano

Integrated hybrid Si/InGaAs 50 Gb/s DQPSK receiver

Stefano Faralli,1,2,*

Kimchau N. Nguyen,1 Jonathan D. Peters,

1 Daryl T. Spencer,

1

Daniel J. Blumenthal,1 and John E. Bowers

1

1 Electrical and Computer Engineering Department, University of California, Santa Barbara, CA 93106, USA 2 Scuola Superiore Sant’Anna, TeCIP Institute, Via G. Moruzzi 1, Pisa, Italy

*[email protected]

Abstract: A monolithic 25 Gbaud DQPSK receiver based on delay interferometers and balanced detection has been designed and fabricated on the hybrid Si/InGaAs platform. The integrated 30 µm long InGaAs p-i-n photodetectors have a responsivity of 0.64 A/W at 1550 nm and a 3dB bandwidth higher than 25 GHz. The delay interferometer shows a delay time of 39.2 ps and an extinction ratio higher than 20 dB. The demodulation of a 25 Gb/s DPSK signal by a single branch of the receiver demonstrates its correct working principle.

©2012 Optical Society of America

OCIS codes: (060.4510) Optical communications; (130.0130) Integrated optics; (250.5300) Photonic integrated circuits; (060.5060) Phase modulation.

References and links

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#171695 - $15.00 USD Received 2 Jul 2012; revised 2 Aug 2012; accepted 2 Aug 2012; published 13 Aug 2012(C) 2012 OSA 27 August 2012 / Vol. 20, No. 18 / OPTICS EXPRESS 19726

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1. Introduction

Phase modulated data formats have attracted attention recently for next generation optical communication systems [1]. In particular, these multilevel modulation and detection techniques naturally enable high bit rate optical transmission such as 40 G SONET and 100 G Ethernet. Differential quadrature phase-shift keying (DQPSK) has received great attention because it doubles the spectral efficiency compared to binary formats. Different solutions have recently been proposed enabling this technology for in-field optical transmission systems [2]. The conventional system for demodulation of a DQPSK optical signal consists of a demodulator that converts optical phase modulation into intensity modulation, in particular two Mach-Zehnder delay interferometers for demodulation of both the signal quadratures, followed by balanced photodetectors. The interferometers have a delay of one symbol period and different phase-shifts ( ± π/4) for correct detection of the different signal quadratures. Due to the differential detection scheme, unlike the coherent detection, the DQPSK receiver does not require a low linewidth laser or high speed signal processing for carrier phase estimation [3]. The complexity and expensive implementation of advanced modulation methods for optical communication have limited their commercial development. A DQPSK receiver based on photonic integrated circuits (PIC) could provide a low cost and compact solution to next generation optical communication systems [4], with potential integration with high volume, mature CMOS processes [5]. A monolithic DQPSK PIC based on InP has been demonstrated at 45.6GHz [6]. Doerr et al. have proposed a 43 Gb/s Polarization Division Multiplexed DQPSK silicon receiver [7] where Ge photodiodes were monolithically integrated on the silicon on insulator (SOI) platform [8]; moreover, a variable symbol-rate silicon photonics DQPSK receiver operating at bit rates between 14.8 and 18 Gb/s has been reported in [9]. In [10] we showed preliminary results regarding the characterization of a DQPSK receiver fabricated on the hybrid Silicon platform [11], in this paper we report for the first time the fabrication of an integrated receiver for 25 Gabud DQPSK signals, where InGaAs balanced photodiodes are integrated in the chip. In particular, the working principle of the receiver is demonstrated for a 25 Gb/s DPSK TE polarized signal demodulated in a single branch of the receiver.

2. Design and fabrication of the PIC

2.1 Design

The picture and the corresponding mask layout of the receiver are shown respectively in Fig. 1 and Fig. 2(a); the receiver consists of two multimode interference (MMI) based couplers, two 40 ps delay interferometers including four heater phase shifters (one in each branch of the two delay interferometers), and two balanced InGaAs p-i-n photodetector pairs.

The two delay interferometers (DI) of the DQPSK receiver are designed to convert the differential phase modulation in intensity modulation for both quadratures of the signal carrier. For each DI a 1x2 MMI based splitter splits the light into a waveguide and a delay-line spiral waveguide; the spiral waveguide has a length equivalent to a 40 ps time delay respect to the other waveguide and corresponds to 1 period symbol for a bit rate of 25 Gb/s. The two waveguides are then combined in a 2x2 MMI combiner and received by the balanced photodetector.


Fig. 1. DQPSK receiver based on Mach-Zehnder delay interferometers and balanced detection. The footprint of the device is 1.8 x 3.5 mm2.

The loss due to the delay line has been compensated by choosing a split ratio of the 1x2 MMI splitter equal to the loss difference between the two arms of the delay interferometers. The two DIs are biased at π/4 and –π/4 in order to receive the different signal quadratures.

The single p-i-n PD has been designed in terms of frequency response and responsivity as reported in [10]: the intrinsic InGaAs absorber region thickness affects the RC and transit time in opposite way and has been chosen to be 500 nm, the optimum length is 30 µm, allowing for a 3dB electrical bandwidth higher than 25 GHz.

Fig. 2. (a) Mask layout of the DQPSK receiver based on Mach-Zehnder delay interferometers and balanced photodetectors. Waveguides are shown in blue, metal contacts are light green. The layout includes stand-alone single PD test structures on the left. (b) Details of the balanced p-i-n InGaAs PD structure.

In order to reduce reflections between the passive silicon waveguide and the hybrid waveguide detector, the interface to the III-V layer is angled at 7 degrees above the passive silicon waveguide. Stand-alone photodiodes with different lengths (25-60µm) are also included in the chip for full characterization.

The silicon structures are realized by defining the silicon waveguide on SOI wafer. Waveguides are etched 0.3 µm into a 0.7 µm silicon layer. The buried oxide is 1.0 µm. Passive silicon waveguide width is 2 µm and the minimum waveguide bending radius is 150 µm to limit the loss due to the fabrication roughness [12]; the 0.4 µm no-etched silicon layer acts as a thermal shunt and improves the control of the device heating. The MMI coupler


width is 6 µm and the length is 170 µm for the 2x2 MMI couplers and 162 µm for the 1x2 MMI splitters.

An evaluation of the PIC wavelength dependence has been also made by numerical simulations in the operating range between 1500 and 1600 nm. The group index variation of the DI waveguide is 0.5% and corresponds to the maximum delay time variation of 0.2 ps. The MMI couplers and splitters were designed at the operating wavelength of 1550 nm; numerical results show a maximum splitting ratio variation of 0.5 dB in 100 nm range that can reduces the extinction ratio of the DI and limits the receiver performance.

2.2 Fabrication process

III-V material is transferred to the Si waveguide platform through a low temperature, O2 plasma assisted bonding [13]. The p-i-n photodetectors have the same structure as the single photodetector reported in [14], and the balanced photodetectors shown in Fig. 2 (b) have been made by connecting two p-i-n photodiodes with contact metal. In the single p-i-n photodetectors, the p-InGaAs layer is the p-contact, intrinsic InGaAs is the absorbing region, and n-InP is the n-contact layer. The detailed epitaxial layerstack used for fabrication is reported in [14], and includes the modification of a superlattice to minimize the propagation of defects from the bonded layer to the intrinsic InGaAs layer during the wafer bonding process. This should minimize the dark current of the PD.

The InGaAs PD has high absorption coefficient and a very flat spectral responsivity over the whole telecom C and L bands; this technological choice allows for the use of this device in a very large spectral region and also for wavelength division multiplexing schemes. Moreover, semiconductor optical amplifiers or light emitters based on the same technology and sharing the same process step can be easily integrated in more complex receiver schemes [14].

The phase shifters integrated in the PIC are based on NiCr heaters. They are 10 µm wide and 500 µm long and are capable of inducing an optical phase shift greater than 2π radians [15].

The PIC dimensions are not optimized for a small footprint, and this choice takes in account the trade-off between thermal heating control, footprint, and fabrication complexity. As shown in [16], although the waveguide loss due to sidewall roughness can be reduced by careful fabrication, the use of Si wire waveguide for manufacturing a compact device in the Si/InGaAs hybrid platform is mainly limited by the low thermal conductivity of the buried oxide layer. However in [17] we have demonstrated a thermal shunt technological solution using poly-Si plugs that channel the thermal energy away from the bonded III-V region into the silicon substrate and can be exploited for a small footprint PIC manufacturing.

3. P-i-n Phtodetector

The p-i-n photodetectors have been characterized first by measuring the I-V (current-voltage) curve and responsivity of the stand-alone photodiodes at the operating wavelength of 1550 nm and then by high speed 3dB bandwidth measurements. Figure 3 shows I-V curves for different lengths of the p-i-n photodetectors. A dark current of 20 µA is measured at 3V reverse bias. Table 1 reports the values of the series resistances of the PDs, and as theoretically predicted the series resistance decreases with increasing length of the photodiodes.

The responsivity of the stand-alone PDs included in the chip has been measured for photodiodes of different lengths (25-60 µm). For a 30 µm long PD at 3V reverse bias, we measured a responsivity equal to 0.64 A/W for CW TE light at 1550 nm considering 8.25 dB of coupling loss between the input facet and the lensed fiber.


Fig. 3. I-V curve of PIN photodetectors with different lengths.

Table 1. Series Resistance

PD Length (µm)

Series Resistance (Ω)

25 51 30 33 60 21

Figure 4 reports the responsivity of the p-i-n photodetectors as function of the PD length. As theoretically expected the responsivity increases as the PD length increases and it is 1.14 A/W for a 60 µm long PD.

Fig. 4. Responsivity of PIN photodetectors with different lengths measured at 1550 nm.

The 3 dB bandwidth of the stand-alone PDs with lengths varying between 25 and 60 µm have also been measured using a lightwave component analyzer (LCA). The LCA includes an optically modulated source at 1550 nm and an RF probe that collects the RF signal generated by the PD. A bias tee is used to set the PD bias voltage and the RF signal is sent to the LCA through the bias tee. Figure 5 shows the 3dB bandwidth of the integrated photodiodes with different lengths and Fig. 6 shows the normalized frequency response at 3V reverse bias voltage for two PDs with different lengths (25 and 60 µm). The PDs with lengths less than 50 µm have a 3 dB bandwidth larger than 25 GHz.


Fig. 5. Frequency response of the p-i-n photodiodes: 3dB Bandwidth of the p-i-n photodiodes vs. the PD lengths measured at 1550 nm for 3V reverse bias voltage.

Fig. 6. Frequency response of the p-i-n photodiodes: normalized frequency response for different p-i-n PD lengths at 3V reversed bias voltage measured at 1550 nm.

4. Delay Interferometer

The two DIs integrated into the DQPSK receiver convert the differential phase modulation into intensity modulation for both quadratures of the signal carrier. The DI consists of a 1x2 MMI based splitter, a waveguide and a spiral waveguide delay-line with a length equivalent to a 40-ps time delay, and a 2x2 MMI based combiner. Spiral waveguides of different lengths (2 - 8 cm) have been included in the mask layout for the measurement of the spiral waveguide attenuation using the cut-back method. Two lensed fibers are used to couple light at 1550 nm in and out of the optical spiral waveguides using a top-view infrared camera for rough fiber alignment, while a piezo tuning is used to minimize the coupling loss. Figure 7 shows the total measured fiber-to-fiber loss (waveguide attenuation + coupling loss) versus the length of the spiral waveguides. The measured waveguide attenuation is 1.36 dB/cm and the calculated coupling loss at the input and the output facets is 8.25 dB. The delay interferometer filter is characterized with a similar coupling scheme; the light coupled at the input of the demodulator was collected at the output on the opposite facet of the chip where the light is collected by a second lensed fiber and the power is measured by an optical power meter.


Fig. 7. Attenuation measurements of the spiral waveguides by cut back method.

The polarization at the input of the demodulator was optimized for TE polarization using a polarization controller. A frequency sweep of the tunable laser around 1550 nm gives the typical square cosine spectral response of the delay interferometer as shown in Fig. 8.

The DI with a length of 3.13 mm and a fundamental TE mode group index of 3.828 has a measured frequency of 25.5 GHz that corresponds to a delay of 39.2 ps. Moreover, Fig. 8 reports the spectral response of the DI designed with (dark line) and without (gray line) the compensation of the delay line loss; the measured extinction ratio in the compensated DI is more than 20 dB versus 12 dB in the uncompensated one.

Fig. 8. Spectral response of the delay interferometer filter. Optical output power vs. frequency for the delay interferometer designed with (dark line) and without (gray line) the compensation of the delay line loss.

5. Transmission experiment results

In order to evaluate the performance of the receiver we have performed bit error rate (BER) measurements versus received power by a DPSK signal modulated at 25 Gb/s. The demodulation of the signal has been done by a single branch of the receiver. Although we didn’t use a DQPSK signal, the demodulation of the DPSK signal has been implemented by both the branches of the receiver with the same performance and is a simple demonstration of the working principle of the fabricated integrated device. Moreover, since the optical phase shifters provide a phase shift higher than 2π radians, they ensure a total control of the phase offset between the two branches and the correct and simultaneous detection of the in-phase and quadrature components of a DQPSK signal.


Fig. 9. Experimental set-up for receiving a 25 Gb/s DPSK modulated signal.

Figure 9 shows the experimental set-up for the transmission measurements. A 1550 nm optical signal emitted by a tunable laser is tuned to TE polarization and modulated by a DPSK modulator with a PRBS 2

7-1 pattern. We have used a Mach-Zehnder modulator (MZM) for

phase modulation where the MZM has been biased at its transmission null, and driven at twice the switching voltage required for OOK modulation. The optical signal at the MZM output is optically amplified by an Erbium doped fiber amplifier (EDFA) and coupled into the receiver input facet after a second polarization controller. The photodetectors are reverse biased at 3 V by a bias tee and the RF electrical signal generated in the balanced photodetector is analyzed in terms of BER by a BER tester and an oscilloscope. We have not noticed transmission performance variation due to thermal heating for different PRBS pattern lengths.

We have observed a small short in the balanced photodetector block between the two connected p-i-n photodiodes, and even if we lose the advantages of the balanced photodetection, the p-i-n photodetectors were separated using focus ion beam for the best transmission results.

Fig. 10. BER vs. Received Power of the 25 Gb/s DPSK TE polarized signal


Figure 10 shows the measured bit error rate versus the receiver input optical power considering 8.25 dB of coupling loss. A bit error rate lower than 1E-9 has been measured for an input optical power of 13.75 dBm.

6. Conclusion

A DQPSK receiver operating at 50 Gb/s and integrated in the hybrid Si/InGaAs platform has been designed and fabricated. The 30 µm long integrated photodiodes show a 3dB bandwidth higher than 25GHz and a responsivity of 0.64 A/W. The integrated delay interferometer has been designed for a 40 ps delay line and delay line loss compensation; the measured delay time is 39.2 ps with an extinction ratio higher than 20dB.

Single polarization operation of the receiver is demonstrated for a 25 Gb/s DPSK TE polarized signal demodulated by a single branch of the receiver; the transmission results show a BER = 1E-9 for a received power equal to 13.75 dBm.

The proposed DQPSK receiver does not include a polarization multiplexing (PM) scheme and the integration of the polarization splitter-rotator as proposed in [18] could enable the demodulation of a PM-DQPSK signal at 100 Gb/s.

Acknowledgments

The authors would like to thank Molly Piels, Paolo Pintus and Geza Kurczveil for helpful discussions and suggestions.

This work was supported in DARPA MTO Cipher funded PICO Center.


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Integrated hybrid Si/InGaAs 50 Gb/s DQPSK receiverocpi.ece.ucsb.edu/.../12/2012_Faralli_Integrated-hybrid-Si-InGaAs.pdf · Integrated hybrid Si/InGaAs 50 Gb/s DQPSK receiver Stefano