20GHz DQPSK Optical Modulator Electrical Bias Optimiser

Engineering

Self-Adjusting Serrodyne Loop Optical Frequency ShifterBenjamin LarcombeAcademic Supervisor: Professor A. Lowery

24th October 2012Self-Adjusting Optical Serrodyne Loop Frequency Shifter 2

What is an Optical Serrodyne Loop Frequency Shifter? (Recap)

An optical Single Sideband Spectrum generator which uses one single Mode laser source.

Generates a spectrum of optical carrier frequencies separated by a fixed but variable frequency space.


Motivation• To be able to produce an optical spectrum of closely spaced

carriers (subcarriers of a WDM channel) and modulate a single stream of data onto these subcarriers.

• Why?

• To test whether high data rates are achievable when subcarriers are more closely spaced together

• Because Using multiple modulators to independently modulate data onto each subcarrier, for lab testing purposes is totally unnecessary and extremely inefficient.

Background Theory An IQ (In phase/quadrature) DQPSK type Modulator can

1. Be DC biased at its three DC Bias Terminals

2. And Have two RF Quadrature Signals (Sin and Cos) applied to its RF terminals

Such that an Optical Frequency Shift can be produced at the DQPSK’s modulator Output.


Frequency Shift produced by Linear time variant Phase shift Around IQ

plane.

DQPSK Optical Modulator


RF A

180° Bias A

-RF B180°

Bias B

-RF A

RF B

90° Bias C

Phase Shifts at Bias A,B, and C are controlled by Bias Voltages.

Optical Laser Input

Optical Frequency

Shift Output

When Bias Inputs A and B are optimized Output

Power Is Minimized, Assuming RF is Inactive

or 0

When two low frequency quadrature Dither Signals are applied to Points A and B, two

low frequency optical components are seen at the

Output, the dither signal frequency and twice its

frequency.

When Bias Point C is optimized, the second harmonic produced by the dither Signal Is

Minimized,

Upper Arms

Lower Arms

Optical Couplers

DQPSK Modulator Non Idealities A real nested DQPSK Modulator or Nested Mach Zehnder

Interferometer

– Includes Insertion Losses through its structure due to• Non-Ideal Optical Coupling/Decoupling• Optical path Losses

– Has a non-infinite extinction ratio (power is not equally balanced between the upper and lower arms).

– Is highly dependent on temperature. Over time DC Drift Voltages can effectively move the bias voltages away from the Optimised Points.

Thus the aim of this project is to keep DQPSK modulator biased so that a clean Optical Frequency Shift can be produced over a large time span.


What was done this year?

1. A number of different methods that achieve biasing of a DQPSK Modulator were researched. The chosen method was then simulated in Computer Simulation using VPI software for verification.

2. Design and Development of a proposed system which includes a DE2 board a soft-core NIOS II processor that can achieve the required biasing method.


What was done this year?

3. To test the proposed optimisation method using the developed system with the required RF signalling and Optical Power and Spectral Monitoring Devices.


Self-Adjusting Optical Serrodyne Loop Frequency Shifter

Biasing Methods Study

• As mentioned, a number of different biasing methods were researched. One low cost method was found that achieved biasing for a IQ DQPSK Modulator used to modulated QPSK Data.

24th October 2012 9


Biasing Technique

• “Asymmetric dithering technique for bias condition

monitoring in optical QPSK modulator”[1].

24th October 2012 10

Biasing technique uses two asymmetric

orthogonal low frequency sin wave dither signals with DC offset Voltage Controls at the three DQPSK Bias Points.


Biasing Technique


Using the two dither signals, biasing of Points A and B could be achieved by monitoring the output power of the dither signals frequency. The third bias Point C could be biased by monitoring twice the dither signals frequency (2nd order harmonic.

“These two biases (A and B) are easily monitored by using a first-

order lock in amplifier, because the optical power of the QPSK signal

strongly depends on BIAS1 (A) and BIAS2(B).”[1]

“Accordingly, cos(φ3) (Bias Point C) can be detected by the second-order lock-in Amplifier and Optical Power

Monitor.”[1]

Simulation

1. VPI Design of the DQPSK Modulator

2. Simulation of the DQPSK Modulator Under different DC Biasing Conditions using a TCL Script.


Simulation Results



Peak-to-Peak Amplitudes from Simulation


-0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.50

1

2

3

4

5

6x 10

-6

Bias Voltage Drift Amount from Optimised Value

Ave

rage

Opt

ical

Out

put

Pow

er (

W)

Bias Dithering Sweep Characterstics for Points A,B and C

Converting the previous slides Simulation Waveforms into Peak-to-Peak Amplitudes Results. Thus Finding the Minimum Output Power for each point A, B and C Results in finding the Optimised Bias.

Proposed System Design


NIOS II Soft-Core Processor.

-Floating Point ALU

-Digital Band-pass Filtering

-DAC Voltage Offset Control

-Bias Control AlgorithmDAC C

0-1.3V

WM8731 16-Bit ADC with 32 kHz Sampling

DAC A 0-1.3V

DAC B 0-1.3V

Verilog HDL

Quadrature Dither Signal

Generators

Verilog HDL 4096 by 16 bit

RAM, Sampling

Buffer

The Input into the ADC for the project was an Optical Multimeter. This Optical Multimeter has

an Optical Power Meter with a bandwidth of 4kHz and an Output voltage range of 0 to 2V.


Complete System Overview


Results Vs Simulation


0 50 100 150 200 250 300 350 4000

100

200

300

400

500

600

700

DAC A Electrode 10-bit Value

Pea

k-T

o-P

eak

Ave

rage

Pow

er

Dither Sweeps of Voltage Point A,B and C with Optical Power Monitoring of the first Harmonic (Dither Signal Frequency) for points A and B and Optical Power Monitoring of the second Harmonic (twice the dither Frequency) for Point C.

0 50 100 150 200 250 300 350 4000

100

200

300

400

500

600

700

800

DAC B Electrode 10-bit Value

Pea

k-T

o-P

eak

Ave

rage

Pow

er

0 50 100 150 200 250 300 350 4000

100

200

300

400

500

600

700

800

900

1000

DAC C Electrode 10-bit Value

Pea

k-T

o-P

eak

Ave

rage

Pow

er

Bias A Bias B Bias C


Self Biasing Algorithm

1. On Start-up Bias Voltage Optimiser for Points A, B, C by finding minimum peak-to-peak positions over large range of DAC values.

2. Bias Voltage Optimiser with smaller range around previously found optimised Values.

3. After Optimised Bias Values are found, dither signals are turned off and DC values Set.

4. If Optimisation is required later because of DC drift at the bias points only a push of a button is needed.



Manual Tuning Requirements

• While the DC bias Tuning works, self tuning the of quadrature RF delay line is required; however find the DC optimised Values reduced the amount of time to tune the DQPSK Modulator Significantly.



Results with NO RF

For bias Voltage Optimisation to be successful, if the RF is off, the output power of the DQPSK modulator should be minimised, as both the top and bottom DQPSK arms cancel themselves Out.



RF off Before Bias Optimisation.


193.085 193.09 193.095 193.1 193.105 193.11 193.115-70

-60

-50

-40

-30

-20

-10Output Spectrum before Biasing with RF OFF

Optical Frequency [THz]

DQ

PS

K O

utpu

t P

ower

Spe

ctru

m [

dBm

]

Laser Centre Frequency

Output Spectrum


RF Off After Bias Optimisation


193.085 193.09 193.095 193.1 193.105 193.11 193.115-70

-60

-50

-40

-30

-20

-10Output Spectrum After Optimisation with RF OFF


DQ

PS

K O

utpu

t P

ower

Spe

ctru

m [

dBm

]


Output Spectrum


Results With RF ON

For Bias Voltage Optimisation to be successful with the RF turned On, a single side band optical frequency shift should be achieved while minimising the laser’s original frequency and also the other harmonics.



Results With RF ON before Optimisation


193.085 193.09 193.095 193.1 193.105 193.11 193.115-70

-60

-50

-40

-30

-20

-10Output Spectrum without Biasing with RF ON


DQ

PS

K O

utpu

t P

ower

Spe

ctru

m [

dBm

]


Output Spectrum


Results with RF ON After Optimisation Before RF Delay Line is Tuned


193.085 193.09 193.095 193.1 193.105 193.11 193.115-70

-60

-50

-40

-30

-20

-10Optimised DC biasing with RF before RF Delay Line is Optimised


DQ

PS

K O

utpu

t P

ower

Spe

ctru

m [

dBm

]


Output Spectrum


Results with RF ON After Optimisation After RF Delay Line is Tuned


193.085 193.09 193.095 193.1 193.105 193.11 193.115-70

-60

-50

-40

-30

-20

-10Optimised DC biasing with RF after RF Delay Line is Optimised


DQ

PS

K O

utpu

t P

ower

Spe

ctru

m [

dBm

]


Output Spectrum


Further Results After 1 Hour of Bias Optimisation

As mentioned, due to DC drift Voltages which move the bias voltages away from the optimised position, Self-Adjustment or tuning is required Over time.



Further Results After 1 Hour before Bias Optimisation


193.085 193.09 193.095 193.1 193.105 193.11 193.115-70

-60

-50

-40

-30

-20

-10Output Spectrum After 1 Hour before Optimisation


DQ

PS

K O

utpu

t P

ower

Spe

ctru

m [

dBm

]


Output Spectrum


Further Results After 1 Hour After Bias Optimisation


193.085 193.09 193.095 193.1 193.105 193.11 193.115-70

-60

-50

-40

-30

-20

-10Output Spectrum After 1 Hour after Optimisation


DQ

PS

K O

utpu

t P

ower

Spe

ctru

m [

dBm

]


Output Spectrum


Conclusion

Results and Simulation both agree and the self-Adjustment DQPSK Bias system work at achieving a single Optical Frequency Shift.

However further testing is required when the Serrodyne Loop is active.



Future Improvements

The designed System’s DAC’s only have 10-bit resolution. To achieve finer tuning DAC’s with higher resolution would be required.

The Optical Power Multimeter Device has a different resolutions and a small bandwidth. An Optical Photodiode Low Frequency Monitor may again achieve a finer tuning accuracy.



References [1] H. Kawakami, E. Yoshida, and Y. Miyamoto, “Asymmetric dithering

technique for bias condition monitoring in optical QPSK modulator,”Electron. Lett., vol. 46, no. 6, pp. 430–431, Mar. 2010.
