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Incremental Delay Change Victim Aggressor
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Incremental Delay Change due to Crosstalk Noise
Lauren Hui Chen
Division of Physical AnalysisAvant! Corporation Fremont, CaliforniaUSA
Malgorzata Marek-Sadowska
Department of Electrical and Computer EngineeringUniversity of California Santa Barbara, California USA
Incremental Delay Change
ddV
ddV5.0
tV1
Victim
Incremental Delay Change
ddV
ddV5.0
tV1
Victim
tV2
Aggressor
peakH peakH
DT
peakt
Incremental Delay Change
ddpeakpeak VtVH 5.01
DTMax
peaktddV
ddV5.0
tV1
tV2
Aggressor
Victim
tV3
Agg.
Vic.
Agg.
Vic.
Temporal Correlation
Under-estimation
Over-estimation
Reality -- Skewed Overlap Existing Method -- Overlap
with skewed-overlap
without skewed-overlap with overlap
with overlap
Temporal Correlation v.s. Incremental Delay Change
Tp
T1 T2
Vp
Ta
Tr
Tm Ta+Tr
Vdd
dd
prdd
dd
prmp V
VTTT
VV
TTT Maximum delay change
dd
prmpm VV
TTTTT 2Intersect with right edge
11 TVV
TTTTVV
TTdd
prmp
dd
prm Intersect with left edge
New Temporal Correlation
tAL tAR
tVL tVR ARVLALVRVA ttttiftt
ddjpraVL
jaVL
jp
jAL
jraVL VVTttTttMaxttTTtt 010020 ,1
ddjpraVR
jaVR
jp
jAL
jraVR VVTttTttMaxttTTtt 010020 ,1
ddjpraVL
jaVL
jp
jAR
jraVL VVTttTttMaxttTTtt 010020 ,1
ddjpraVR
jaVR
jp
jAR
jraVR VVTttTttMaxttTTtt 010020 ,1
New Old
Model Validation
Norminal noise: VoxNorminaldelay: Vov
Change ofDelay: Td
ParameterVp
(volt)Tp
(ps)T1
(ps)T2
(ps)Ta
(ps)Tr
(ps) Sim. Ours
Error(%)
AverageError(%)
Circuit 1 0.65 151 118 142 69 196 44 48 9% 11%
Circuit 2 0.85 220 114 146 48 206 59 66 12% 13%
Circuit 3 0.72 110 147 107 77 181 14 16 14% 17%
Circuit 4 1.08 290 97 131 83 275 122 133 9% 14%