Key Tool: SimulationExperiments are often conducted using
discrete event simulationPrototyping is typically not an
optionAccurate simulators are large, intricate programs that run
for long time durationsImportant decision: Choice
ofSimulatorSimulation methodology
Key Publication VenuesISCA: ACM/IEEE International Symposium on
Computer Architecture (Jun)HPCA: IEEE International Symposium on
High Performance Computer Architecture (Feb)MICRO: IEEE
International Conference on Microarchitecture (Dec)ASPLOS (Mar),
PACT (Sep)
Current Research Areas
Paper Sessions at ISCA 2010 Energy Efficiency Caches Emerging
Technologies and Interconnect Memory Subsystems Productivity and
Debugging Acceleration Architecture Threading Simulation
Technologies and Real System Evaluation Cluster and Data Center
Security Multi-Core Reliability and Fault-tolerance Translation
Caching: Skip, Don't Walk (the Page Table)High Performance Cache
Replacement Using Re-Reference Interval Prediction (RRIP)The
Virtual Write Queue: Coordinating DRAM and Last-Level Cache
PoliciesReducing Cache Power with Low-Cost, Multi-Bit Error
Correcting Codes
Current Research AreasMemoryHierarchyTechnologyConsistency
Current Research AreasMemoryPrediction, Speculation,
PrefetchingPower efficiencyMulticore architecture
Current Research AreasMemoryPrediction, Speculation,
PrefetchingPower efficiencyMulticore architectureMemory
hierarchyInterconnectCore designTransactional memory
One Writing GuidelineEvery sentence should follow froma
preceding sentencean experimental observationa reported result from
a cited publicationit is believed that, we think that, this is
probably due to
