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MODEL FOR SOFTWARE POWER ESTIMATION OF AN 8-BIT MICROCONTROLLER

Rãzvan Dochia1,2, Daniela Bogdan2, Corneliu Burileanu2

1Microchip Technology, Bucharest, Romania

2University “Politehnica” of Bucharest, Romania E-mail: razvan.dochia@microchip.com

Abstract–Over the last years, power has became a primary consideration in hardware design, and it is critical in computer systems especially for portable devices where the batteries should last long before they need to be replaced or recharged. Starting from this consideration the paper presents a model for estimation of power consumption of an 8-bit microcontroller early in the design cycle of embedded software. The tool analyses the assembly code being executed and provides an estimate of its average power consumption. Keywords: power characterization, power estimation, instruction set characterization, microcontroller simulator

1. INTRODUCTION

In the design of the embedded applications, power consumption is becoming increasingly important. A mobile terminal is typically powered by batteries, which are a limited source of energy. For a portable device to be useful, it must have a reasonable amount of run time before the batteries run out and need to be changed or recharged. These real-time applications are power critical that requires the development of low power software and hardware. Most of the effort in power minimization and optimization has been oriented towards hardware and processor architectures [1, 2]. Nevertheless, due to the growing complexity of instruction-set architecture and the size of embedded software, it is becoming very important that power consumed by software programs running in embedded applications to be estimated. In microprocessor, microcontroller, and digital signal processor based systems, it is the software that directs much of the activity of the hardware. Consequently, the software can have a substantial impact on the power dissipation of the system and needs to be evaluated. In order to determine and analyze the impact of software in overall energy consumption, it is critical to understand and

profile the energy consumption at the instruction level.

In the 1990s, Tiwari et al [3] introduced a methodology for software power estimation at instruction level based on physical measurements. It is based on an empirical method for characterizing the power dissipation of short instruction sequences and for using these results to estimate the power/energy dissipation of a program. This methodology can be split into two parts: the characterization step and the estimation step. As can be seen from Figure 1, in the characterization step, several programs are loaded into the microcontroller. Using these so-called test benches the microcontroller is brought into certain states. In order for this method to be successful, it is important to select correctly the instruction sequences for characterization. As a minimum, it is necessary to determine the base cost of individual instructions. The base cost of an instruction may be thought of as the cost associated with the basic processing action needed to execute the instruction. Executing programs containing a loop of several instances of the given instruction will determine the instruction base cost. Power and energy estimates for the instruction are calculated from the average current draw, the supply voltage, and the number of execution cycles per instruction. Given an instruction sequence, using only the base costs of the individual instructions to model the cost of the sequence tends to underestimate the cost. This is so, because costs do not account the effect of the change in circuit state when two different instructions are executed consecutively. These costs are referred to as circuit state effects and they need to be also measured. Afterward, these cost factors are stored into an energy/power database.

978-1-61284-172-4/11/$26.00 © 2011 IEEE

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Fig. 1. Microcontroller characterization and power estimation overview.

In the power estimation step, each instruction

of the program under test is executed on a virtual processor/microcontroller. This instruction set simulator reproduces the behavior of the real processor/microcontroller and can estimate a cycle-accurate power profile of the executed software.

Other works that have the same starting point of using instruction-level power analysis for estimating the power consumption are presented in [4,5]. The system considered in these models is generally composed of components of traditional CPUs, e.g. memory, cache, data and control path. Only few works focus on modeling a complete platform. Among them is the simulator presented in [6] which is based on Simunic et.al [7] model for the StrongARM SA110 energy characterization. One drawback of this simulator is that it characterizes poorly the peripherals. A complete system power simulator that is based on SimOS infrastructure and models the CPU, memory hierarchy and a low-power disk subsystem, but also without peripherals, is SoftWatt simulator presented in [8].

2. MODEL CONSTRUCTION BASES

We present in this section our methodology to build complete platform models.

Equation 1 from [4] concisely describes how the instruction level power measurements can be used to estimate a program’s energy dissipation:.

∑ ∑ ∑++=i ji k

kjijiiiP ExNOxNBE,

,, )()( (1)

Ep is the overall energy cost of a program, decomposed into base costs, circuit state overhead and stalls and cache misses. The first summation represents base costs, where Bi is the base cost of an instruction of type i and Ni is the number of type i instructions in the execution profile of a program. The second summation represents circuit state effects where Oi,j is the cost incurred when an instruction of type i is followed by an instruction of type j. Ni,j is the number of occurrences where instruction type i is immediately followed by instruction type j. The last sum accounts for the other effects such as stalls and cache misses. Each Ek represents the costs of one such effect found in the program execution profile.

Starting from equation (1), we modified it to incorporate the effect of peripherals and to eliminate other effects like cache misses or stalls that are not present in an 8-bit microcontroller. The equation that describes how our model is estimating power consumption is given in (2):

∑ ∑ ∑++=i ji k

phjijiiiP kExNOxNBE

,,, )()( (2)

where Eph represents the cost of each peripheral that is turn on.

3. MODEL CONSTRUCTION CASE STUDY

The methodology described in this section was applied on a development board with an 8-bit microcontroller with the enhanced mid-range core from Microchip. The microcontroller chosen was PIC16F1933 because it is rich in peripherals and has a low pin count. On this development board we made all the measurements used for the calibration and also for the validation step. The measurement setup included one power supply and in series a multimeter. In depth description on the measurement setup and results is presented in [9].

To check the accuracy of the model proposed by us, comparisons between the consumption

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estimation of the model and physical measurements on the real platform were done. The applications chosen for this model validation were: a program that calculates the average of 256 numbers of 8-bit long and a program that multiplies two 16-bit numbers.

Results of model estimations and physical measurements are presented in Table 1 and Table 2. All the presented results were run at 3.3V and had constant data written in the data memory of the microcontroller. For Table 2 the Timer0 peripheral is enabled and was configured with the minimum prescaler.

Table 1. Simulator results – without peripherals

Benchmark Frequency [kHz]

Measured value [mW]

Simulated value [mW]

Error [%]

average 31.25 0.50 0.50 1.20

average 62.5 0.50 0.51 0.82

average 125 0.52 0.52 0.52

average 250 0.54 0.54 0

average 500 0.59 0.59 0.36

average 1000 1.31 1.30 0.83

average 2000 1.52 1.50 1.67

average 4000 1.95 1.89 3.03

average 8000 2.79 2.67 4.27

average 16000 4.34 4.0 5.78

mult_16x16 31.25 0.49 0.50 1.47

mult_16x16 62.5 0.50 0.51 1.28

mult_16x16 125 0.51 0.52 1.33

mult_16x16 250 0.54 0.54 0.86

mult_16x16 500 0.59 0.59 0.11

mult_16x16 1000 1.31 1.31 0.29

mult_16x16 2000 1.52 1.51 1.02

mult_16x16 4000 1.96 1.92 2.01

mult_16x16 8000 2.81 2.72 3.24

mult_16x16 16000 4.38 4.17 4.87

These results show that the propose model can

achieve a maximum 8% percent error for all the configurations. We think that this error rate is acceptable and that a similar model can be implemented in commercial compiler, which will help the application engineer, obtain power aware software.

Table 2. Simulator results – with peripherals

Benchmark Frequency[kHz]

Measured value [mW]

Simulated value [mW]

Error [%]

average 31.25 0.60 0.60 0.19

average 62.5 0.60 0.60 0.62

average 125 0.61 0.61 0.18

average 250 0.63 0.64 1.45

average 500 0.67 0.69 2.12

average 1000 1.38 1.41 2.25

average 2000 1.55 1.60 3.27

average 4000 1.88 2.00 6.53

average 8000 2.54 2.72 7.36

average 16000 3.89 4.14 6.28

mult_16x16 31.25 0.60 0.60 0.35

mult_16x16 62.5 0.61 0.61 0.79

mult_16x16 125 0.61 0.62 1.11

mult_16x16 250 0.64 0.64 0.89

mult_16x16 500 0.71 0.69 1.6

mult_16x16 1000 1.39 1.42 1.81

mult_16x16 2000 1.68 1.63 3.17

mult_16x16 4000 2.11 2.04 3.29

mult_16x16 8000 2.70 2.86 5.36

mult_16x16 16000 4.13 4.35 4.78

4. CONCLUSIONS

In this paper we have presented an energy consumption model for an embedded system starting from the model presented by Tiwari et. al [4]. This model can be built from external measurements and benchmarks and it takes into account both the power consumed by the core and also the peripherals. It is based on instruction level power analysis and includes estimation for the core and the peripherals for an 8-bit microcontroller. The average error of the methodology presented is less then 8%, which is acceptable compared to its simplicity and its fast running time. The accuracy and the rapidity of the model makes it a valuable asset for the application engineers in the process of selecting the best power aware algorithm because the model provides a reliable indication about the power consumed in different algorithm optimizations.

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Future works include the development of new power models for other common used peripherals found in an microcontroller. Another direction is the integration in the simulator of other features of the microcontroller that currently aren’t available in the model like seft-writes and program – data memory interaction.

Acknowledgement–The work has been funded by the Sectoral Operational Programme Human Resources Development 2007-2013 of the Romanian Ministry of Labour, Family and Social Protection through the Financial Agreements POSDRU/6/1.5/S/16 and POSDRU/6/1.5/S/19.

References

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[7] T. Simunic, L. Benini, G. De Micheli, “Cycle-accurate simulation of energy consumption in embedded systems”, The 36th Design Automation Conference, pp. 867-872, USA , 1999.

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