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November 27, 2009 Copyright 2009 Stuart L. Riley 1 How to Estimate the Number of Die Escapes Using In-Line Defect Data Stuart L. Riley [email protected] Member American Society for Quality

How To Estimate The Number Of Die Escapes Using In Line Defect Data

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Page 1: How To Estimate The Number Of Die Escapes Using In Line Defect Data

November 27, 2009 Copyright 2009 Stuart L. Riley 1

How to Estimate the Number of Die EscapesUsing In-Line Defect Data

Stuart L. [email protected]

Member American Society for Quality

Page 2: How To Estimate The Number Of Die Escapes Using In Line Defect Data

November 27, 2009 Copyright 2009 Stuart L. Riley 2

Copyright Statement

Copyright 2009, Stuart L. Riley

Rights reserved.

This document may be downloaded for personal use; users are forbidden to reproduce, republish, redistribute, or resell any materials from this document in either machine-readable form or any other form without permission from Stuart L. Riley or payment of the appropriate royalty for reuse.

Email: [email protected]

Page 3: How To Estimate The Number Of Die Escapes Using In Line Defect Data

November 27, 2009 Copyright 2009 Stuart L. Riley 3

Terms

• Die – the unit product purchased and shipped to the customer• Escapes – number of failing die that were missed at test and sent to the customer• Test coverage

– Fraction of die, or specific die areas that are tested to detect fails– The smaller the test coverage, the higher the risk of escapes

• Anomalies – anything detected by inspection (as seen on a wafer map)– Inspection tool noise – false positives– Cosmetic anomalies

• Color, grain, etc. from normal process variation• No negative effect on yield

– Defects• Abnormal and potentially harmful• Particle or process-related• Separate from other anomalies using classification (categorization)

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November 27, 2009 Copyright 2009 Stuart L. Riley 4

Definition of EscapesIf test coverage = 100%, the probability of capturing a failed die is: PT = 1

Test acts like a “fire wall” to prevent failing die going to the customer (escapes).

Yield = Y

If test coverage is < 100%, PT < 1

There are holes in the fire wall.

Some failing die escape test and are shipped to the customer.

Yield = Y’In-line data estimates fail potential of defects, assuming 100% coverage.

Escape

Escape

' TY Y P= × If PT < 1, then the true yield may be approximated by multiplying Y’ by PT.

Caught

Caught

All fails caught

Page 5: How To Estimate The Number Of Die Escapes Using In Line Defect Data

November 27, 2009 Copyright 2009 Stuart L. Riley 5

Goal

• Find number of escapes using– In-line inspection data– The probability defects will harm specific structures on the die– Some knowledge of the die layout– A known percentage of the die that is testable (test coverage)

• Apply knowledge of escapes to– Perform risk management to determine acceptable levels to ship product

during excursions– Decide where to focus efforts to address levels that may significantly

contribute unacceptable levels of escapes– Determine ROI to address test coverage issues

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November 27, 2009 Copyright 2009 Stuart L. Riley 6

Benefits

• Risk analysis• Compare excursions to baseline ship / no ship decisions• Cost benefit of improving process, or test coverage, or both• Get a running estimate of escapes at any given time, using in-line

data as it’s collected

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November 27, 2009 Copyright 2009 Stuart L. Riley 7

Assume Random Anomaly Distribution Within Die

• Graphical composites of die maps (die stack) may show a tendencyfor anomalies to appear in specific regions– This may be inspector-induced– The inspection tool may have a tendency to detect certain anomalies better in

some regions vs. other regions• An exception to this assumption can be made only if there is a

physical reason why anomalies can be distributed non-randomly within the die – there must be a reason.

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November 27, 2009 Copyright 2009 Stuart L. Riley 8

Steps

• Determine area of die to be considered– Can be entire die, or specific die areas

• Define defect kill ratios based on – Classification data (may change from wafer-wafer / lot-lot)– Estimated defect size data (do not use inspection size data)– Ratio of critical dimensions to circuit area– Educated guess from key engineers– Combination of any of the 3 methods – whatever makes the most sense

• Estimate the average number of faults, applied to the average number anomalies in the die areas, with the estimated kill ratios

• Apply test coverage (% of die, or % of die area that can be tested) to find the average number of escapes per die

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November 27, 2009 Copyright 2009 Stuart L. Riley 9

Steps

• Find the probability of escapes, using a probability density function (Poisson distribution)

• Apply this probability to the number of die with anomalies to find the number of failing die that can escape test

• Since distributions are mixed (mix of random and clustered distributions)– We must separate die into 2 groups – random die and clustered die– Find the average number of random anomalies per random die– Find the average number of clustered anomalies per clustered die– Find the number of failing die in each group that can escape test– Combine the 2 groups to get the overall number of failing die that can escape

test

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November 27, 2009 Copyright 2009 Stuart L. Riley 10

Steps

( ) ( )Ff A P A d= ×

AAreaP

Die Area=

Die area of interest (A), may be one area, a combination of different areas, or the entire die area. The fraction of this area to the die area can be expressed as a probability, PA. This is the probability a random defect can fall in this area within the die. If the entire die area is to be used, PA = 1.

( )F A AP A P K= ×

The probability of finding a fail for an area of the die can be expressed as the product of the probability of finding a defect in the area, and the kill ratio for the expected defect types in the area. (Note – this expression is equivalent to the definition of “critical area”.)

If there are N regions in the die, PF(A) can be expressed as the sum of [PF(A)]i for each ithregion:

( ) ( )1

N

F F ii

P A P A=

⎡ ⎤= ⎣ ⎦∑

See slide – “Example: Calculate Fractional Die Area”

The estimated average number of faults can be found by multiplying the probability of finding a fail in a die area by the average number of anomalies in the die, d:

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November 27, 2009 Copyright 2009 Stuart L. Riley 11

Steps

( )( )1

M

i ii

A

p A nK

N=

×=∑

If you have classified defect data, the kill ratio for the region can be expressed as a weighted average: The sum of the count for each defect type (ni), multiplied by the probability of fail for that type in the region (pi(A)), for M groups, divided by the total defects classified (N).

If you don’t have classified defect data, but you do have some idea (or even a good educated guess) about critical size ranges for your defect(s) of interest, you can approximate a size-based kill ratio.

Amin max

Total

NKN

−=

For either method, we’ll still use the notation, KA for the kill ratio.

The min – max range of defect sizes may be different for each area of interest.

Pi(A) will usually be determined based on engineering judgment.

See slides – “Example: Classification / Kill Ratios by Area”

See slide – “Example: Calculate Size Ranges”

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November 27, 2009 Copyright 2009 Stuart L. Riley 12

Steps

( ) ( ){ }11 Tf A PescP e− × −= −

esc escD P D= ×

0 1TP≤ ≤So the average number of escapes per die can be expressed as the product of the average number of faults and the probability of fails not being caught at test:

( ) ( ) ( ), 1esc T Tf A P f A P= × −

Express the fraction of test coverage as a probability of catching a fail at test: PT.

But, we still need to express this in terms of die (unit product shipped to the customer) that can escape being found to fail at test. We can do this by first using the Poisson distribution function* to find the probability die will escape capture at test:

Sanity check: As test coverage approaches 100%:PT approaches 1, the exponent term approaches 0and Pesc approaches 0.> No die will escape 100% test coverage. <

So the number of failing die that can escape test is:

* - The Poisson dist function can only be applied to random distributions. For mixed distributions (mix of random and clustered anomalies) we need to separate die into random and clustered groups.

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November 27, 2009 Copyright 2009 Stuart L. Riley 13

Steps: Separate Random and Clustered Die

( ) [ ]1

N

r A r A rii

f A P K d−=

= × ×∑( ) [ ] ( ) [ ]

1 1

N N

c A c A c r A r A ri ii i

f A P K d d P K d− −= =

⎧ ⎫ ⎛ ⎞= × × − + × ×⎨ ⎬ ⎜ ⎟⎩ ⎭ ⎝ ⎠∑ ∑

( ) ( ){ }11 c Tf A Pc escP e− × −− = −

Because wafers usually have mixed-distributions of anomalies (cluster and random), we need to separate each distribution to find the average number of anomalies for each, and combine the results at the end.

Random Cluster

Total number of die that can escape:

See slide – “Example: Die-Based Clustering”

( ) ( ){ }11 r Tf A Pr escP e− × −− = −

r esc r esc rD P D− −= × c esc c esc cD P D− −= ×

esc r esc c escD D D− −= +

Avg num fails that can escape capture at test. Note – kill ratios may be different for random and clustered defects.

Probability of escape

Number of die that can escape

Number of random die Number of clustered die

rr

r

ndD

= cc

c

ndD

=

dr and dc are the avg number of defects per random and clustered group.nr and nc are the number of defects per group.Dr and Dc are the number of die per group.

( ) [ ]1

N

c A c A cii

f A P K d−=

= × ×∑or If Kc-a = Kr-a

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November 27, 2009 Copyright 2009 Stuart L. Riley 14

Example 1: Use Classification Data From slide – “Example: Calculate Fractional Die Area”

1 0.27AreaP = 2 0.07AreaP =

1 0.17AreaK = 2 0.33AreaK =From slides – “Classification / Kill Ratios by Area”

( ) ( )( ) 0.27 0.17 0.07 0.33 0.07FP A = × + × =

29rd = 167cd =From slide – “Example: Die-Based Clustering”

( ) 0.07 29 2.00rf A = × = ( ) 0.07 167 11.52cf A = × =

{ }11.52 0.051 0.438c escP e− ×− = − =

Random Cluster

Total number of die that can escape:

{ }2 0.051 0.095r escP e− ×− = − =

0.095 17 1.62r escD − = × = 0.438 3 1.31c escD − = × =

1.62 1.31 2.93escD = + =

Test coverage = 95%

17rD = 3cD = 100 die on the wafer

Wafer has 100 die Pct escaped die = 2.9%

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November 27, 2009 Copyright 2009 Stuart L. Riley 15

Example 2: Use Estimated Size Data From slide – “Example: Calculate Fractional Die Area”

1 0.27AreaP = 2 0.07AreaP =

1 0.25AreaK = 2 0.30AreaK =From slides – “Calculate Size Ranges”

( ) ( )( ) 0.27 0.25 0.07 0.30 0.09FP A = × + × =

29rd = 167cd =From slide – “Example: Die-Based Clustering”

( ) 0.09 29 2.57rf A = × = ( ) 0.09 167 14.78cf A = × =

{ }14.78 0.051 0.522c escP e− ×− = − =

Random Cluster

Total number of die that can escape:

{ }2.57 0.051 0.120r escP e− ×− = − =

0.120 3 2.05r escD − = × = 0.522 12 1.57c escD − = × =

0.120 1.57 3.61escD = + =

Test coverage = 95%

17rD = 3cD = 100 die on the wafer

Wafer has 100 die Pct escaped die = 3.6%

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November 27, 2009 Copyright 2009 Stuart L. Riley 16

Example 3: Estimate Escapes Using DLY Data

“Baseline” range for escapes: < 20

(see next slide)

Excursion range for escapes

Set test coverage at 95%. ( ) ( ) ( ), 1esc T Tf A P f A P= × −

f(A) can be extracted from DLY data.

( )( ) lnf A DLY=

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November 27, 2009 Copyright 2009 Stuart L. Riley 17

Example 3: Frequency of Escape Ranges From DLY Data

Excursions

> 100

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November 27, 2009 Copyright 2009 Stuart L. Riley 18

Summary

• It is important to know the level of failing die escapes to properly manage risk of shipping product to customers– Know where to focus efforts to address issues– Know if to ship or scrap product during excursions

• We have explored several ways to estimate the number of failing die escapes using in-line inspection data based on– Classification data– Defect size estimates– Defect-limited yield data

• These procedures, along with applied examples, should provide you with the methods to properly estimate ppm escapes

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November 27, 2009 Copyright 2009 Stuart L. Riley 19

Appendix

Appendix

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November 27, 2009 Copyright 2009 Stuart L. Riley 20

Example: Calculate Fractional Die Area

11

2Area

AreaPDie Area×

=

• Assume distribution is random within the die • Find ratio of sum of key areas to scan area• Sum the key areas & divide by the scan area

Area 1

Area 1

Area 2

Area 2

Die Area = total area of blue square

Example:Die area = 30 cm2

Area 1 = 4 cm2

Area 2 = 1 cm2

( )1

2 4 8 0.2730 30AreaP×

= = =

22

2Area

AreaPDie Area×

=

( )2

2 1 2 0.0730 30AreaP×

= = =

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November 27, 2009 Copyright 2009 Stuart L. Riley 21

Example: Classification / Kill Ratios by AreaA sub-set of anomalies on the wafer are selected for classification.Examples of defects as seen during classification.Some obviously impact the product, others aren’t as obvious.So defects have a probability of affecting the die circuits.

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November 27, 2009 Copyright 2009 Stuart L. Riley 22

Example: Classification / Kill Ratios by Area

• Same “defects” / same distribution – only circuit layout is different• Array 2 should be more sensitive to defects• Classification captures differences in sensitivities by defect type (kill ratios)• Note how the size of defects can also affect the circuit in different ways

Area 1 Area 2

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November 27, 2009 Copyright 2009 Stuart L. Riley 23

Example: Classification / Kill Ratios by Area

( )1

7.5 9.5 17 0.17100 100AreaK+

= = =

• The weighted kill ratio (overall probability of failure) of defects on array 1 is about ½that of array 2.

• It just so happens that array 1 has about ½ the number of line/space pairs in the same area as array 2.

• The differences in kill ratios = the difference in critical areas.• So, armed with just inspection data, a reasonable definition of defect groupings,

and consistent application of assumed defect kill ratios, we can capture differences in circuit layout, just like critical area analysis.

( )2

15.5 17 32.5 0.33100 100AreaK+

= = =

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November 27, 2009 Copyright 2009 Stuart L. Riley 24

Example: Classification / Kill Ratios by AreaClassification Groupings Area 1 Area 2

Type Affect Estimated Kill Ratio Count Fault

Count Count Fault Count

Shorts 1 2 2 12 12

Extensions 0.5 11 5.5 7 3.5

On Line 0 6 0 1 0 Between

Lines 0 1 0 0 0 Circles

Total Circular Group

-- 20 7.5 20 15.5

Shorts 1 3 3 14 14

Extensions 0.5 13 6.5 6 3

On Line 0 3 0 0 0 Between

Lines 0 1 0 0 0 Squares

Total Square Group

-- 20 9.5 20 17

• Each defect type (group) has an assigned kill ratio.• Multiply the count of each type by the kill ratio to find the fault count.• We can see that the same distributions applied to 2 different circuit layouts have

different fault counts, due entirely to the layout differences

Assume 100 anomalies are classified.

Of this, 2 defect types are critical.

We’ll call them “circles” and “squares” to match the diagram on the previous page.

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November 27, 2009 Copyright 2009 Stuart L. Riley 25

Example: Calculate Size Ranges

X-1.5

Let critical size range of key defects for Area 1 be in the range 0.4 to 4, and Area 2 be in the range 0.2 to 4. The differences in size ranges are due to differences in circuit layouts in the areas. Defects in this size range can cause a fault, depending where they fall on the circuit.

The upper limit to the range can be determined from basic knowledge of defects typically seen.

Total area under the curve = 73 (Note – the range on the overall curve can also be bounded)Total area under the size range 0.4 to 4 (Area 1) = 19Total area under the size range 0.2 to 4 (Area 2) = 22

The ratio of the 2 areas is the probability the total population will fall within the critical size range.

Area222 0.3073

K = =Area119 0.2573

K = =

size range 0.4 to 4 size range 0.2 to 4

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Example: Die-Based ClusteringIdentify die containing significantly more anomalies, compared to the rest of the die with anomalies. (clusters)

Find the average number of anomalies per die for die containing random distributions (dr).

Find the average number of anomalies per die for die containing clusters (dc).

Clustered die

Note: All wafer maps were produced using the “KlarfView” application, which can be found at: http://www.valaddsoft.com/

Clustering was defined using the “DBCluster” application.

Dark spots: anomalies in clustered die

Example: Consider a wafer with 1000 anomalies, 100 die, 20 die with anomalies, 3 die contain 500 anomalies, and 17 die with 500 anomalies.

500 2917rd = =

500 1673cd = =