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HICUM model overview
HICUM model overview
M. Schröter1,2, A. Mukherjee1, A. Pawlak1, Y. Zimmermann1 1Chair for Electron Devices and Integr. Circuits, TU Dresden, Germany
2ECE Dept. UC San Diego, La Jolla, CA, USA
2012 HICUM Workshop
Newport Beach, CA 92026
© MS 1
HICUM model overview
OUTLINE
1 Introduction
2 SiGe HBT modeling overview
3 HICUM basicsParameter extraction
4 Geometry scaling
5 Parameter extraction
6 Applications
7 Conclusions
© MS 2
HICUM model overview Introduction
Introduction
• Silicon-based bipolar transistor technology (incl. SiGe HBTs, BiCMOS) enjoys wide-spread use throughout industry
• Latest SiGe HBT development shows clear advantages of HBT over MOSFET for HF applications, especially for coming mm- and submm-wave markets
• Cost efficient circuit design requires accurate and numerically stable compact mod-els in production PDKs
• existing Si-based BJT/HBT technologies’ performance spans from fT = 10...300 GHz, BVCEO from 1.5 ...30V, fTmax = 10...500 GHz,
=> Goals of this presentation: • overview on SiGe HBT compact modeling approaches => why HICUM
• HICUM basics in a nutshell
• application examples in production and prototyping technologies
© MS 3
HICUM model overview SiGe HBT modeling overview
SiGe HBT modeling overviewGoal: Unified compact HBT model (incl. model hierarchy)
process development
circuit design
param. extraction simulatorcompactmodel
• include all physical effects • model parameters without wafers• rapid eval. of process variations • “debugging” of process issues
• EC topology, equations to
• I, Q contin. differentiable• modular, easily extendable
fit in different interfaces• well-defined, fast, reliable• using standard equipment • min. parameter interaction
• accurate, valid over wide range• smooth geom. scaling (for optim.) • computationally fast and reliable • easy to understand
available in all relevant circuit simulators=> numerically stable
production version
standard extraction flow & test structures=> reduced development
effort
⇒ physics-based, geometry scalable, computationally fast model with simple equivalent circuit and fast parameter extraction covering all processes
© MS 4
HICUM model overview SiGe HBT modeling overview
Modeling approaches
Criteria Behavioral, X-par. Physics-basedaccuracy high (within narrow ranges) moderate to high over wide
rangenumerical stability compromised outside fitting
rangeshigh (for standard models)
fabricated devices need every possible layoutused in circuits
only few devices (6 HF trs, 6 test structures)
measurement effort moderate to high moderate to lowpar. extraction effort moderate to low (per device)
very high for librarymoderate to low (per device)very low for library
geometry scaling inconsistent (typically) consistentpredictive capability none moderate to highstatistical modeling none (very high effort) good to excellent
Goal: large variety of applications & circuit optimization (bias, T, f)=> Physics-based model (cuts design cycle, supports process dev.)
© MS 5
HICUM model overview SiGe HBT modeling overview
Existing standard BJT and HBT models• SPICE Gummel-Poon model
• addresses effects present in "70ies" BJT technologies, no HBT effects => subset of HICUM/L0 => to be replaced by HICUM/L0 v1.31
• HICUM/L2, MEXTRAM, VBIC• include some or all SiGe HBT related effects• HICUM [3] includes mm-wave technology related effects in SiGeC HBTs (s. DOTFIVE)
© MS 6
HICUM model overview SiGe HBT modeling overview
Existing standard BJT and HBT models• SPICE Gummel-Poon model
• addresses effects present in "70ies" BJT technologies, no HBT effects => subset of HICUM/L0 => to be replaced by HICUM/L0 v1.31
• HICUM/L2, MEXTRAM, VBIC• include some or all SiGe HBT related effects• HICUM [3] includes mm-wave technology related effects in SiGeC HBTs (s. DOTFIVE)
ijBCx
iBEt
ijSC
iT
RE
B
ijBCi
RCx
E
C
ijBEi
C’
B’
E’
iAVL
CEox
B*
ijBEp
QjCi
iTS
S
CrBi
ΔTj
CthRthP
Csu
Rsu
RBx
S’
eff. internal transistor
T
thermal network
Qr
QjEi Qf
QBCx QdS
QjS
QjEp
,,QBCx,
Rbi*
=> HICUM/L2 v2.3
=> available in 15+ circuit simulators
• physics-based
• large-signal model (charge conservative)
• geometry scalable
• NQS & HF noise correl. adjunct networks not shown here
© MS 7
HICUM model overview HICUM basics
HICUM basicsBuilding a compact model
n+
n+ buried layer
p-
p+
n+ sinker
n-epi
SiO2
SiGe
BC
• Step 1: intrinsic transistor operation• along 1D direction under emitter: mostly
nonlinear physical and electrical effects • quasi-static currents and charges• vertical NQS effects, noise correlation
• Step 2: internal transistor• region under emitter => 2D effects• internal base resistance• emitter perimeter effects
• Step 3: external regions• access regions, structural parasitics
⇒ 3D effects
• Step 4: other effects• temperature dependence• noise in the internal and external region• electro-thermal effects
B
2D and 3D effects ⇒ geometry dependence
© MS 8
HICUM model overview HICUM basics
Transfer current: Generalized ICCR
0.7 0.75 0.8 0.85 0.9 0.9510-3
10-2
10-1
100
101
VB`E` (V)
I T (mA
)
• exact solution of q.s. transport equa-tion over entire 1D transistor region:
• weight factors:
,
• 1D case: hJ = hv = 1
IT c0
VB'E'VT
-----------⎝ ⎠⎛ ⎞ VB'C'
VT-----------⎝ ⎠
⎛ ⎞exp–exp
hg hJ hv pdxxE'
xC'
∫------------------------------------------------------------=
c0 AEqVTμnrnir2=
hgμnrnir
2
μn x( )ni2 x( )
---------------------------= hJJnx x( )IT AE⁄------------------=
hvVB'E' ϕp x( )–
VT-------------------------------⎝ ⎠
⎛ ⎞exp=VBC = 0
rel. error
x device simulationGICCR
- - ideal (classical sol.)
⇒ links charge and current very accurately over wide bias region
© MS 9
HICUM model overview HICUM basics
Visualization of the GICCR
• split transfer current into components:
• hole charge (in emitter, base, collector region)
• depletion charges:
• minority charges:
iT iTf iTr–=
QpT Qp0 hjEiQjEi vB'E'( ) … hfQf iT vB'E',( )+ + +=
QjEi q CjEi v( ) vd0
vB'E'∫=
QjCi q CjCi v( ) vd0
vB'C'∫=
Qf τf i( ) id0
ITf
∫=
Qr τriTr=VB’E’ Q
QpT
hjEiQjEilog(IT) IT(Qp0+hjEiQjEi)
IT(QpT)
ideal
Qp0 0
impact of charges on transfer current (at VB’C’ = 0)
hfQf
log(ICK)
iT c10 vB'E' VT⁄( ) vB'C' VT⁄( )exp–exp
QpT-----------------------------------------------------------------------------=
C, τ aremeasurable
⇒ approach can be extended to 2D/3D case [WCM05]
© MS 10
HICUM model overview HICUM basics
Depletion charges and capacitances [3]
-6 -4 -2 00
0.5
1
1.5
VB`C` (V)
CjC
/CjC
0
VDCx=0.77 zx=1.7779 CPT=0.37 25-Jul-
0 0.2 0.4 0.6 0.8 10
0.5
1
1.5
2
VB`E` (V)
CjE
0/CjE
0
VDEx=0.97 zx=0.24317 Vf=0.9025 25-Jul-200
current dependent equ. existing
x device simulation model equation
- - classical equ.
x device simulation model equation
- - classical equ.
VPT
BC depletion capacitance
VDEi
BE depletion capacitance
model: modification at high bias to avoidpole at VDEi
modification includes punch-througheffect at VPT
classical equation:
CjCj0
1 V VD⁄–( )z------------------------------=
charge
=> accurate over wide bias range
© MS 11
HICUM model overview HICUM basics
Mobile charge and transit time
VC’B’ or VC’E’
τf0
0
Early-effect
BC SCR• transit time is determined from
• analytical description
consists of models for regional components• τB, τBC usually dominate at low to medium cur-
rent densities (ratio varies dep. on coll. profile)
• low current densities: τf0(VB’C’)• Early effect (base region)• BC SCR bias dependence
• high current densities: Δτf(ITf, VB’C’)• BC barrier effect • collector injection zone • emitter component increase
τf dQf dIT⁄ 2πfT( ) 1– ΣCBv( ) gm⁄– τRC–= =
τf ITf VB'C',( ) τf0 VB'C'( ) Δτf ITf VB'C',( )+=
© MS 12
HICUM model overview HICUM basics
Forward mobile charge and transit time low-current component τf0 (IEEE TED, pp. 288-300, 1999)
Early-effect transit time through BC-SCR
VC’B’ or VC’E’
τf0
0
Early-effect
BC SCR
τfB wB2∼ τBC wBC∼
wB
wBC
⇒ both effects are modeled in HICUM
IC/AE
fT
0
VC’E’1
VC’E’
VC’E’2 < VC’E’3
© MS 13
HICUM model overview HICUM basics
Mobile charge modeling: critical currentICK indicates “onset” of high-current effects in the collector (Si and Si/SiGe transistors)
• calculated in HICUM from the conditions • Ex = Vceff/wCi at low voltages (cf. curve 3 above)
• Ex(xjc) = Elim at high voltages
• connection by suitable smoothing function
,
• effective CE voltage
• model parameters , ,
fCK x( ) 1 x x2 10 3–++2
-----------------------------------+= xVceff Vlim–
VPT---------------------------=
Vceff VC'E' VCEs VDCi VB'C'–≅–=
Vlim Elim wCi=
VPTqNCi
2ε------------- wCi
2= rCi0wCi
qμnC0NCi AE--------------------------------------=
⇒ physics-based relation and model parameters ⇒ enabling geometry, process, T dependent modeling and transistor sizing
Ilim
ICK
VC’E’
T = const
VlimVCEs0
~1/VPT~1/rCi0
ICKVceffrCi0-----------
fCK x( )
1VceffVlim-----------⎝ ⎠
⎛ ⎞δCK
+1 δCK⁄
----------------------------------------------------=
© MS 14
HICUM model overview HICUM basics
Intrinsic transistor: base current componentsThe (internal) base current consists of various components
iBi ipEi ijREi+ ijBCi iAVL+ +=
⎧ ⎪ ⎨ ⎪ ⎩ijBEi
• back injection into the emitter (major contribution): ipEi IBEiSvB'E'
mBEiVT------------------
⎝ ⎠⎜ ⎟⎛ ⎞
1–exp=• Model parameters: IBEiS and mBEi
• recombination in BE space charge region: ijREi IREiSvB'E'
mREiVT------------------
⎝ ⎠⎜ ⎟⎛ ⎞
1–exp=• Model parameters: IREiS and mREi
• weak avalanche current (breakdown in BC junction):
iAVL ITfAVLVDCi
Cc1 zCi⁄
-----------------------qAVL
CjCi0VDCi-------------------------Cc
1 zCi⁄ 1–( )–
⎝ ⎠⎜ ⎟⎛ ⎞
exp= with Cc = CjCi(VB’C’)/CjCi0
• Model parameters: fAVL and qAVL
• back injection into the collector: iBCi IBCiSvB'C'
mBCiVT-------------------
⎝ ⎠⎜ ⎟⎛ ⎞
1–exp=• Model parameters: IBCiS and mBCi
© MS 15
HICUM model overview HICUM basics
Internal base resistance... strongly depends on operating mode
10-3
10-2
10-1
10010
-1
100
101
f/fT
Re(
z BE)
10-3
10-2
10-1
10010
-1
100
101
f/fT
-Im(z
BE)
0 5 10 150.2
0.4
0.6
0.8
1
1.2
IC (mA)
r SB
i/r SB
i0
• DC operation: bias dependence [16]-[19]
RBi rSBi bElE------ gi bE lE,( ) ψdc IBi rSBi bE lE, , ,( )=
geometry func. current crowdingrSBirSBi0-----------
Qp0rQp0r ΔQp+----------------------------≈
conductivity modul.
• large-signal transient operation• slow switching ⇒ use DC RBi • fast switching ⇒ dynamic current crowding
⇒ no compact solution ⇒ distributed model [20]
• small-signal HF operation• analytical solution for negligible DC current crowding
⇒ input impedance [17][18]
• equivalent circuit [21] ⇒ ZB*E’ ZBi lf,RBi
1 jωgωCBRBi+--------------------------------------≈
(negl. in adv. HBTs)
RBi
gωCB
B* B’
Warning: this solution does not apply to large-signal transient operation
© MS 16
HICUM model overview HICUM basics
Summary of model for internal transistor
QjEi Qf
Qr
iT
ijBCi
iBEi
C’
B’
E’
iAVLQjCi
B’
• internal transistor• equivalent circuit • compact equations for each
element as function of - bias - temperature - emitter dimensions
Ti
• summary of important effects explicitely covered in standard version• BE and BC depletion capacitance forward bias limiting • BC depletion capacitance punch-through• bias and bandgap dependent Early-effect (forward and reverse)• accurate mobile charge model incl. current blocking due to BC conduction band barrier• collector voltage dependent impact ionization (iAVL)• vertical non-quasi-static effects for both charge and transfer current • non-ideal and recombination base current components in• BE perimeter injection transfer current• geometry dependence through effective electrical emitter area
(includes (partial) perimeter components => avoid 2-transistor model, simplify extraction)
RBi
CRBi
iBEti
© MS 17
HICUM model overview HICUM basics
Emitter perimeter effects and effective emitter area
bE0
lE0
bE
p
n
n+
JnxITi
γC γC
• carrier injection into base (transfer current):
• AE, bE: effective electrical emitter area and width
⇒ internal and perimeter transistor merged into a
single transistor
⇒ single expression for transfer current (rather than 2-transistor model)
• Note: there are still leftover perimeter components for the base currents and depletion charges
IT ITi AE0 ITp , PE0+ ITi AE0 1
ITp ,
ITi
------- PE0 AE0-----------+
⎝ ⎠⎜ ⎟⎜ ⎟⎛ ⎞
ITi AE
= =
=⎧ ⎨ ⎩
⎧ ⎨ ⎩ITiγC
emitter window dimensions:AE0 = bE0 lE0
PE0 = 2(bE0 + lE0)
© MS 18
HICUM model overview HICUM basics
External transistor
ijBCx
QjS
ijSC
RE
B
RCx
E
C
CEpar
QdS
QjEpijBEp
iTS
S
QBCx, QBCx
,,
Csu
Rsu
RBx
S’
Ti
substrate coupling
iBEt E’
B*
each spatial region is represented by a corresponding equivalent circuit element
C
E
BB
• additional effects included and implemented in simulator code:• temperature dependent equations• self-heating (via adjunct network)• noise (including correlation between transfer and dynamic base current)
(for a complete list of relevant physical effects in HBTs and covered by HICUM/L2 but not available in SGPM => see [3][27])
© MS 19
HICUM model overview HICUM basics
Modeling the (total) base resistance large variety of geometries and contact configurations to be covered ...
• geometries: wide range of lE/bE
• contact configurations• double/single base B||E, multi/single B⊥E
• 2D simulation of a plane through base under emitter [22]-[25],[19]
• analytical equations rB(geometry, bias)
SiO2
EB
E
B
symmetry line
bsil bp bs bE bsilb
Ifront Iback
Ifore
2D plane
x
y
z
lE/2
lp
lsil
p+ poly
2 vias
lE/bE = 2.6BIB/2
rB
rBi
rBs
© MS 20
HICUM model overview HICUM basics
HICUM/L2 complete equivalent circuit
ijBCx
iBEtp
ijSC
iT
RE
B
ijBCi
RCx
E
C
ijBEi
C’
B’
E’
iAVL
CBEpar2
B*
ijBEp
QjCi
iTS
S
CrBi
ΔTj
CthRthP
Csu
Rsu
RBx
S’
intrinsic transistor
T
thermal networkQr
QjEi Qf
QBCx QdS
QjS
QjEp
,,QBCx,
Rbi*
Inb= 2qIjBEi
Vnb
1S.Vnb
Inc= 2qIT
Vnc
1S.Vnc
1S.VncTb2VncTb1Vnb
Tb1=1+jωτf Bf(2αqf -αIT)
Tb2=jωτf αIT
2 noiselessintrinsic
transistor
noise correlation Qf,nqs
R=τf
Qf,qsτf
αIT
VC1 iT,nqs=VC2
R=τf
VC2τf
iT,qsτf
VC1τf
αQf
αIT3
vertical NQS effects
CBEpar1
iBEti
© MS 21
HICUM model overview Geometry scaling
Geometry scaling bipolar transistor structures: dealing with large variety of structures . . .
silicide
becbsbpmbpobKB bKC
n-SICbsic
n+
p+ poly
bE0+bbl
n+ buried layerwj
wCx
bov
p+
n+ sinker
n-epi
ws
wCiwox
bE0
SiO2
SiGe
. . . and layout configurations C E B
CB BEC B BB E E E EEC B CE EC BB
EB CB
EE B C
C
EE B
C
E EB BB
. . . is accomplished by parameter generation and sizing tool TRADICA [30]-[32]
© MS 22
HICUM model overview Geometry scaling
Geometry scalable model (parameter) generationdimensions / design rules
© MS 23
HICUM model overview Geometry scaling
Model related input: general specific electrical parameters
© MS 24
HICUM model overview Geometry scaling
HICUM specific electrical parameters (grouped by function)
© MS 25
HICUM model overview Geometry scaling
Model parameter generation
transistor configuration
=> transistor figures of merit (fT, fmax, Fmin)
=> generates hundreds of consistent model cards in a second
© MS 26
HICUM model overview Geometry scaling
Model parameter generation example (netlist)* dptest AE0= 1* 0.30* 2.00( 1); NB= 2( ); NC=1(SIDE),lv ;T=300.00;* HICUM/Level2 v2.2 / SPECTR TRADICA A5.3.SUBCKT N030201S02_01 3 2 1 9simulator lang=spectrecbemet 2 1 capacitor c=0.1848E-13ccsmet 3 9 capacitor c=0.3300E-14simulator lang=spiceQ 3 2 1 9 MOD.model MOD bht type=NPN tnom= 26.85 version=2.2 + c10=6.544E-33 qp0=8.449E-15 hjei=1.000E+00 hjci=1.000E+00 hfe=1.000E+00 + hfc=1.000E+00 mcf=1.000E+00 ich=7.041E-03 cjei0=2.464E-15 vdei=9.500E-01 + zei=5.000E-01 ajei=2.500E+00 cjci0=4.034E-16 vdci=8.000E-01 zci=3.333E-01 + vptci=3.780E+00 t0=6.523E-12 dt0h=-1.400E-12 tbvl=1.000E-13 tef0=5.000E-13 + gtfe=2.000E+00 thcs=3.000E-11 ahc=5.000E-01 fthc=6.000E-01 rci0=3.754E+02 + vlim=7.000E-01 vpt=1.000E+01 vces=1.000E-01 latb=3.959E+00 latl=6.759E-01 + tr=1.000E-09 alit=4.500E-01 alqf=2.250E-01 flnqs=1.000E+00 ibeis=1.141E-20 + mbei=1.014E+00 ireis=7.041E-34 mrei=2.000E+00 favl=1.186E-04 qavl=4.225E-15 + ibcis=7.041E-34 mbci=1.000E+00 tbhrec=0.000E+00 rbi0=1.282E+02 fgeo=7.934E-01 + fdqr0=2.000E-01 fcrbi=0.000E+00 fqi=6.132E-01 ibeps=4.839E-20 mbep=1.040E+00 + ireps=2.987E-33 mrep=2.000E+00 ibets=9.742E-05 abet=3.674E+01 + tunode=1.000E+00 cjep0=9.341E-16 vdep=1.000E+00 zep=4.167E-01 ajep=2.000E+00 + cbepar=5.412E-16 fbepar=1.000E+00 rcx=2.949E+01 rbx=2.730E+01 re=4.350E+01 + ibcxs=1.059E-18 mbcx=1.025E+00 cjcx0=2.240E-15 vdcx=7.000E-01 zcx=3.333E-01 + vptcx=1.250E+00 fbcpar=2.221E-02 cbcpar=7.126E-16 cjs0=6.098E-15 + vds=6.000E-01 zs=3.479E-01 vpts=1.000E+02 rsu=0.000E+00 csu=0.000E+00 + itss=0.000E+00 msf=1.100E+00 iscs=0.000E+00 msc=1.050E+00 tsf=0.000E+00 + kf=3.711E-09 af=2.100E+00 vgb=1.110E+00 zetact=4.100E+00 alt0=1.110E-03 + kt0=2.220E-05 zetaci=1.453E+00 alvs=1.000E-03 alces=5.714E-04 alfav=3.300E-05 + alqav=4.400E-06 zetarbi=9.000E-01 zetarbx=1.997E-01 zetarcx=2.237E-01 + zetare=0.000E+00 zetabet=4.900E+00 vge=1.061E+00 vgc=1.175E+00 vgs=1.177E+00 + zetacx=2.500E+00 f1vg=-1.024E-04 f2vg=4.322E-04 rth=1.539E+03 cth=1.950E-09 + flsh=1.000E+00.ENDS N030201S02_01
=> generation of complete libraries in seconds
© MS 27
HICUM model overview Parameter extraction
Parameter extraction• strongly impacted by self-heating => carefully been taken into account
model verification
issue: existing on-wafer small- and large-signalcapability insufficient for most advanced HBT technologies
XMOD toolkit
well-defined flow & test structures
=> selected results
© MS 28HICUM model overview Parameter extraction
Modeling results for production technologiesExample for model accuracy: ST SiGe BiCMOS process [37]
IC (mA)VBE (V)
f T (G
Hz)
I C (m
A)
bias and geometry dependence ofcollector current ... ... and transit frequency
⇒ similar results for, e.g., 200GHz(fT) IBM & 300GHz(fT) IHP process, (for more results see [1] and HICUM website [3])
© MS 29
HICUM model overview Parameter extraction
... more modeling results Example for HBT model in production PDK:
IC (mA)
NF m
in (d
B)
Gu
(dB
)
unilateral power gain vs. frequency ... and minimumm noise figure vs. frequency
10010 f (GHz)1
VBE
VBE = (0.8, 0.83, 0.86, 0.89)V f = (8, 20, 32, 40)GHz
TowerJazz SiGe BiCMOS process with (fT, fmax) = (240, 270) GHz
⇒ complete results available in PDK documentation
© MS 30
HICUM model overview Applications
Applications• HICUM/L2 has been employed for production designs such as
• SiGe PAs (WCDMS, OFDMA)• consumer products: laser drivers for CD/DVD/BD, OC192• GSM and GPS receiver front ends• transceivers for wireless key entry systems• UWB, DBS(SAT), radar, OC768
• During production circuit design, the model enables • selecting optimum ballast resistance (trade-off ruggedness vs. power density)• predicting device and metallization temperatures (identify reliability issues)• predicting optimum TSV placement (for optimizing RF gain)• predicting collector voltage waveforms (long-term reliability)
=> widely used => significant implementation effort (e.g. CMC) => well-proven & extensively tested numerically stable production code
• Examples for industrial applications: mostly proprietary ...• usually only feedback once problems are encountered
© MS 31
HICUM model overview Applications
850MHz GSM output cell (RFMD)
850 MHz GSM output cell modelmeasurement
=> good agreement even for
• array of IBM 5PAe HV SiGe HBTs
• 3 E fingers with 0.8*20μm2 each
• total E area = 10000μm2
Simulation with HICUM/L2 • thermal effects • ballasting • ADS • IBM PDK v.1.2.0.2W50• load-pull simulations for finding opti-
mum PAE
very large power levels
© MS 32
HICUM model overview Applications
Model availability and usage• HICUM/L2 has been applied to every Si BJT and SiGe HBT process node since
early eighties => continuous model development
• Examples for process technologies and design kit availability
=> spans 0.1 to 0.8μm lithography, 10 to 300 GHz transit frequency• >15 commercial circuit simulators (incl. RF simulators ADS, SPECTRE ...)
foundry →process ↓
IBM TowerJazz ST TFK (Atmel) IHP
Si-BJT10...30GHz
B25BC35
avail. UHF6STSHSB-SOI
HS SiGe 40... 80GHz
5HP? SBC35 BiCMOS6BiCMOS7
SiGe1RFSiGe2RF
SGB25V
HV SiGe 40... 80GHz
5PAe B25 to SBC18
BiCMOS6 to 9
SiGe2PW SGB25V
HS SiGe90... 240GHz
7HP8HP
SBC18variants
BiCMOS9variants
process N/A
planned
HS SiGe≥300 GHz
process N/A
process N/A
process N/A
process N/A
SG13G2
© MS 33
HICUM model overview Conclusions
Conclusions• Compact modeling approaches
=> physics-based approach has far more benefits than behavioral modeling
• Overview on state-of-the-art compact HBT model HICUM • most important physical effects in SiGe HBTs• parameter extraction flow• examples for results from production designs
• HICUM/L2 is available in all major commercial circuit simulators and many PDKs
• HICUM/L2 has turned out to be suitable for production circuit design of a large vari-ety of applications, aiding trade-off optimization between performance and reliability
=> accurate modeling aids optimizing process capability (& RoI)
• Issues • large-signal model verification requires significant improvement in on-wafer characterization• insufficient funding for transfer into production, implementation, and (legacy) user support • need to have early enough access to advanced technologies to provide model in time• need to better educate circuit designers when using advanced (mm-wave) technologies
© MS 34
HICUM model overview Acknowledgments
Acknowledgments
Model development• BMBF (financial support)
• German Science Foundation (financial support)
• EU FP7 IP DOTFIVE (financial support)
Users and user support• IHP, Infineon, GCS, Skyworks, ST Microelectronics, TowerJazz (wafer supply)
• Cadence, Mentor Graphics (software)
• Agilent, AIST, Analog Devices, Ansoft, Atmel, IBM, ProPlus Solutions, Qualcomm, Renesas Electronics, RFMD, Samsung, STARC, Synopsys, Texas Instruments (National), TelefunkenSemi, Toshiba, TSMC, UMC
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HICUM model overview References (examples only)
References (examples only)[1] M. Schroter and A. Chakravorty, “Compact hierarchical modeling of bipolar transistors with HICUM”, World Scientific, Singapore, ISBN
978-981-4273-21-3, 2010.[2] M. Schroter, “Advanced compact bipolar transistor models - HICUM”, Chapter 8.4 (pp. 807- 823) in “Silicon heterostructure Handbook”,
ed. by J. Cressler, CRC Press NY, 2005.[3] A. Chakravorty and M. Schroter, "HICUM documentation at http://www.iee.et.tu-dresden.de/iee/eb[4] H.K. Gummel and H.C. Poon, "An Integral Charge-Control Model for Bipolar Transistors", BSTJ Vol. 49, 1970, pp. 827-852.[5] G.M. Kull et al., "A Unified Circuit Model for Bipolar Transistors Including Quasi-Saturation Effects", IEEE Trans. Electron Dev., Vol.
ED-32, 1985, pp. 1103-1113.[6] C. McAndrew, J.A. Seitchik, D.F. Bowers, M. Dunn, M. Foisy, I. Getreu, M. McSwain, S. Moinian, J. Parker, D.J. Roulston, M. Schröter,
P. v.Wijnen and L.F. Wagner, „VBIC95, the vertical bipolar intercompany model“, IEEE J. Solid-State Circuits, Vol. 31, pp. 1476-1483, 1996.
[7] M. Schröter, M. Friedrich, and H.-M. Rein, „A generalized Integral Charge-Control Relation and its application to compact models for silicon based HBT's“, IEEE Trans. Electron Dev., Vol. 40, pp. 2036-2046,1993.
[8] M. Schroter, “Integral Charge-Control Relations” Chapter A3 (pp. 1181-1208) in “Silicon heterostructure Handbook”, ed. by J. Cressler, CRC Press NY, 2005.
[9] M. Schroter, H. Tran, “Charge-storage related parameter calculations for Si and SiGe bipolar transistors from device simulation”, Proc. WCM, International NanoTech Meeting, Boston (MA), pp. 735-740, 2006.
[10] M. Schröter and T.-Y. Lee, „A physics-based minority charge and transit time model for bipolar transistors“, IEEE Trans. Electron Dev., vol. 46, pp. 288-300, 1999.
[11] J.R. Beale and J.A. Slatter, "The Equivalent Circuit of a Transistor with a Lightly Doped Collector Operating in Saturation", Solid-State Electronics, Vol. 11, 1968, pp. 241-252.
[12] R.J. Whittier and D.A. Tremere, "Current Gain and Cutoff Frequency Falloff at High Current Densities", IEEE Trans. Electron Dev., Vol. ED-16, 1969, pp. 39-57.
[13] J. TeWinkel, "Extended Charge-Control Model for Bipolar Transistors", IEEE Trans. Electron Dev., Vol. ED-20, 1973, pp. 389-394.[14] P.B. Weil and L.P. McNamee "Simulation of Excess Phase in Bipolar Transistors", IEEE Trans. Circ. Syst., Vol. CAS-25, 1978, pp. 114-
116.[15] W.M. Webster, “On the Variation of Junction-Transistor Current-Amplification Factor with Emitter Current”, Proc. IRE, Vol. 42, 1954,
S. 914-920.[16] H.-M. Rein and M. Schröter, „Experimental determination of the internal base sheet resistance of bipolar transistors under forward-bias
conditions“, Solid-State Electron., Vol. 34, pp. 301-308, 1991.
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HICUM model overview References (examples only)
References (2)[17] R.L. Pritchard "Two-Dimensional Current Flow in Junction Transistors at High Frequencies", Proc. IRE, Vol. 46 ,1958, pp. 1152-1160.[18] H.N. Ghosh, "A Distributed Model of Junction Transistor and its Application in the Prediction of the Emitter-Base Diode Characteristic,
Base Impedance, and Pulse Response of the Device", IEEE Trans. Electron Dev., Vol. ED-12, 1965, pp. 513-531.[19] H.-M. Rein and M. Schröter, „Base spreading resistance of square emitter transistors and its dependence on current crowding“, IEEE
Trans. Electron Dev., Vol. 36, pp. 770-773, 1989.[20] H.-M. Rein, "Improving the Large Signal Models of Bipolar Transistors by Dividing the Intrinsic Base into two Lateral Sections", Elec-
tronics Lett., Vol. 13, 1977, pp. 40-41.[21] M. Versleijen, "Distributed High Frequency Effects in Bipolar Transistors", Proc. IEEE Bipolar Circuits and Technology Meeting, Min-
neapolis, 1991, pp. 85-88.[22] M. Schröter, „Simulation and modeling of the low-frequency base resistance of bipolar transistors in dependence on current and geome-
try“, IEEE Trans. Electron Dev., Vol. 38, pp. 538-544, 1991.[23] M. Schröter, „Modeling of the low-frequency base resistance of single base contact bipolar transistors“, IEEE Trans. Electron Dev., Vol.
39, pp. 1966-1968, 1992.[24] M. Schroter, J. Krause, S. Lehmann, D. Celi, “Compact layout and bias dependent base resistance modeling for advanced SiGe HBTs”,
IEEE Trans. Electron Devices, Vol. 55, No. 7, pp. 1693-1701, 2008.[25] S. Lehmann, M. Schroter, “Improved layout dependent modeling of the base resistance in advanced HBTs”, Proc. WCM, International
NanoTech Meeting, Boston, pp. 795-800, 2008.[26] H.-M. Rein, "A Simple Method for Separation of the Internal and External (Peripheral) Currents of Bipolar Transistors", Solid-State Elec-
tronics, Vol. 27, 1984, pp. 625-632.[27] M. Schroter, A. Pawlak, P. Sakalas, J. Krause, T. Nardmann, “ SiGeC and InP HBT compact modeling for mm-wave and THz applica-
tions”, inv. paper, CSICS, pp. 181-184, 2011.[28] M. Schroter and D.J. Walkey, „Physical modeling of lateral scaling in bipolar transistors“, IEEE J. Solid-State Circuits, Vol. 31, pp. 1484-
1491, 1996 and Vol. 33, p. 171, 1998.[29] M. Schroter, H. Tran, “Two-/three-dimensional GICCR for Si/SiGe bipolar transistors” Proc. WCM, International NanoTech Meeting,
Anaheim (CA), pp. 99-104, 2005.[30] M. Schröter, H.-M. Rein, W. Rabe, R. Reimann, H.-J. Wassener and A. Koldehoff, „Physics- and process-based bipolar transistor mod-
eling for integrated circuit design“, IEEE Journal of Solid-State Circuits, Vol. 34 , pp. 1136-1149, 1999. [31] P. Sakalas, J. Herricht, M. Ramonas, M. Schroter, "Noise modeling of advanced technology high speed SiGe HBTs”, Proc. BCTM, pp.
169-172, 2010. [32] A. Pawlak, M. Schröter, J. Krause, D. Céli and N. Derrier, “HICUM/2 v2.3 Parameter Extraction for Advanced SiGe-Heterojunction Bi-
polar Transistors”, Proc IEEE BCTM, pp. 195-198, 2011.
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HICUM model overview References (examples only)
References (3)[33] M. Schröter and B. Ardouin, “The HiCuM bipolar transistor model”, Chapter 8 in G. Gildenblat (ed.), Compact Modeling: Principles,
Techniques and Applications, Springer, 2010.[34] P. Sakalas, M. Ramonas, M. Schroter, C. Jungemann, A. Shimukovitch and W. Kraus, “Impact Ionization Noise in SiGe HBTs: compar-
ison of device and compact modeling with experimental results”, submitted for publication. [35] M. Schroter, S. Lehmann, S. Fregonese, T. Zimmer, “A Computationally Efficient Physics-Based Compact Bipolar Transistor Model for
Circuit Design—Part I: Model Formulation”, IEEE Trans. Electron Dev., Vol. 53, pp. 279-286, 2006. S. Fregonese, S. Lehmann, T. Zimmer, M. Schroter, D. Celi, B. Ardouin, H. Beckrich, P. Brenner, W. Kraus, “A Computationally Efficient Physics-Based Compact Bipolar Transistor Model for Circuit Design—Part II: Parameter Extraction and Experimental Results”, IEEE Trans. Electron Dev., Vol. 53, pp. 287- 295, 2006.
[36] M. Rickelt and H.-M. Rein, “A novel transistor model for simulating avalanche-breakdown effects in Si bipolar circuits“, IEEE J. Solid-State Circuits, Vol. 37, 2002, pp. 1184-1197. See also: M. Rickelt, “Modeling the breakdown behavior of Si/SiGe bipolar transistors in high-speed integrated circuits“, Ph.D. thesis (in German), Ruhr-University Bochum, Germany, 2004.
[37] D. Berger, "Study and evaluation of a bipolar transistor model for applications at high frequencies", (in French), Ph.D. thesis, University of Bordeaux, 2004.
[38] R. Mallardi, K. Newton, M. Schroter, “Development and design kit integration of a scalable and statistical HIgh CUrrent Model for ad-vanced SiGe HBTs”, Proc. WCM, International NanoTech Meeting, Boston (MA), pp. 729-734, 2006.
[39] Ramana M. Malladi, Vuk Borich, Susan L.Sweeney, Jay Rascoe, Kim M. Newton, Sonal Venkatadri, Jian Yang and Steve Chen, "Two-Tone Distortion Modeling for SiGe HBTs Using the High-Current Model", Proc. WCM, International NanoTech Meeting, Boston, pp. 729-734, 2006.
[40] "EU project targets 0.5-THz SiGe bipolar transistor", EE Times Europe print edition covering March 17 – April 6, 2008. see also DOT-FIVE website: http://www.dotfive.eu/
[41] J. M. Lopez-Gonzalez, M. Schroter,”Study of emitter width effects on ßF, fT, and fmax of 200 GHz SiGe HBTs by DD, HD and EB device simulation”, Semicond. Sci. Technol, 24, 115005 (7 pages), 2009.
[42] S. Decoutere, S. Van Huylenbroeck, B. Heinemann , A. Fox, P. Chevalier , A. Chantre, T. Meister, K. Aufinger, M. Schröter, “Advanced Process Modules and Architectures for Half-Terahertz SiGe:C HBTs” (inv. paper), IEEE BCTM, pp. 9-16, 2009.
[43] A. Pawlak, M. Schröter, J. Krause, G. Wedel, C. Jungemann, “On the feasibility of 500 GHz Silicon-Germanium HBTs”, SISPAD, San Diego, CA, pp. 27-30 , 2009.
[44] S. Decoutere, S. Van Huylenbroeck, B. Heinemann, A. Fox, P. Chevalier, A. Chantre, T. Meister, K. Aufinger, M. Schröter, „Pushing the speed limits of SiGe:C HBTs up to 0.5 Terahertz”, IEEE 2009 Custom Integrated Circuits Conference (CICC), pp. 347-354, 2009.
[45] J. Jacob, A. DasGupta, M. Schröter, A. Chakravorty, "Modeling Non-Quasi-Static Effects in SiGe HBTs", IEEE Trans. Electron Dev., Vol. 57, No. 7, pp. 1559-1566, 2010.
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HICUM model overview References (examples only)
[46] M. Al-Sa'di, V. d’Alessandro, S. Fregonese, S.-M. Hong, C. Jungemann, C. Maneux, I. Marano, A. Pakfar, N. Rinaldi, G. Sasso, M. Schröter, A. Sibaja-Hernandez, C. Tavernier, and G. Wedel, "TCAD simulation and development within the European DOTFIVE project on 500GHz SiGe:C HBT’s", European Microwave Conf., pp. 29-32, 2010.
[47] B. Ardouin, C. Raya, M. Schroter, A. Pawlak, D. Céli, F. Pourchon, K. Aufinger, T. F. Meister, T. Zimmer, "Modeling and Parameter Extraction of SiGe:C HBT's with HICUM for the Emerging Terahertz Era", European Microwave Conf., pp. 25-28, 2010.
[48] G. Wedel, M. Schroter, “Hydrodynamic simulations for advanced SiGe HBTs”, CMRF, Proc. BCTM, pp. 237-244, 2010.[49] P. Sakalas, J. Herricht, M. Ramonas, M. Schroter, "Noise modeling of advanced technology high speed SiGe HBTs”, Proc. BCTM, pp.
169-172, 2010. [50] A. Rumiantsev, P. Sakalas, F. Pourchon, P. Chevalier, N. Derrier, M. Schroter, “Application of On-Wafer Calibration Techniques for Ad-
vanced High-Speed BiCMOS Technology”, Proc. BCTM, pp. 98-104, 2010. [51] J. Lopez-Gonzalez, P. Sakalas, M. Schroter, “Analytical modeling of 200 GHz SiGe HBT high frequency noise parameters “, Sol.-St.
Technol., Vol. , pp. 105011 (10p), 2010.[52] A. Shimukovitch, P. Sakalas, P.Zampardi, M. Schroter and A. Matulionis, “Investigation of electron delay in the base on noise perfor-
mance in InGaP HBTs”, Physica Status-Solidi, Vol., pp. 335-337, 2010.[53] S. Lehmann, M. Weiss, Y. Zimmermann, A. Pawlak, K. Aufinger, M. Schroter, “Scalable Compact Modeling for SiGe HBTs suitable for
Microwave Radar Applications", Dig. IEEE SiRF, Phoenix (AZ), pp. 113-116, Jan. 2011.[54] T. Nardmann, S. Lehmann, M. Schroter, “Application of HICUM/L0 to InP DHBTs using single-transistor parameter extraction”, 23rd
Int. Conf. on Indium Phosphide and Rel. Mat., Berlin, Germany, 4 pages, May 2011. [55] A. Pawlak, M. Schröter, A. Mukherjee, S. Lehmann, S. Shou, D. Celi, “Automated Model Complexity Reduction using the HICUM Hi-
erarchy”, IEEE SCD, 4 pages, 2011.[56] K. Moebus, Y. Zimmermann, G. Wedel, M. Schröter, “Thermal Modeling of BOX/DTI enclosed Power Devices with Green’s Function
Approach”, IEEE SCD, 4 pages, 2011.[57] A. Pawlak, M. Schröter, J. Krause, D. Céli and N. Derrier, “HICUM/2 v2.3 Parameter Extraction for Advanced SiGe-Heterojunction Bi-
polar Transistors”, Proc IEEE BCTM, pp. 195-198, 2011. [58] M. Schroter, A. Pawlak, P. Sakalas, J. Krause, T. Nardmann, “ SiGeC and InP HBT compact modeling for mm-wave and THz applica-
tions”, inv. paper, CSICS, pp. 181-184, 2011.[59] M. Schroter, G. Wedel, B. Heinemann, C. Jungemann, J. Krause, P. Chevalier, A. Chantre, “Physical and electrical performance limits of
high-speed SiGeC HBTs - Part I: Vertical scaling”, IEEE Trans. Electron Dev., Vol. 58, No. 11, pp. 3687-3696, 2011.[60] M. Schroter, J. Krause, N. Rinaldi, G. Wedel, B. Heinemann, P. Chevalier, A. Chantre, “Physical and electrical performance limits of
high-speed SiGeC HBTs - Part II: Lateral scaling”, IEEE Trans. Electron Dev., Vol. 58, No. 11, pp. 3696-3706, 2011.[61] M. Schroter, S. Chaudhry, J. Zheng, A. Mukherjee, A. Pawlak, S. Lehmann, “SiGe HBT compact modeling for production-type circuit
design” (inv.), Proc. SiRF, pp. 129-132, 2012.
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