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Hardware Implementation of Micropolygon Rasterization
with Motion Blur and Depth Of Field
ABSTRACT
Current GPUs rasterize micropolygons (polygons
approximately one pixel in size) inefficiently. Additionally,
modern systems do not natively support rasterization with
jittered sampling, defocus, and motion blur. This work is a
follow on to the work presented in [FLB09], which indicates
that hardware micropolygon rasterization would be required
for real-time micropolygon rendering. In this paper we present
three designs for NoBlur rasterization, Interleave
rasterization, and a hybrid unit which supports both render
modes. We found that for all three designs it was efficient to
perform sample tests at low precision and to operate on
quads (triangle pairs who share an edge). In the case of an
efficient NoBlur design, we found that a 2x2 sample raster
stamp should be utilized which contradicts the prior work
[FLB09]. In the case of an Interleave rasterization unit we
confirmed the prior works results that a sample parallelism of
2-3 across micropolygons is efficient and interleave
rasterization would cost 7-10x more than NoBlur rasterization.
Finally, we present a hybrid design which balances the
performance requirements of both NoBlur and Interleave by
serializing the blur specific hardware and utilizing a 2x2
sample raster stamp.
BACKGROUND
In order to render scenes containing complex geometry,triangles about the size of a pixel or micropolygon arerequired. This is consistent with all off-line renderingsystems utilized for cinematic rendering.
John S. Brunhaver II, Kayvon Fatahalion, Pat Hanrahan
OBJECTIVE
The goal is to implement a system with orders ofmagnitude improvement over a software implementation.
Hardware Design
Parameterize micro-architecture
Use architectural simulation to predict IPC
Use Synthesis to predict clock cycle time
Explore micro-architecture and physical design space
Verify globally optimal strategies
RESULTS
CONCLUSIONS
Our results suggest that micropolygon rasterization inhardware is more efficient than a software implementationon the order of 100x. We have also shown the an optimalconfiguration of this design.
A remaining issue is understanding the role that largepolygons play in a micropolygon rendering pipeline and howefficiently to design a micropolygon rasterization back endwith support for large polygons. Additionally, it is notuncommon in off-line render systems for the artist to slightlyincrease the size of blurred micropolygons for increasedperformance; an implementation which automaticallydetects and optimizes for high blur polygons in this mannerwould be a natural follow on to this work.
RESULTS
For additional information please contact:
John S. Brunhaver II
Electrical Engineering Department
Stanford University
Globally Optimal Micro-Architecture Parameters
Cost to rasterize at a 300 Million Triangle per second rate
Cost to rasterize at a 5 Billion Triangle per second rate