Grid connected converters: Multilevel Structures · 2-level inverter based on series-connected devices DC supply A Act as one switch Single leg ... 5-level converter Multilevel Converters

Grid connected converters:

Multilevel Structures

Professor Pericle Zanchetta

Power, Electronics, Machines and Control (PEMC)

Research Group

University of Nottingham (UK)

• Background

• H-Bridge Converter

• Multilevel Converters Topologies

• Cascaded H-Bridge Converter

• Modulation Techniques

• Modular Multilevel Converter

• Parallel Hybrid Converter

• Alternate Arm Converter

Topics

Background

Different power electronics applications, both in industry and energy

sector, requires high-voltage high-power managing capabilities. The

most representative are:

• High-speed Trains

• Medium-Voltage Drives

• Reactive power compensation/generation (STATCOM)

• Medium-Voltage grid connection of Renewable Energy

Sources

• High-Voltage Direct Current (HVDC) transmission

networks

Most of have been covered by Thyristor-based power electronics

switches (Thyristors or GTOs)

IGBTs have been progressively replacing GTO devices in low and medium voltage

inverters used in trams or regional trains and now they are also becoming attractive

for high-speed traction locomotives as well as for MV Smart grid and Microgrid

applications.

State-of-the-art commercial IGBTs ratings are 6.5 kV – 750 A (Infineon).

Background

H-bridge Converter

In case of bidirectional power flow, for single phase converters,

an H-bridge is needed. If an H-bridge is connected to an ideal

voltage source VDC it can

S1

S2

S3

S4

+

-

VDCVAB+ -

S1

S2

S3

S4

+

-

VDC

VAB=VDC+ -

Q1

Q2

Q3

Q4

+

-

VDCiVAB=0+ -

Q1

Q2

Q3

Q4

+

-

VDCVAB=0+ -

Q1

Q2

Q3

Q4

+

-

VDC

VAB=-VDC+ -

STATE=1

STATE=0

STATE=-1

produce three voltage levels,

indicated as –VDC, 0 and + VDC

associated, respectively, to states -1,

0 and 1.

2-level or bipolar Modulation

2-level PWM: vAB can assume +VDC or

–VDC value

mf =fp/fm is the modulation ratio

fp is carrier frequency

fm is fundamental frequency

ma=vm/VDC is the modulation

index

dCdV

1S

2S

3S

4S

1D

2D

3D

4D

A

B

P

N

ABv

1gv

3gv

dV

dV

0

-1.0

1.0

0

BNv

ANv

0

ABv

dV

1ABv

2

mv crv

0

0.2

0.4

0.6

12 fm

32 f

m 32 f

m

2f

m 2f

m 23 f

m 14 fm

1n

dn VVAB

/

0

(a) Waveforms

(b) Harmonic spectrum

dV

n1 10 20 30 40 50 60

H-bridge Converter

12

Harmonics amplitude, referred to DC-link

voltage, vs modulation index ma

d

n

V

VAB

0.2

0.4

0.6

0.8

0.2 0.4 0.6 0.8

2f

m

00

32 f

m

12 f

m

0.707

fm

am

1n

H-bridge Converter

3-level or Unipolar Modulation

0

-1.0

1.0

mv

2

1gv

3gv

0

BNv

ANv

dV

dV

0

ABv

dV

0

0.2

0.4

dn VVAB

/

32 f

m 32 f

m

14 f

m

0.6

12 f

m

mv crv

1n

(b) Harmonic spectrum

(a) Waveforms

n1 10 20 30 40 50 60

• Two modulation waves

vm and vm-

• One carrier wave vcr

• 3-level PWM:

vAB from 0 to +Vd

or from 0 to -Vd

dCdV

1S

2S

3S

4S

1D

2D

3D

4D

A

B

P

N

ABv

H-bridge Converter

In many high-voltage applications it is still hard to connect

a single fully controlled power switch directly, for example

for Medium Voltage grids (3.3 kV to 20 kV) or, even

worse, for an HVDC network (from tens to hundreds of

kV).

To deal with high voltages, the possible solutions are:

• Series connection of multiple switch devices

• Series connection of multiple converters

• Multilevel converters

Multilevel Converters

2-level inverter based on series-connected devices

DC

supply A

Act as

one switch

Single leg

• Simple concept

• Voltage drop across Series-connected

devices can be unevenly distributed

• 2-level operation – needs relatively

high PWM frequency

• High switching losses

• 2-level PWM generates significant

harmonics – significant filtering is

required


T

T

T

T

ea

vx1

vx2

0

Vcc

2

C__

2

C__

T

Vcc

2

__

Lr

Cr

Lr

Cr

Bidirectional AC/DC converter based on Multiple series-connected H-bridges

• Derived from line-commutated

thyristors converters

• Separate control of single converters

• 5-level operation on AC

side if capacitor voltage

divider is used

• Voltage drop can be uneven

depending on the voltage balancing

on DC-link capacitors

• Behaviour similar to NPC

multi-level converter

Example. 5-level converter


• To increase inverter operating voltage without devices in series

thus, permitting replacement of thyristors in high-voltage applications

• To improve power quality even with low switching frequencies fsw

• To reduce EMI due to lower voltage steps (dv/dt)

Why use Multilevel Inverters?

Switching frequency range compatible to high power converters:

fsw = 100Hz ~ 1000Hz

Todays trend is to extend their use also in applications with particularly strict power

quality requirements even in relatively low voltage environments.

Main drawbacks:

higher circuitry and control complexity

costs


dC

Cascaded

H-bridge (CHB)

~

dC

Flying Capacitor

(FC)

~

dC

Diode Clamped

or Neutral Point

Clamped (NPC)

dC

~

Can be classified into the following main categories

per phase diagram shown

Multilevel Converters Topologies

dC

Diode Clamped

or Neutral Point

Clamped (NPC)

dC

N A

1S

2S

3S

4S

DCV For a 3-level leg NPC converter has been used since

1980s as permitted to effectively

halve the device voltage drop

avoiding series-connected devices.

The dc-bus voltage is split into three

levels by two series-connected bulk

capacitors. The middle point of the

two capacitors N is defined as the

Neutral Point. Two diodes permit to

connect the converter output to the

neutral voltage

VAN ON Switch

+VDC/2 S1, S2

0 S2, S3

VDC/2 S3, S4

• Good compromise for 3 or 5 level designs

• Number of diodes increases with m2 (being m the voltage levels) if

same voltage rating is used

• Reverse recovery of clamping diodes becomes the major design

challenge in high-voltage high-power applications with large m

• Capacitors voltage balancing needed


dC

Flying Capacitor

(FC)

DCV

dC

N A

1S

2S

3S

4S

1C

• Increased voltage level redundancy (same level can be

produced by different switch combinations)

• Number of bulk capacitors increases with m2 if same

voltage rating is used

• Reduced availability if electrolytic capacitors are used

• Capacitors voltage balancing needed

For a 3-level leg Similar to NPC converter, but uses

capacitors instead of diodes to

generate intermediate voltage

levels.

Clamping capacitor C1 is charged

when and are S1-S3 turned-on and is

discharged when and S2-S4 are

turned-on.

The charge of C1 has to be balanced

by proper selection of the 0-level

switch combination.

VAN ON Switch

+VDC/2 S1, S2

0 S1, S3

S2, S4

VDC/2 S3, S4


CHB Converters

ia

H-Bridge

2

H-Bridge

1

H-Bridge

n

VDC1

VDC2

VDCn

VH1

VH2

VHn

VAC

iDC1

iDC2

iDCn

Cascaded H-Bridge (CHB) Converters are

based on the series connection of H-Brigde

converters supplied with separate DC

sources.

In a symmetrical converter, each cell is

connected to an ideal voltage source VDC and

can produce three voltage levels.

As a consequence, an n-cell cascaded

converter can produce 2n+1 voltage levels on

the AC side.

VAC=VH1+VH2+…+VHn

General structure of a n-level CHB

• No extra components needed (diodes or capacitors) with respect to NPC or FC

• Enable modular and scalable designs

• Separate DC sources

0 0.005 0.01 0.015 0.02

-1

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

Time /s

Am

plit

ude

0 0.005 0.01 0.015 0.02

-1

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

Time /s

Am

plit

ude

0 1000 2000 3000 4000 5000 0

0.2

0.4

0.6

0.8

1

Frequency /Hz

Am

plit

ude (

Norm

alis

ed)

5 Level

Conventional

The more H-Bridges… the higher the

supported voltage and the better the

harmonic content (more levels produce a

better approximation to a sine wave)

Single H-Bridge

2 H-Bridges in series

CHB Converters

The same level can be produced

with different states, i.e. switching

combinations; such a redundancy

can be used for two goals:

• Reduce the switching frequency

• Balance the voltage on the

capacitor of each H-bridge cell

in case of unbalanced DC loads

7-level CHB

VCONV Switching state H-Bridges States

+3E +3 111

+2E +2 (110) (101) (011)

+E

+1 (100) (010) (001)

(11-1) (1-11) (-111)

0

0 (000) (10-1) (-101) (1-10)

(-110) (01-1) (0-11)

-E

-1 (-100) (0-10) (00-1)

(-1-11) (-11-1) (1-1-1)

-2E -2 (-1-10) (-10-1) (0-1-1)

-3E -3 -1-1-1

CA

H-BRIDGE

1

H-BRIDGE

2

H-BRIDGE

3

C

C

C

L+

-

+

-

+

-

+

-

+

-

Vdc1

Vdc2

Vdc3

VconvVs

I

R

R

R

CHB Converters

Modulation Techniques

Performance of Multilevel converter strongly depends on the adopted Modulation

Technique.

The main goal of a Modulation technique is to produce the desired fundamental

output voltage with minimum harmonic content so to reduce the output filter

size and cost. To this aim, suitable commands for each power switch have to be

produced with a dedicated hardware implemented with analog circuits, small scale

integrate circuits, microcontrollers or FPGA.

Important features for a Multilevel Converter, in particular for high-power

applications, are:

• low switching frequency

• even distribution of losses amongst the power switches

The choice of a modulation technique depends mainly on the converter output type

(single or three-phase), topology and specific application.

Modulation techniques can be divided in two classes:

1. carrier based PWM, in which the switching instants are determined by the

intersection of the desired reference signal with carrier signals;

2. calculation based PWM in which the switching instants are calculated in

every sampling period by a specific procedure.

For Multi-level converters, the most common modulation techniques belonging

to the first class are:

• Phase-shifted Carrier Modulation (PSCPWM) which can evenly distribute

switching stress amongst the converter cells

• Level Shifted Carrier Modulation which, in turn, can be subdivided in 3

subcategories: In-Phase Disposition (IPD), Alternate Phase Opposite

Disposition (APOD) and Phase Opposite Disposition (POD); they cannot

provide evenly distributed commutations in particular for low modulation

index.


Modulation techniques can be divided in two classes:

1. carrier based PWM, in which the switching instants are determined by the intersection of

the desired reference signal with carrier signals;

2. calculation based PWM in which the switching instants are calculated in every

sampling period by a specific procedure.

For Multi-level converters, the most common modulations techniques belonging to the

second class are:

• Selective Harmonic Elimination (SHE), which aims to reduce or eliminate low order

harmonics whilst controlling the fundamental component of a generic waveform

• Space Vector Modulation (SVM) based techniques, which become very complex

increasing the level number as the voltage vectors and corresponding redundant states

increases significantly in case of three-phase configurations.

It is to notice that single-phase leg modulation is used not only in single-phase application

but even more in three-phase applications requiring high flexibility (i.e. converters for AC

Microgrids suppling three-phase unbalanced loads).


Amv

1crv2crv

3crv

11gv

31gv

1Hv

12gv

32gv

2Hv

13gv

33gv

3Hv

0

ANv

E

3E

0

1.0

-1.0

E

1crv2crv

3crv

E

321 HHH vvvvAN

• amount of carriers: 6

• Phase shift: 360° / n = 60°

Carriers for H1 bridge: vcr1 and vcr1-



7-level CHB

Phase-shifted Carrier Modulation

• Inverter Waveforms (7-level, phase shifted)

1Hv

2Hv

3Hv

0

ANv

0

ABv

3E

6E

• Switching occurs at

different times

• fsw(device) = 60 mf = 600Hz

• Inverter phase voltage

levels: 7

• Low EMI

• Line-to-line voltage

levels: 13

• Close to a sinusoid

• Low THD


Harmonic content (7-level, phase shifted)

• Lowest harmonics: around 2mf

• Lowest harmonics: around 6mf • Containing triplen harmonics

• No triplen harmonics • Equivalent fsw(inverter)

= 60(6mf ) = 3600Hz

0

0.04

0.0812

fm

14 f

m 16 f

m

0

0.04

0.08

36 f

m96

fm 96

fm

0

0.04

0.0816

fm

76 f

m 76 f

m

dn VV /H1

dANn VV /

dABn VV /

THD = 53.9%

THD = 18.8%

THD = 15.6%

1 n10 20 30 40 50 60 70 80

1 n10 20 30 40 50 60 70 80

1 n10 20 30 40 50 60 70 80

Phase-shifted Carrier Modulation Phase-shifted Carrier Modulation

Harmonics amplitude vs modulation index

00.2 0.4 0.6 0.80

am

0.1

0.2

0.3

d

n

V

VAB

16 f

m

56 f

m 76 f

m

116 f

m

xD

yD 2241.x

y

D

D

1n

The maximum amplitude of fundamental voltage with respect of DC-link voltage is still quite low (0.707)


m = 5

• number of carriers:

mc = m - 1 = 4

IPD provides the best harmonic profile, but produce uneven

commutation distribution with the same amplitude limits as PSCPWM.

-1.0

0

1.0mv

2

3

1crv

(a) In-phase disposition (IPD)

2crv

3crv

4crv

2 3

(b) Alternative phase opposite disposition (APOD)

mv

2

(c) Phase opposite disposition (POD)

mv

-1.0

0

1.0

1crv

2crv

3crv

4crv

-1.0

0

1.0

1crv

2crv

3crv

4crv

IPD

APOD

POD

Level-shifted Carrier Modulation

cr1v

cr2v

cr3v

g11v

g31v

1Hv

12gv

32gv

2Hv

13gv

33gv

3Hv

0

ANv

3E

mAv

-cr1v

-cr3v

-cr2v

3H2H1HANvvvv

E

E

E

m = 7

number of carriers:

mc = m - 1 = 6

• fsw(device)

- not equal to fcr, and

- not the same for all switches.

• uneven devices conduction angles:

• Necessary to swap switching

pattern.

Gating Arrangement


Inverter Output Voltages

m = 7

• vAB close to a sinusoid

• Low THD, low EMI

• fsw(inv) = fc = 3600Hz

• Switching occurs at

different times

• fsw(device) = fcr /mc =

600Hz (avg)

1Hv

2Hv

3Hv

0

ANv

0

ABv

0

0.04

0.08

0

0.04

0.08

2fm8fm8fm

16fm16fm

3E

6E

2 4

2 4

THD = 18.6%

THD = 10.8%

6fm 6fm

dABn VV /

dANn VV /

1 n10 20 30 40 50 60 70 80

1 n10 20 30 40 50 60 70 80


Total Harmonic Distortion (THD) vs modulation index

am0.2 0.4 0.6 0.8

0

20

40

60

80

THD

(%)

Phase-Shifted PWM

Level-Shifted PWM (IPD)

Hz600, devswfSeven-level Inverter

PWM Scheme Comparison

Selective Harmonic Elimination (SHE)

eliminates low order harmonics whilst controlling the fundamental

on-line determination of the switching angles is almost impractical

difficult implementation on rapid transient of modulation index

Modulation Techniques for CHB

Vab* : Reference voltage

Vn and Vn+1: Respectively the voltage levels immediately below and above Vab

*

tONn and tONn+1: On-duration times associated with Vn and Vn+1 respectively

*

1 1ab S n ONn n ONnV T V t V t

the commutations are not always performed among adjacent

voltage levels;

the commutations are not equally distributed during the modulation period and among the different cells.

Average Value Modulation (AVM) or 1-D Modulation (1DM)

Based on the selection on the two nearest voltage levels. On times are calculated by voltage· time balance equation:


The commutations are not equally distributed during the modulation period and among the different cells so for low modulation index values some HB cells may be unused.

Average Value Modulation (AVM) or 1-D Modulation (1DM)

0 0.01 0.02 0.03 0.04-3

-2

-1

0

1

2

3

Time (s)

No

rmal

ized

Vo

ltag

e

Ref.

Output

0 0.01 0.02 0.03 0.04-1

-0.5

0

0.5

1

Time (s)

No

rmal

ized

HB

rid

ge1

Vo

ltag

e


Goals:

• distribute, for any amplitude of the

voltage reference, the commutations

among the three H-Bridges of each phase

in order to reduce the heating and stress

on the power switches and improve their

reliability

•Reduce the overall number of

commutations.

Strategy

• Sequential commutations of the H-

Bridges that each one can perform only

one commutation every 3 sampling

periods

• Perform commutations only between

adjacent voltage levels.

Single-phase 7-level CHB

Converter

ia

H-Bridge

2

H-Bridge

1

H-Bridge

3

Lf

VDC1

VDC2

VDC3

vs

VH1

VH2

VH3

VCONV

iDC1

iDC2

iDC3

Distributed Commutations Modulation

Distributed Commutations

Modulation (DCM)


0 0.01 0.02 0.03 0.04-1

-0.5

0

0.5

1

Time (s)

No

rmal

ized

HB

rid

ge1

Vo

ltag

e

0 0.01 0.02 0.03 0.04-3

-2

-1

0

1

2

3

Time (s)

No

rmal

ized

Vo

ltag

e

Modulated voltage H-Bridge 1 voltage

Modulation Index=0.83

Total Switching Frequency = 3600 switching/s

Switching Frequency per HB = 1200 switching/s

The commutations are distributed along each period

The commutations are always distributed among all the H-Bridges even for low

values of the modulation index.


m= 0.83

0 10 20 30 40 500

1

2

3

4

5

6

7

8

9

10

11

harmonic order

Am

plitu

de [%

of 1

st H

arm

onic

]

0 10 20 30 40 500

1

2

3

4

5

6

7

8

9

10

11

harmonic order

Am

plitu

de [%

of 1

st H

arm

onic

]

AVM

THD = 19.39 %

0 10 20 30 40 500

1

2

3

4

5

6

7

8

9

10

11

harmonic order

Am

plitu

de [%

of 1

st H

arm

onic

]

DCPWM

THD = 12.50 %

PSCPWM

THD= 19.50%

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

NW

TH

D

Modulation Index [m]

PSCPWM

AVM

DCPWM

Normalized Weighted Total Harmonic Distortion (NWTHD) 50 2

1

2

n

n

VNWTHD m V

n


DCM has intrinsic voltage balancing capability on the DC capacitors even if

the voltage error converges quite slowly to zero.

To improve the voltage balancing which becomes significant in case of

unbalanced load, a specific algorithm has to be employed.

0 0.5 1 1.5 20.7

0.8

0.9

1

1.1

1.2

1.3

Time (s)

No

rmali

zed

Vo

ltag

es

on

Cap

acit

ors

VDC1

VDC2

VDC3

Intrinsic DC-Link voltage

balancing

DC-Link voltage balancing algorithm that

with device voltage drops and ON

resistance compensation capabilities


A

2 phases of 3 shown

• Concept more complex

• Switching of cells controls BOTH the DC side and

AC side voltage

• Each switching cell can be implemented in

different ways (half-bridge, full-bridge, FC,

NPC..)

• No bulk DC-link capacitor

• No need for series devices

• Multi-level operation – low switching frequency +

good harmonic performance

• Low switching losses (typical total losses 1% per

station)

• Twice the number of devices required compared

to 2-level approach

• Large number of capacitors of significant size

• Need capacitors voltage balacing

• Sizing of the arm inductor depends upon the

filtering needs and the short-circuit current limit

B

Edc

DC SIDE

CELL

Modular-Multilevel-Converter (M2LC)

A

2 phases of 3 shown

B

Edc

DC SIDE

CELL

Multi-level AC

voltage VAC and

current IAC

Vupper

Vlower

IDC

Vdc/2 + VAC

Vdc/2 - VAC

Idc/3 + IAC/2

Idc/3 - IAC/2

Modular-Multilevel-Converter (M2LC)

HVDC VSC Example

3 3 3 3

M2LC M2LC

DC Cable (undersea)

Switching device hall

400MW, +-200kV DC, 230kV/138kV AC, 5184 IGBTs!

Trans Bay Cable Project: Siemens HVDC Plus – first M2LC (2010)

Parallel hybrid topology

H-bridge

Chain of half-bridges

0 180 360

0 180 360

0 180 360

0 180 360

• Hybrid arrangement yields high quality waveforms with low switching losses

• Chain-Link converters perform wave shaping function • Converters outside of main power path => low switching losses

• Mean Chain-link current typically <20% of DC current

• H-Bridge converters are zero voltage soft switched • Device switching frequency = fundamental frequency

• One of the 1st examples of a soft-switched high power (MW-GW) converter

• Lower component count compared to alternatives

• Highly modular

• Research continues on control and practical verification

Parallel hybrid topology

Alternate Arm Converter (AAC)

Vcl1

Vcl2

0 a

Vs1

Vs2

10kV

10kV

0 5 10 15 20-10

-8

-6

-4

-2

0

2

4

0 5 10 15 20-4

-2

0

2

4

6

8

100 5 10 15 20

-14

-12

-10

-8

-6

-4

-2

0

0 5 10 15 20-15

-10

-5

0

5

10

15

S1 ON

S2 ON

Condition for zero

energy exchange

with chain-links

VAC(peak) = 2EDC/

ZVS

VOFF < 20kV


• Series IGBT switches commutate at near zero voltage

• Series H-bridges can support the AC voltage when there is a DC side fault

• Actively control AC side current to zero

• No need to interrupt fault current with AC side breaker

• Or actively control AC current to be reactive

• Gives STATCOM performance during DC side fault

• Research continues on control, fault performance studies, system studies, practical implementation


Example of CHB application

H-bridge

H-bridge

H-bridge

H-bridge

DCDC

DCDC

DCDC

DCDC

H-bridge

H-bridge

H-bridge

H-bridge

DCDC

DCDC

DCDC

DCDC

H-bridge

H-bridge

H-bridge

H-bridge

DCDC

DCDC

DCDC

DCDC

Port 1

H-bridge

H-bridge

H-bridge

H-bridge

H-bridge

H-bridge

H-bridge

H-bridge

H-bridge

H-bridge

H-bridge

H-bridge

Port 2

Port 3

3-p

hase

grid

/load

Sto

rag

e e

lem

en

ts

3-p

hase g

rid

/load

Ue1(A)

Ue2(A)

Ue3(A)

Ue4(A)

Ue1(B)

Ue2(B)

Ue3(B)

Ue4(B)

Ue1(C)

Ue2(C)

Ue3(C)

Ue4(C)

Ue1(A)

Ue1(B)

Ue1(C)

Ue2(A)

Ue2(B)

Ue2(C)

Ue3(A)

Ue3(B)

Ue3(C)

Ue4(A)

Ue4(B)

Ue4(C)

• Three ports with bidirectional power flow

circa 5 MW rated power

• Directly grid connected to the Distribution

Network (10-20 kV)

• Modular architecture

• Cascaded structure of AC/DC/DC/AC

converters with Medium Frequency

Isolation

• Cascaded H-Bridge structure formed at

the AC terminals (Port 1 and 2)

• Incorporates Renewable Energy Systems

(RES) and utilises energy storage

UNIFLEX-PM

(Universal and Flexible Power

Management in Future

Electricity Networks)

Documents

Grid connected converters: Multilevel Structures · 2-level inverter based on series-connected devices DC supply A Act as one switch Single leg ... 5-level converter Multilevel Converters