greendroid-150218033814-conversion-gate02.pptx

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    TechnicalSeminar OnGreenDroid  By  TechRulz.

    Visit: Techrulz and Ba

    http://www.techrulz.com/http://www.basictricks.net/http://www.basictricks.net/http://www.techrulz.com/

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    )or"ing

    It does this through the use oa hundred or so automaticallygenerated' highly specialized'energy-reducing cores' called

    conser(ation cores.

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    *a+or technologicproblem or

    *icroprocesso

    Architects

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    ,ecessity

    • A "ey technological problem or microprocessor architeutilization wall.

    • The utilization !all says that' !ith each process generapercentage o transistors that a chip design can s!itchreuency drops e#ponentially because o po!er const

    • A direct conseuence o this is Dark Silicon

    • Dark Siliconlarge s!aths o a chip%s silicon area tharemain mostly passi(e to stay !ithin the chip%s po!er

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    • /urrently' only about $percent o a modest-sized01-nm mobile chip cans!itch at ull reuency!ithin a 0-) po!erbudget.

    • )ith each processgeneration' dar" silicongets e#ponentiallycheaper' !hereas thepo!er budget is

    becoming e#ponentially

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    )hat is 2o!er Budget 33

    • A po!er budget sho!s !here all the possible pobe used by a de(ice to by brea"ing it do!n intocomponents and categories.

    • In some situations' you might be told up ront th

    !ill ha(e 0) a(ailable to run your design.

    • o!e(er' sometimes as designers start by calcuthe total po!er a system needs and then ta"ing such as replacing parts or redesigning circuits to

    bac" po!er to an acceptable le(el.

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     The tilization )all

    • Scaling theory Transistor and po!er budgets no longer balanced

    6#ponentially increasing problem7

    Classical scalinDe(ice count De(ice reuenc

    De(ice po!er 9c

    De(ice po!er 9<

    Utilization

     eakage limitescalingDe(ice count

    De(ice reuenc

    De(ice po!er 9c

    De!ice "ower

    Utilization

    Expected utilization for fixed area

    and power budget

    0.0

    0.1

    0.2

    0.3

    0.4

    0.5

    0.6

    0.7

    0.8

    0.9

    1.0

      nm 65nm 45nm 32nm

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     The tilization )all

    • &'"erimental results• Replicated small data path

    • *ore =Dar" 8ilicon% than acti(e

    • O(ser!ations in the wild• >lat reuency cur(e

    • ?Turbo *ode@

    • Increasing cache;processor ratio

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    tilization )all Dar" Implications *ulticore

    4 cores @ 3 GHz

    4 cores @ 2x3

    (12 cores dark)

    2x4 cores @ 3 G

    (8 cores dark)

    (Industry’s Choi

     . …

    65 nm 32 nm

     . …

     . …Spectrum o tradeos

     !et"een # cores andre$uenc%.

    e.&.' take

    65 nm32 nm'

      i.e. (s =2)

     

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    ey Insights

     The research le(erages t!o "ey insights

    • )irst' it ma"es sense to Cnd architectural techntrade this cheap resource' dark silicon' or the(aluable resource' energy e&ciency.

    • Second' specialized logic can attain $E to $'energy e&ciency o(er general-purpose processo

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    Approach

    • The approach is to Cll a chip%s dar" silicon area!ith specialized cores to sa(e energy on commonapplications.

    • These cores are automatically generated rom thecode base that the processor is intended to run

    that is' the Android mobile-phone sot!are stac".

    • The cores eature a ocused re-conCgurability sothat they can remain useul e(en as the codethey target e(ol(es.

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     The GreenDroid architectur

    • The GreenDroid architecture uses specialized' ene&cient processors' called conser(ation cores' ocores to e#ecute reuently used portions o theapplication code.

    • /ollecti(ely' the c-cores span appro#imately F5 o the e#ecution time o team%s test Android-bas!or"load.

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     The high-le(el architecture o a GreenDroid syste

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     The systemcomprises an arrayo $ non-identicaltiles.

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    6ach tile holdscomponents common toe(ery tilethe /2' on-chip net!or" 9H/,:' andshared e(el $ 9$: data

    cacheand pro(idesspace or multipleconser(ation cores 9c-cores: o (arious sizes

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    /onser(ation /ores

    • S"ecialized cores *orreducing energy• Automatically generated rom hot

    regions o program source

    • 2atching support uture proos )

    • )ully automated toolchain

    • Drop-in replacements or code• ot code implemented by /-/ore'

    cold code runs on host /2

    • ) generation;8) integration

    • &nergy e+cient• p to $# or targeted hot code

    cac+e

    Host

    ,-(&enera* purpose)

    / cac+e

    Hot code

    Cold code

    C-Cor

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    >igure sho!s the pro+ected energysa(ings in GreenDroid and the origino these sa(ings.

     The sa(ings come rom t!o sources

    >irst' c-cores don%t reuireinstruction etch' instructiondecode' a con(entional registerCle' or any o the associatedstructures. Remo(ing thesereduces energy consumption by 5percent.

    • The second source o sa(ings 905J o energy: comes rom thespecialization o the c-cores% datapath.

    • The result is that a(erage per-instruction energy drops rom F$ pKper instruction to +ust L pK per

    instruction.

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    20

    /onclusions

    •H(er the ne#t C(e to $ years' the brea"do!n ocon(entional silicon scaling and the resulting utiliza!ill e#ponentially increase the amount o dar" silicoboth des"top and mobile processors.

    • The GreenDroid prototype demonstrates that c-coa ne! techniue to con(ert dar" silicon into energy

    and increased parallel e#ecution under strict po!erbudgets.

    • The estimate that the prototype !ill reduce processenergy consumption by F$ percent or the code thacores target' and result in an o(erall sa(ings o N.4

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     This the 22T o GreenDroid

    • Than"s >or Do!nloading the 22T or DocumentaGreendroid

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    ere you !ill Cnd the Documentation Greendroid.

    /lic" on the lin" or Documentation

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