5
Flip-chip integration of differential CMOS power amplifier and antenna in PCB technology for the 60-GHz frequency band J.A.G. Akkermans 1 , M.I. Kazim 2 , Y. Yu 3 , M.H.A.J. Herben, P.G.M. Baltus, P.F.M. Smulders Electrical Engineering, Eindhoven University of Technology (TU/e) Eindhoven, The Netherlands 1 [email protected]; 2 [email protected]; 3 [email protected] Abstract— The integration of a CMOS power amplifier (PA) and antenna in printed circuit-board (PCB) technology is inves- tigated. Both the PA and the antenna have a differential design to provide a reliable low-loss interconnect. A PCB package is proposed that enables the implementation of a high-efficiency antenna while providing mechanical rigidity. The interconnection between the PA and the antenna is realised with flip-chip technology. The performance of the package is demonstrated with measurements of the realised antenna gain and radiation patterns. I. I NTRODUCTION The 60 GHz frequency band can be employed to realise the next-generation wireless high-speed communication. The unlicensed bandwidth of about 7 GHz allows for data rates of gigabits-per-second. Moreover, advances in silicon technology allow the realisation of low-cost RF front-end solutions. How- ever, to utilise the potential of this frequency band, low-cost transceiver designs are needed in which antennas, RF front- end and baseband processing are fully integrated. In this work, the integration of a CMOS power amplifier (PA) and antenna in printed circuit-board (PCB) technology is investigated. Both the PA and the antenna have a differential design to provide a reliable interconnect that is low-loss. The PA is realised in 65 nm CMOS technology, has a gain of approximately 8 dB and a 3 dB gain bandwidth that ranges from 54 to 66 GHz. The antenna is a balanced-fed aperture-coupled patch (BFACP) antenna that is optimised for bandwidth and radiation efficiency [1]. The realised bandwidth is 10-15% and the accompanying radiation efficiency is larger than 75%. PCB technology is a mature technology that is low-cost. However, the materials that are used for the realisation of the package should be chosen carefully to obtain good perfor- mance at millimeter-wave frequencies. Moreover, the influence of etching and alignment tolerances should be taken into account to obtain a robust design. Additionally, the flip-chip interconnection between the PA and the PCB needs to be characterised to retain the performance of the PA. II. PACKAGE TOPOLOGY A complete package is realised based on a single PCB stack. For this purpose, the BFACP antenna is very well suited. In the prototypes of the BFACP antennas, the dielectric layers have been realised from teflon-based materials (NY9217 [2], ε r =2.17). The low dielectric constant of this material and NY9217 adhesive adhesive Ro4350B Ro4350B integrated circuit blind via patch slot feed reflector Figure 1: Schematic layout of PCB package with integrated IC and antenna. the inherent surface-wave suppression of the antenna element provides a high radiation efficiency. Although teflon-based materials have good RF performance, they cannot be employed to create a complete package. The disadvantages of teflon-based materials are that they are not very rigid and that they have a large thermal expansion coefficient. Therefore, this material cannot be used for the realisation of a rigid package and the implementation of vias can be difficult because of the relatively large thermal expansion. An improved PCB stack that can function as a package is shown in Fig. 1. The upper layer of this package is realised from teflon-based material to ensure good RF perfor- mance. The lower layers are realised from a glass-reinforced hydrocarbon/ceramic material (Ro4350B [3]). This material is much more rigid compared to teflon-based materials and has low dissipative losses as well. The dielectric constant of this material is specified to be 3.66 at 10 GHz. The lowest dielectric layer of the package is used to provide the package with its mechanical rigidity. The middle layer is a thin layer that is used to create a well-defined RF feed. This layer also allows the realisation of vias, such that the routing of control signals can be simplified. The dielectric layers are laminated together with adhesive layers in between that are tailored for adhesion with these materials. III. MATERIAL CHARACTERISATION The electrical properties of teflon-based materials are well- established owing to their stability over a wide frequency band (up to 100 GHz) [4]. The same needs to be investigated for the Rogers Ro4350B material that is used in the package since the available datasheet specifies its properties up to 10 GHz only. For this purpose, a two-port ring resonator has been designed 2818 Authorized licensed use limited to: Eindhoven University of Technology. Downloaded on June 22, 2009 at 08:53 from IEEE Xplore. Restrictions apply.

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Page 1: Flip-chip integration of differential CMOS power amplifier

Flip-chip integration of differential CMOS power amplifier and

antenna in PCB technology for the 60-GHz frequency band

J.A.G. Akkermans 1, M.I. Kazim 2, Y. Yu 3, M.H.A.J. Herben, P.G.M. Baltus, P.F.M. Smulders

Electrical Engineering, Eindhoven University of Technology (TU/e)

Eindhoven, The [email protected];

[email protected];

[email protected]

Abstract— The integration of a CMOS power amplifier (PA)and antenna in printed circuit-board (PCB) technology is inves-tigated. Both the PA and the antenna have a differential designto provide a reliable low-loss interconnect. A PCB package isproposed that enables the implementation of a high-efficiencyantenna while providing mechanical rigidity. The interconnectionbetween the PA and the antenna is realised with flip-chiptechnology. The performance of the package is demonstratedwith measurements of the realised antenna gain and radiationpatterns.

I. INTRODUCTION

The 60 GHz frequency band can be employed to realise

the next-generation wireless high-speed communication. The

unlicensed bandwidth of about 7 GHz allows for data rates of

gigabits-per-second. Moreover, advances in silicon technology

allow the realisation of low-cost RF front-end solutions. How-

ever, to utilise the potential of this frequency band, low-cost

transceiver designs are needed in which antennas, RF front-

end and baseband processing are fully integrated.

In this work, the integration of a CMOS power amplifier

(PA) and antenna in printed circuit-board (PCB) technology is

investigated. Both the PA and the antenna have a differential

design to provide a reliable interconnect that is low-loss.

The PA is realised in 65 nm CMOS technology, has a gain

of approximately 8 dB and a 3 dB gain bandwidth that

ranges from 54 to 66 GHz. The antenna is a balanced-fed

aperture-coupled patch (BFACP) antenna that is optimised for

bandwidth and radiation efficiency [1]. The realised bandwidth

is 10-15% and the accompanying radiation efficiency is larger

than 75%.

PCB technology is a mature technology that is low-cost.

However, the materials that are used for the realisation of the

package should be chosen carefully to obtain good perfor-

mance at millimeter-wave frequencies. Moreover, the influence

of etching and alignment tolerances should be taken into

account to obtain a robust design. Additionally, the flip-chip

interconnection between the PA and the PCB needs to be

characterised to retain the performance of the PA.

II. PACKAGE TOPOLOGY

A complete package is realised based on a single PCB stack.

For this purpose, the BFACP antenna is very well suited. In

the prototypes of the BFACP antennas, the dielectric layers

have been realised from teflon-based materials (NY9217 [2],

εr = 2.17). The low dielectric constant of this material and

NY9217

adhesive

adhesive

Ro4350B

Ro4350B

integratedcircuit

blind via

patch

slot

feed

reflector

Figure 1: Schematic layout of PCB package with integrated IC andantenna.

the inherent surface-wave suppression of the antenna element

provides a high radiation efficiency.

Although teflon-based materials have good RF performance,

they cannot be employed to create a complete package. The

disadvantages of teflon-based materials are that they are not

very rigid and that they have a large thermal expansion

coefficient. Therefore, this material cannot be used for the

realisation of a rigid package and the implementation of

vias can be difficult because of the relatively large thermal

expansion. An improved PCB stack that can function as a

package is shown in Fig. 1. The upper layer of this package is

realised from teflon-based material to ensure good RF perfor-

mance. The lower layers are realised from a glass-reinforced

hydrocarbon/ceramic material (Ro4350B [3]). This material

is much more rigid compared to teflon-based materials and

has low dissipative losses as well. The dielectric constant of

this material is specified to be 3.66 at 10 GHz. The lowest

dielectric layer of the package is used to provide the package

with its mechanical rigidity. The middle layer is a thin layer

that is used to create a well-defined RF feed. This layer also

allows the realisation of vias, such that the routing of control

signals can be simplified. The dielectric layers are laminated

together with adhesive layers in between that are tailored for

adhesion with these materials.

III. MATERIAL CHARACTERISATION

The electrical properties of teflon-based materials are well-

established owing to their stability over a wide frequency band

(up to 100 GHz) [4]. The same needs to be investigated for the

Rogers Ro4350B material that is used in the package since the

available datasheet specifies its properties up to 10 GHz only.

For this purpose, a two-port ring resonator has been designed

2818Authorized licensed use limited to: Eindhoven University of Technology. Downloaded on June 22, 2009 at 08:53 from IEEE Xplore. Restrictions apply.

Page 2: Flip-chip integration of differential CMOS power amplifier

port 1

via

microstrip ring

gap

microstrip

port 2

Figure 2: Layout of microstrip ring resonator.

CgCg

CpCp Zr

Figure 3: Circuit model of microstrip ring resonator.

(Fig. 2). The resonance frequency of the ring resonator is

directly related to the material properties of the dielectric [5],

since the resonance frequency of the nth parallel resonance of

the unloaded ring resonator is given by

f0,n =cn

L√

εeff

, (1)

where c is the speed of light in vacuum, L is the length of

the ring resonator and εeff is the effective dielectric constant

of the transmission line. From the effective dielectric constant,

the dielectric constant can be determined as well [6] through

the relation

εeff =εr + 1

2+

εr − 1

2

1 + 12 dw

, (2)

where d is the thickness of the dielectric and w is the width

of the microstrip line. The resonances of the ring can be

recognised in the transmission measurement of the two-port

structure that peaks near these frequencies. The attenuation

constant αn of the microstrip line can be determined from the

quality factor of the transmission peak as well [5].

A circuit model of the ring resonator structure can be

used to relate the dielectric constant of the dielectric and

the transmission peaks of the ring resonator (see [5] and

Fig. 3). The transmission peaks do not exactly correspond to

the resonance frequency of the unloaded ring resonator since

the ring is loaded by the microstrip transmission lines. In the

circuit model, this effect is accounted for.

The ring resonator has been designed on a Ro4350B di-

electric with a thickness of 101 µm (4 mil). The length of

the ring has been chosen such that the 4th resonance of the

ring lies close to 60 GHz (L = 11.65 mm). The width of the

microstrip line is 203 µm, and the metal thickness is 25 µm.

This results in a characteristic impedance of Z0 = 50 Ω. The

width of the gap between the microstrip transmission line and

the ring is 90 µm, which is the minimum spacing of the used

PCB manufacturing process. The ring resonator is connected

with ground-signal-ground (GSG) RF probes and is measured

with a two-port measurement. The transition from GSG probe

to microstrip is de-embedded from the measurements. For this

59 60 61 62 63 64 653.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

4

resonance frequency (GHz)

die

lect

ric

const

ant

Figure 4: Dielectric constant as a function of resonance fre-

quency (4th resonance). Circuit model (solid), CST Microwave Studio(crosses). The measured value is depicted in the figure with thedashed lines.

Table I: Measured resonance frequency and 3 dB bandwidth with

accompanying dielectric constant and attenuation up to the 4th reso-

nance of the ring resonator.

n f0,n [GHz] B3dB,n [GHz] εr attenuation [dB/cm]

1 15.24 0.49 3.67 0.382 30.46 0.69 3.66 0.533 45.55 1.0 3.69 0.774 60.42 1.3 3.74 1.0

purpose, through, reflect and line structures have been realised

and measured as well.

From the circuit model, the dielectric constant can be

obtained as a function of resonance frequency. This relation

is shown in Fig 4 for the 4th resonance. To validate the

circuit model, the obtained results are compared with full-wave

simulations that have been performed with CST Microwave

Studio. The discrepancy between the dielectric constants that

are predicted by both models lies within 1%. The measured

resonance frequency is 60.42 GHz, which implies a dielectric

constant of 3.74. As mentioned before, the attenuation can

be determined from the 3 dB bandwidth of the transmission

peak. This bandwidth is 1.3 GHz, which implies an attenuation

constant α = 23 Np/m. The corresponding attenuation of the

microstrip line is 1.0 dB/cm. A similar analysis has been

performed for the other (lower) resonance frequencies as well.

These results are listed in Table I.

IV. PACKAGE PROTOTYPE

To investigate the difficulties associated with the imple-

mentation of a transceiver package that embeds antennas and

electronics, a prototype has been built. This prototype embeds

a power amplifier (PA) integrated circuit (IC) and a BFACP

antenna into one package. A schematic layout of the package

is shown in Fig. 1. The antenna is optimised for this stack

following the approach presented in [7]. The frequency band

of the optimised antenna ranges from 56 to 65 GHz and the

radiation efficiency in this band is larger than 75 % (see Fig. 5).

The PA is realised in 65 nm CMOS technology and is initially

characterised with RF probes that connect directly to the chip.

2819Authorized licensed use limited to: Eindhoven University of Technology. Downloaded on June 22, 2009 at 08:53 from IEEE Xplore. Restrictions apply.

Page 3: Flip-chip integration of differential CMOS power amplifier

Table II: Dimensions of the optimised antenna.

Element Parameter Value

patch length 1.37 mmwidth 1.60 mm

slots length 1.44 mmwidth 0.20 mm

spacing 1.63 mmreflector length 2.13 mm

width 1.00 mmdipole length 2.09 mm

width 0.15 mmfeed width 0.10 mm

spacing 0.12 mm

50 55 60 65 70−25

−20

−15

−10

−5

0

50 55 60 65 700

0.2

0.4

0.6

0.8

1

frequency (GHz)

S11

(dB

)

efficien

cy

Figure 5: Reflection coefficient (solid) and radiation efficiency(dashed) of the optimised antenna. Dimensions in Table II.

The maximum gain of the PA is about 5-8 dB and the 3 dB

gain bandwidth ranges from 54 to 66 GHz.

A. Flip-chip interconnect

To integrate the IC with the antenna, a reliable intercon-

nection needs to be realised. Traditionally, the interconnection

between IC and PCB is realised through wire-bonding, but the

performance of this type of interconnect decreases rapidly for

higher frequencies, because of the large wire inductance that

is associated with the wire-bond (see e.g. [8]). Alternatively,

flip-chip technologies can be employed to provide a better

interconnection, since flip-chip interconnections have lower

and more predictable parasitic inductances [9], [10]. In flip-

chip technology the metallic pads on the IC are connected to a

corresponding set of pads on the PCB using an array of balls

or bumps. These balls or bumps can be realised from solder

or metal like gold and copper [10]. In this demonstrator, gold

stud bumps have been used in combination with an anisotropic

conductive adhesive [11]. First, the gold bumps are placed on

the pads of the IC. Second, the IC is flipped and pushed onto

the PCB. In between the IC and the PCB, an adhesive is placed

that contains silver particles. Because of the applied pressure,

these particles form a conducting path in between the stud

bumps and the PCB pads. A microscopic photograph of the

cross-section of such a flip-chip interconnection is shown in

Fig. 6

stud-bump

silicon die

active die

NiAu finish

copper PCB pad

PCB

Figure 6: Microscopic photograph of the cross-section of a flip-chipinterconnection.

ground VDC

via

RF inputG

G

SS

groundVbias

to antenna

chip pad

RF stub

0 0.5 1 1.5 2 mm

Figure 7: Layout of PA chip mount.

B. Chip mount

The layout of the chip mount is shown in Fig. 7. This

chip mount has been designed such that the pads on the

PCB correspond with the pads of the PA. The input signal

of the PA can be provided through the ground-signal-signal-

ground (GSSG) connection on the PCB. Vias have been used

to connect all the grounds to a large metal plane underneath the

chip mount. The DC supply and bias voltages can be applied

to the PA from the PCB as well. RF stubs have been employed

to suppress the RF signals on the DC supplies. The output of

the PA connects directly to the differential feed of the antenna.

C. Package

The complete package is depicted in Fig. 8. Here, the layout

of each layer can be easily identified. The width and length

of the package is 18 × 28 mm, whereas the total thickness

is 0.82 mm. The used material layers and the corresponding

thicknesses are shown in Table III. The coplanar microstrip

feed connecting the PA and the antenna is constructed such

that it has a ground plane underneath it near the PA and above

it near the antenna. In this way, the characteristic impedance

of the differential feed is close to 100 Ω everywhere.

2820Authorized licensed use limited to: Eindhoven University of Technology. Downloaded on June 22, 2009 at 08:53 from IEEE Xplore. Restrictions apply.

Page 4: Flip-chip integration of differential CMOS power amplifier

Table III: Stack build-up of package prototype. The layers arenumbered from top to bottom.

layer type name εr thickness

1 teflon-based NY9217 2.17 254 µm2 adhesive SpeedBoard C 2.6 112 µm3 ceramic-based Ro4350B 3.74 102 µm4 adhesive Ro4403 3.17 102 µm5 ceramic-based Ro4350B 3.74 254 µm

chip mountdifferential feedDC bias

DC supply

cavity

patch

slot

(a)cavity

patch

ground planewith slots

differential feed

reflector

teflon-basedlaminate

adhesive layer

adhesive layer

chip mount

ceramic

ceramic

ground planeunderneath chip

(b)

Figure 8: Layout of package. (a) Top view. (b) Explored view.

D. Measurements

To characterise the performance of the packaged PA and

antenna (Fig. 9), the performance of the antenna is evaluated

first. Since the antenna has a differential feed, GSSG RF

probes have been used in combination with an external balun

to provide the balanced input signal. The RF probe has

been calibrated with a one-port load-reflect-match (LRM)

calibration. The measured and simulated reflection coefficients

are shown in Fig. 10. It is observed that the matching of the

antenna is below -10 dB in the frequency range from 57.7 to

65.0 GHz. This corresponds well with the gain bandwidth of

the PA that ranges from 54 to 66 GHz.

The performance of the packaged PA and antenna has been

investigated as well. The operation of this package has been

tested on a probe station first (see Fig. 11). A GSSG RF

patch

PA

Figure 9: Photograph of integrated PA and BFACP antena.

50 55 60 65 70−30

−25

−20

−15

−10

−5

0

frequency (GHz)

refl

ecti

on

coef

fici

ent

(dB

)

Figure 10: Reflection coefficient of the packaged BFACP antenna.Measurement (solid), simulation [Spark] (dashed).

PA

GSSG probe

DC bias

DC supply

antenna

Figure 11: Measurement setup of antenna package on probe station.

probe has been used to connect the RF input signal to the

PA. The DC supply and bias voltages have been applied with

DC probes. We compared the gain of the combined PA and

antenna with the gain of the antenna alone (i.e., without PA).

To characterise the radiation pattern of the combined PA and

antenna, wires have been soldered to the DC bias and supply

connections of the package and the radiation patterns are

measured on the far-field radiation pattern measurement setup

[12].

The gain of the antenna alone and the PA-antenna combi-

nation is compared in Fig. 12. It is observed that the gain of

2821Authorized licensed use limited to: Eindhoven University of Technology. Downloaded on June 22, 2009 at 08:53 from IEEE Xplore. Restrictions apply.

Page 5: Flip-chip integration of differential CMOS power amplifier

50 52 54 56 58 60 62 64 66−10

−8

−6

−4

−2

0

2

4

6

8

10

frequency (GHz)

gai

n(d

Bi)

Figure 12: Maximum gain of the packaged BFACP antenna withPA (dashed) and without PA (solid).

−80 −60 −40 −20 0 20 40 60 80−20

−15

−10

−5

0

5

elevation angle (θ)

norm

alis

edra

dia

tion

pat

tern

Figure 13: Measured normalised radiation pattern of packagedantenna and power amplifier. E-plane, frequency f = 60 GHz. Mea-surements of antenna pattern with and without PA (solid), simulatedradiation pattern [CST Microwave Studio] (dashed).

the PA is 0-4 dB lower than the gain of the antenna alone in

the operating range of the antenna (57.7 - 65.0 GHz). This

implies that the RF losses are equal or larger than the gain of

the packaged PA. The main causes for these losses are

• Mismatch

Both the PA and the antenna have been designed for an

input and output impedance of 100 Ω; the presence of the

flip-chip interconnect can distort the matching between

the RF probe and the input of the PA as well as the

matching between the output of the PA and the input of

the antenna. This can result in mismatch which reduces

the gain of the system.

• Interconnection loss

The flip-chip interconnection has been realised with gold

stud-bumps in combination with an anisotropic conduc-

tive adhesive (see Fig. 6). This interconnect introduces

some dissipative losses due to the finite conductivity of

the transition. As a result, the system gain is reduced.

• PA detuning

The PA has been characterised with on-wafer tests. The

performance of the PA can be distorted when it is flip-

chipped onto the package. This can possibly reduce the

gain of the PA.

The normalised radiation patterns are compared in Fig. 13.

It is observed that both measured radiation patterns are very

similar. This indicates that the power is radiated by the antenna

alone and no significant amount of power is radiated by the

RF probe, the PA or the flip-chip transitions. Moreover, it is

observed from Fig. 13 that the radiated patterns are in good

agreement with simulated results.

V. CONCLUSIONS

The integration of a differential CMOS PA and a BFACP

antenna has been investigated. First, a topology has been

proposed for the integration of the BFACP antenna and a

PA. This topology has been designed in detail and the per-

formance of the integrated module has been measured. It has

been demonstrated that the embedded antenna shows good

performance, viz a measured bandwidth that ranges from 57.7

to 65.0 GHz and a maximum gain of 7 dBi. Moreover, it has

been shown that the BFACP antenna can be integrated with a

PA although the gain of the PA-antenna combination is lower

then expected. Possible causes for this reduction in gain have

been discussed and will be a topic for future research.

ACKNOWLEDGMENT

The authors would like to acknowledge Henk Steijvers

(TNO) for his contributions toward flip-chipping as well

as Reza Mahmoudi (TU/e) for providing assistance in the

measurements.

REFERENCES

[1] J. Akkermans, M. van Beurden, and M. Herben, “Design of a millimeter-wave balanced-fed aperture-coupled patch antenna,” in European Conf.

on Antennas and Propagat. (EuCAP06), Nice, France, November 2006,pp. 1–6.

[2] Nelco RF / Microwave circuitry materials, Park Electrochemical Cor-poration, Melville, USA.

[3] RO4000 Series high frequency circuit materials, Rogers Corporation,Chandler, USA.

[4] T. Zwick, A. Chandrasekhar, C. W. Baks, U. R. Pfeiffer, S. Brebels, andB. P. Gaucher, “Determination of the complex permittivity of packag-ing materials at millimeter-wave frequencies,” IEEE Trans. Microwave

Theory Tech., vol. 54, no. 3, pp. 1001–1010, March 2006.[5] J. R. Bray and L. Roy, “Microwave characterization of a microstrip

line using a two-port ring resonator with an improved lumped-elementmodel,” IEEE Trans. Microwave Theory Tech., vol. 51, no. 5, pp. 1540–1547, May 2003.

[6] D. Pozar, Microwave engineering, 3rd ed. Chichester: Wiley, 2005.[7] J. Akkermans and M. Herben, “Sensitivity analysis and optimisation

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(EMTS07), Ottawa, Canada, July 2007.[8] A. Sutono, N. Cafaro, J. Laskar, and M. Tentzeris, “Experimental

modeling, repeatability investigation and optimization of microwavebond wire interconnects,” IEEE Trans. Adv. Packag., vol. 24, no. 4,pp. 595–603, November 2001.

[9] A. Jentzsch and W. Heinrich, “Theory and measurements of flip-chipinterconnects for frequencies up to 100 GHz,” IEEE Trans. Microwave

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New York: Wiley, 2006.[11] J. Jordan, “Gold stud bump in flip-chip applications,” in Int. Electronics

Manufacturing Technol. Sym. IEEE/SEMI International, 2002, pp. 110–114.

[12] J. Akkermans, R. van Dijk, and M. Herben, “Millimeter-wave antennameasurement,” in European Microwave Conf. (EuMC07), Munchen,Germany, October 2007, pp. 83–86.

2822Authorized licensed use limited to: Eindhoven University of Technology. Downloaded on June 22, 2009 at 08:53 from IEEE Xplore. Restrictions apply.