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March 2011
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SF
©20FDM
FDMC8200S Dual N-Channel PowerTrench® MOSFET 30 V, 10 mΩ, 20 mΩ
FeaturesQ1: N-Channel
Max rDS(on) = 20 mΩ at VGS = 10 V, ID = 6 AMax rDS(on) = 32 mΩ at VGS = 4.5 V, ID = 5 A
Q2: N-ChannelMax rDS(on) = 10 mΩ at VGS = 10 V, ID = 8.5 AMax rDS(on) = 13.5 mΩ at VGS = 4.5 V, ID = 7.2 ARoHS Compliant
General DescriptionThis device includes two specialized N-Channel MOSFETs in a due power33(3mm X 3mm MLP) package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous MOSFET (Q2) have been designed to provide optimal power efficiency.
ApplicationsMobile Computing
Mobile Internet Devices
General Purpose Point of Load
ET
11 Fairchild Semiconductor Corporation 1 www.fairchildsemi.comC8200S Rev.C4
BottomBottom
Power33
Pin 1G1
D1D1
D1
D1
D2/S1
G2
S2S2
S2
VINVINVIN
VIN
SWITCH NODE
GLS
GNDGND
GND
GHS4
3
2
1
5
6
7
8 Q 1
Q 2
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Q1 Q2 UnitsVDS Drain to Source Voltage 30 30 VVGS Gate to Source Voltage (Note 4) ±20 ±20 V
ID
Drain Current -Continuous (Package limited) TC = 25 °C 18 13
A -Continuous (Silicon limited) TC = 25 °C 23 46 -Continuous TA = 25 °C 6 1a 8.5 1b
-Pulsed 40 27EAS Single Pulse Avalanche Energy (Note 3) 12 32
PDPower Dissipation for Single Operation TA = 25°C 1.9 1a 2.5 1b
WPower Dissipation for Single Operation TA = 25°C 0.7 1c 1.0 1d
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C
RθJA Thermal Resistance, Junction to Ambient 65 1a 50 1b
°C/WRθJA Thermal Resistance, Junction to Ambient 180 1c 125 1d
RθJC Thermal Resistance, Junction to Case 7.5 4.2
Device Marking Device Package Reel Size Tape Width QuantityFDMC8200S FDMC8200S Power 33 13” 12 mm 3000 units
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.comFDMC8200S Rev.C4
Electrical Characteristics TJ = 25°C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Symbol Parameter Test Conditions Type Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 VID = 1mA, VGS = 0 V
Q1Q2
3030 V
ΔBVDSS ΔTJ
Breakdown Voltage TemperatureCoefficient
ID = 250 μA, referenced to 25°CID = 1mA, referenced to 25°C
Q1Q2 14
13 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V Q1Q2
1500 μA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V Q1Q2 100
100nAnA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μAVGS = VDS, ID = 1mA
Q1Q2
1.01.0
2.32.0
3.03.0 V
ΔVGS(th) ΔTJ
Gate to Source Threshold VoltageTemperature Coefficient
ID = 250 μA, referenced to 25°CID = 1mA, referenced to 25°C
Q1Q2
-5-6 mV/°C
rDS(on) Static Drain to Source On Resistance
VGS = 10 V, ID = 6 A VGS = 4.5 V, ID = 5 A VGS = 10 V, ID = 6 A, TJ = 125°C
Q1162422
203228
mΩVGS = 10 V, ID = 8.5 A VGS = 4.5 V, ID = 7.2 A VGS = 10 V, ID = 8.5 A, TJ = 125°C
Q27.8
10.311.4
10.013.513.1
gFS Forward Transconductance VDD = 5 V, ID = 6 AVDD = 5 V, ID = 8.5 A
Q1Q2
2943 S
Ciss Input Capacitance
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1Q2 495
1080660
1436 pF
Coss Output Capacitance Q1Q2
145373
195495 pF
Crss Reverse Transfer Capacitance Q1Q2
2035
3052 pF
Rg Gate Resistance Q1Q2
0.20.2
1.41.2
4.23.6 Ω
td(on) Turn-On Delay Time Q1VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 ΩQ2VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω
Q1Q2 11
7.62015 ns
tr Rise Time Q1Q2 3.1
1.81010 ns
td(off) Turn-Off Delay Time Q1Q2 35
215634 ns
tf Fall Time Q1Q2 1.3
8.51017 ns
Qg(TOT) Total Gate Charge VGS = 0 V to 10 V Q1VDD = 15 V, ID = 6 A
Q1Q2
7.315.7
1022 nC
Qg(TOT) Total Gate Charge VGS = 0 V to 4.5 V Q1Q2
3.17.2
4.310 nC
Qgs Gate to Source Charge Q2VDD = 15 VID = 8.5 A
Q1Q2 1.8
3 nC
Qgd Gate to Drain “Miller” Charge Q1Q2 1
1.9 nC
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©2011 Fairchild Semiconductor Corporation 3 www.fairchildsemi.comFDMC8200S Rev.C4
Electrical Characteristics TJ = 25°C unless otherwise noted
Drain-Source Diode Characteristics
Notes:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3.Starting Q1: T = 25 °C, L = 1 mH, I = 5 A, Vgs = 10V, Vdd = 27V, 100% test at L = 3 mH, I = 4 A; Q2: T = 25°C, L = 1 mH, I = 8 A, Vgs = 10V, Vdd = 27V, 100% test at L = 3 mH, I = 3.2 A.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
Symbol Parameter Test Conditions Type Min Typ Max Units
VSD Source-Drain Diode Forward VoltageVGS = 0 V, IS = 6 A (Note 2)VGS = 0 V, IS = 8.5 A (Note 2)VGS = 0 V, IS = 1.3 A (Note 2)
Q1Q2Q2
0.80.80.6
1.21.20.8
V
trr Reverse Recovery Time Q1IF = 6 A, di/dt = 100 A/sQ2IF = 8.5 A, di/dt = 300 A/s
Q1Q2
1320
2432 ns
Qrr Reverse Recovery Charge Q1Q2 2.3
151024 nC
a.65 °C/W when mounted on a 1 in2 pad of 2 oz copper
c. 180 °C/W when mounted on a minimum pad of 2 oz copper
b.50 °C/W when mounted on a 1 in2 pad of 2 oz copper
d. 125 °C/W when mounted on a minimum pad of 2 oz copper
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©20FDM
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
Figure 1.
0.0 0.5 1.0 1.5 2.0 2.5 3.00
10
20
30
40VGS = 10 V
VGS = 4 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
VGS = 3.5 V
VGS = 4.5 V
VGS = 6 V
I D, D
RA
IN C
UR
REN
T (A
)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On Region Characteristics Figure 2.
0 10 20 30 400
1
2
3
4
VGS = 3.5 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
NO
RM
ALI
ZED
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E
ID, DRAIN CURRENT (A)
VGS = 4 V
VGS = 4.5 V
VGS = 6 V VGS = 10 V
Normalized On-Resistance vs Drain Current and Gate Voltage
Figure 3. Normalized On Resistance
-75 -50 -25 0 25 50 75 100 125 1500.8
1.0
1.2
1.4
1.6
ID = 6 AVGS = 10 V
NO
RM
ALI
ZED
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E
TJ, JUNCTION TEMPERATURE (oC)
vs Junction TemperatureFigure 4.
2 4 6 8 100
20
40
60
80
100
TJ = 125 oC
ID = 6 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAGE (V)
r DS(
on),
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E (m
Ω) PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
On-Resistance vs Gate to Source Voltage
Figure 5. Transfer Characteristics
2.0 2.5 3.0 3.5 4.0 4.50
10
20
30
40
TJ = 150 oC
VDS = 5 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I D, D
RA
IN C
UR
REN
T (A
)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.2 0.4 0.6 0.8 1.0 1.20.001
0.01
0.1
1
10
40
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
I S, R
EVER
SE D
RA
IN C
UR
REN
T (A
)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Source to Drain Diode Forward Voltage vs Source Current
11 Fairchild Semiconductor Corporation 4 www.fairchildsemi.comC8200S Rev.C4
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©20FDM
Figure 7.
0 2 4 6 80
2
4
6
8
10ID = 6 A
VDD = 10 V
VDD = 15 V
V GS,
GA
TE T
O S
OU
RC
E VO
LTA
GE
(V)
Qg, GATE CHARGE (nC)
VDD = 20 V
Gate Charge Characteristics Figure 8.
0.1 1 10 3010
100
1000
f = 1 MHzVGS = 0 V
CA
PAC
ITA
NC
E (p
F)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
Capacitance vs Drain to Source Voltage
Figure 9.
0.01 0.1 1 71
2
3
4
5678
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE (ms)
I AS,
AVA
LAN
CH
E C
UR
REN
T (A
)
Unclamped Inductive Switching Capability
Figure 10.
25 50 75 100 125 1500
5
10
15
20
25
Limited by Package
RθJC = 7.5 oC/W
VGS = 4.5 V
VGS = 10 V
I D, D
RA
IN C
UR
REN
T (A
)
Tc, CASE TEMPERATURE (oC)
Maximum Continuous Drain Current vs Case Temperature
Figure 11. Forward Bias Safe Operating Area
0.01 0.1 1 10 1002000.01
0.1
1
10
50
10 s1 s
DC
100 ms
10 ms
1 ms
100 us
I D, D
RA
IN C
UR
REN
T (A
)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS LIMITED BY rDS(on)
SINGLE PULSETJ = MAX RATEDRθJA = 125 oC/WTA = 25 oC
0.01 0.1 1 10 1002000.001
0.01
0.1
1
10
100
10 s1 s
DC
100 ms10 ms1 ms
100 us
I D, D
RA
IN C
UR
REN
T (A
)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS LIMITED BY rDS(on)
SINGLE PULSETJ = MAX RATEDRθJA = 180 oC/WTC = 25 oC
Figure 12.
0.001 0.01 0.1 1 10 100 10000.1
1
10
100
SINGLE PULSERθJA = 125 oC/WTA = 25 oC
VGS = 10 V
P(PK
), PE
AK
TR
AN
SIEN
T PO
WER
(W)
t, PULSE WIDTH (sec)
Single Pulse Maximum Power Dissipation
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
11 Fairchild Semiconductor Corporation 5 www.fairchildsemi.comC8200S Rev.C4
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©20FDM
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
PDM
t1t2
NOTES:DUTY FACTOR: D = t1/t2PEAK TJ = PDM x ZθJC x RθJc + TC
10-4 10-3 10-2 10-1 1 10 100 10000.003
0.01
0.1
1
SINGLE PULSERθJA = 180 oC/W
DUTY CYCLE-DESCENDING ORDER
NO
RM
ALI
ZED
TH
ERM
AL
IMPE
DA
NC
E, Z
θJA
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5 0.2 0.1 0.05 0.02 0.01
2
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
11 Fairchild Semiconductor Corporation 6 www.fairchildsemi.comC8200S Rev.C4
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©2011 Fairchild Semiconductor Corporation 7 www.fairchildsemi.comFDMC8200S Rev.C4
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted
Figure 14. On- Region Characteristics Figure 15. Normalized on-Resistance vs Drain Current and Gate Voltage
Figure 16. Normalized On-Resistance vs Junction Temperature
Figure 17. On-Resistance vs Gate to Source Voltage
Figure 18. Transfer Characteristics Figure 19. Source to Drain Diode Forward Voltage vs Source Current
0.0 0.5 1.0 1.50
9
18
27
VGS = 3.5 V
VGS = 3 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
VGS = 4.5 VVGS = 4 V
VGS = 10 V
I D, D
RA
IN C
UR
REN
T (A
)
VDS, DRAIN TO SOURCE VOLTAGE (V)0 9 18 27
1
2
3
4
VGS = 3.5 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
NO
RM
ALI
ZED
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E
ID, DRAIN CURRENT (A)
VGS = 4 V
VGS = 4.5 V
VGS = 3 V
VGS = 10 V
-75 -50 -25 0 25 50 75 100 125 1500.8
1.0
1.2
1.4
1.6
ID = 8.5 AVGS = 10 V
NO
RM
ALI
ZED
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E
TJ, JUNCTION TEMPERATURE (oC)2 4 6 8 10
0
20
40
60
80
100
TJ = 125 oC
ID = 8.5 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAGE (V)
r DS(
on),
DR
AIN
TO
SO
UR
CE
ON
-RES
ISTA
NC
E (m
Ω) PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1.0 1.5 2.0 2.5 3.0 3.5 4.00
9
18
27
TJ = 150 oC
VDS = 5 V
PULSE DURATION = 80 μsDUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I D, D
RA
IN C
UR
REN
T (A
)
VGS, GATE TO SOURCE VOLTAGE (V)0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
30
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
I S, R
EVER
SE D
RA
IN C
UR
REN
T (A
)
VSD, BODY DIODE FORWARD VOLTAGE (V)
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©2011 Fairchild Semiconductor Corporation 8 www.fairchildsemi.comFDMC8200S Rev.C4
Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted
Figure 20. Gate Charge Characteristics Figure 21. Capacitance vs Drain to Source Voltage
Figure 22. Unclamped Inductive Switching Capability
Figure 23. Maximum Continuous Drain Current vs Case Temperature
Figure 24. Forward Bias Safe Operating Area
Figure 25. Single Pulse Maximum PowerDissipation
0 2 4 6 8 10 12 14 160
2
4
6
8
10ID = 8.5 A
VDD = 20 VVDD = 10 V
V GS,
GA
TE T
O S
OU
RC
E VO
LTA
GE
(V)
Qg, GATE CHARGE (nC)
VDD = 15 V
0.1 1 10 3010
100
1000
3000
f = 1 MHzVGS = 0 V
CA
PAC
ITA
NC
E (p
F)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
0.01 0.1 1 10 301
10
20
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE (ms)
I AS,
AVA
LAN
CH
E C
UR
REN
T (A
)
25 50 75 100 125 1500
3
6
9
12
15
Limited by package
VGS = 4.5 V
RθJA = 50 oC/W
VGS = 10 V
I D, D
RA
IN C
UR
REN
T (A
)
TA, CASE TEMPERATURE (oC)
0.01 0.1 1 10 1002000.01
0.1
1
10
50
10 s1 s
DC
100 ms
10 ms
1 ms
100 us
I D, D
RA
IN C
UR
REN
T (A
)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS LIMITED BY rDS(on)
SINGLE PULSETJ = MAX RATEDRθJA = 125 oC/WTA = 25 oC
0.001 0.01 0.1 1 10 100 10000.1
1
10
100
SINGLE PULSERθJA = 125 oC/WTA = 25 oC
VGS = 10 V
P(PK
), PE
AK
TR
AN
SIEN
T PO
WER
(W)
t, PULSE WIDTH (sec)
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted
Figure 26. Junction-to-Ambient Transient Thermal Response Curve
10-4 10-3 10-2 10-1 1 10 100 10000.001
0.01
0.1
1
SINGLE PULSERθJA = 125 oC/W(Note 1b)
DUTY CYCLE-DESCENDING ORDER
NO
RM
ALI
ZED
TH
ERM
AL
IMPE
DA
NC
E, Z
θJA
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5 0.2 0.1 0.05 0.02 0.01
2
PDM
t1t2
NOTES:DUTY FACTOR: D = t1/t2PEAK TJ = PDM x ZθJC x RθJC + TC
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©2011 Fairchild Semiconductor Corporation 9 www.fairchildsemi.comFDMC8200S Rev.C4
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©2011 Fairchild Semiconductor Corporation 10 www.fairchildsemi.comFDMC8200S Rev.C4
SyncFET Schottky body diode Characteristics
Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 14 shows the reverses recovery characteristic of the FDMC8200S.
Schottky barrier diodes exhibit significant leakage at high tem-perature and high reverse voltage. This will increase the power in the device.
Figure 27. FDMC8200S SyncFET body diode reverse recovery characteristic
0 20 40 60 80 100-2
-1
0
1
2
3
4
5
6
7
di/dt = 300 A/μs
CU
RR
ENT
(A)
TIME (ns)
Figure 28. SyncFET body diode reverses leakage versus drain-source voltage
0 5 10 15 20 25 300.000001
0.00001
0.0001
0.001
0.01
TJ = 125 oC
TJ = 100 oC
TJ = 25 oC
I DSS
, REV
ERSE
LEA
KA
GE
CU
RR
ENT
(A)
VDS, REVERSE VOLTAGE (V)
Typical Characteristics (continued)
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©2011 Fairchild Semiconductor Corporation 11 www.fairchildsemi.comFDMC8200S Rev.C4
Dimensional Outline and Pad Layout
FDM
C8200S D
ual N-C
hannel PowerTrench
® MO
SFET
©2011 Fairchild Semiconductor Corporation 12 www.fairchildsemi.comFDMC8200S Rev.C4
TRADEMARKSThe following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used here in:1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONSDefinition of Terms
AccuPower™Auto-SPM™AX-CAP™*Build it Now™CorePLUS™CorePOWER™CROSSVOLT™CTL™Current Transfer Logic™DEUXPEED®
Dual Cool™EcoSPARK®
EfficentMax™ESBC™
Fairchild®
Fairchild Semiconductor®FACT Quiet Series™FACT®
FAST®
FastvCore™FETBench™FlashWriter® *FPS™
F-PFS™FRFET®
Global Power ResourceSM
Green FPS™Green FPS™ e-Series™Gmax™GTO™IntelliMAX™ISOPLANAR™MegaBuck™MICROCOUPLER™MicroFET™MicroPak™MicroPak2™MillerDrive™MotionMax™Motion-SPM™mWSaver™OptiHiT™OPTOLOGIC®
OPTOPLANAR®®
PDP SPM™
Power-SPM™PowerTrench®
PowerXS™Programmable Active Droop™QFET®
QS™Quiet Series™RapidConfigure™
Saving our world, 1mW/W/kW at a time™SignalWise™SmartMax™SMART START™SPM®
STEALTH™SuperFET®
SuperSOT™-3SuperSOT™-6SuperSOT™-8SupreMOS®
SyncFET™Sync-Lock™ ®*
The Power Franchise®
The Right Technology for Your Success™®
TinyBoost™TinyBuck™TinyCalc™TinyLogic®
TINYOPTO™TinyPower™TinyPWM™TinyWire™TriFault Detect™TRUECURRENT®*μSerDes™
UHC®
Ultra FRFET™UniFET™VCX™VisualMax™XS™
tm
®
tm
tm
Datasheet Identification Product Status Definition
Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
Preliminary First ProductionDatasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.
Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
ANTI-COUNTERFEITING POLICYFairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support.Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
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