Exploring New Channel Materials for Nanoscale CMOS Devices: A Simulation Approach

8/10/2005 PhD Defense, Anisur Rahman 1

Exploring New Channel Materials Exploring New Channel Materials for Nanoscale CMOS Devices: A for Nanoscale CMOS Devices: A

Simulation ApproachSimulation Approach

PhD Final Examination

Anisur Rahman

PhD Co-Advisors: Professor Mark Lundstrom and Professor Gerhard Klimeck

School of Electrical and Computer EngineeringPurdue University, West Lafayette, IN 47907


Doctoral Advisory Committee:Doctoral Advisory Committee:• Professor Supriyo Datta (ECE)• Professor Ron Reifenberger (Physics)• Dr. Avik Ghosh (ECE)

Present Colleagues:Present Colleagues:• Dr. Diego Kienle• Dr. Jing Wang• Sayed Hasan• Neophytos Neophytou• Siyu Koswatta

Former Colleagues:Former Colleagues:• Dr. Zhibin Ren (IBM) • Dr. Ramesh Venugopal (TI)• Dr. Jung-Hoon Rhew (Intel)• Asst. Prof. Jing Guo (Univ. of Florida)

AcknowledgementsAcknowledgements

Funding:Funding: SRC and MARCO/FCRP-MSD


Outline:Outline:

• Background• Objective• Generalized Effective-mass Approach

• Assessment of Ge n-MOSFETs

• A Top-of-the-barrier Ballistic Model• Semi-empirical Tight-binding Approach

• Tight-binding Application: UTB DG CMOS• Tight-binding Application: Self-consistent Electrostatics

• Summary• Future Work

Chapter 1

Chapter 2Chapter 3

Chapter 4

Chapter 5Chapter 6

Chapter 7

Chapter 8


Background: CMOS ScalingBackground: CMOS ScalingHistorical Development:Historical Development:

• Four decades of steady scaling

• Present day MOSFETs are nanoscale (LG~30nm)

• Scaling is motivated by performance and

integration density issues

• Moore’s Law describes this steady growth

• ITRS guides the future scaling trends

Scaling Challenges:Scaling Challenges:

• Implementation of Moore’s law becoming challenging

• Off-state leakage limits scaling of planar CMOS

• Additional gates needed to curb SCE (dual/tri-gate)

• Gate oxide scaling reached the limit (direct tunneling)

• High-κ dielectric + metal gate in near future

• Interface properties of Si-SiO2 becoming less critical

Moore’s LawMoore’s Law

65nm Node Deviecs65nm Node DeviecsLLGG=35nm=35nm


Background: New MaterialsBackground: New Materials

Motivation for Novel Materirals:Motivation for Novel Materirals:

• Ge and III-V display very high mobility,

saturation velocity, and scattering

mean-free path

• New process technology allows high-

quality

channel-insulator interface

• Ultra-high-speed, very-low-power

logic

application

• Experimental research is underwayKey Device Physics Issues:Key Device Physics Issues:

• Treatment of quantum mechanical

effects

• Trade-off between high velocity and low

DOS

• Atomic level fluctuation become

significant

• Full-band treatment become necessary

Qtop vinj

Current=Qtop X vinj

Qtop=CG(VG-VT) where, CG<COX

Source

Drain

Current CalculationCurrent Calculation

Si GeGaA

sInAs InSb

Electron, μn

(cm2/V-sec)600

>1000

4600

20000

30000

Vsat

(107cm/sec)

1.0 -- 1.2 3.5 5.0

MFP (nm) 28 -- 80 194 226

Electron Transport PropertyElectron Transport Property

Ashley et al., ICSICT 2004


Objective:Objective:

For New Channel Material Nanoscale CMOS Devices:For New Channel Material Nanoscale CMOS Devices:

• Develop simulation tools and theoretical approaches

• Perform design studies, assess performance limits, and

explore

scaling characteristics

• Investigate relevance of carrier mobility

• Identify key bandstructure related issues

• Provide an improved understanding of their operation.Theoretical Approaches:Theoretical Approaches:

• Effective-mass-equation based quantum transport using NEGF

formalism

for novel-channel material n-MOSFETs

• Atomistic tight-binding approach for incorporating bandstructure

effects in

deeply scaled ballistic n- and p-MOSFETs


Outline:Outline:





• Summary and Conclusion• Future Work

Chapter 2Chapter 3


Theory: Effective Mass Theory: Effective Mass ApproachApproach

Bottom Gate1k

2k

3k

Source DrainTop Gate

Channel

Device Device

1k

2k3k

CrystalCrystal

1 1 111 12 13

1 1 121 22 231 1 1

31 23 33

m m m

m m m

m m m

22 23 3

1 1

22 2

i ji

i i j iii ij

k kkE

m m

1

1

1

l

t

t

m

m

m

2 2 2 21 2

2 2l t

k k kE

m m

2k

1k

2k

EllipseEllipseKey Features of EMA:Key Features of EMA:

• Most widely used approach for n-

MOSFETs

• Very successful to treat quantum

transport

in (100) Si n-MOSFETs

• NEGF and mode-space decomposition

of the

transport problem is highly efficient

Outstanding Issue:Outstanding Issue:

When DCS and ECS are not

aligned, EMT is a full 3X3 matrix

and solution of EME is very difficult

in 1 2 3, ,E k k kj jk i x

Effective Mass Equation (EME)


Theory: Generalized Effective Theory: Generalized Effective MassMass

X

Y

Z

33 331 2

31 23

m mi k k zm m

CU e

1

2122

mi k xm

TU e

Z

X

Y

Z

X

Y

Unitary transformations conserves density of states and group velocity


Results: Ge n-MOSFETsResults: Ge n-MOSFETs

VD = 0.4 V

Si (001)/[100]

Ge (001)/[100]

Ge (111)/[110]

IDS [μA/μm]

Ballistic NEGF IBallistic NEGF IDD-V-VGG Ballistic NEGF IBallistic NEGF IDD-V-VDD

VG = 0.4 V

IDS [μA/μm]

Valley Deg.

(4)

(2)(1)

Simulation Setup:Simulation Setup:

• End of ITRS 2001 UTB DG Ge n-MOSFETs

• NEGF ballistic and scattering simulation

• Design study performed

• nanoMOS 2.5 modified to treat Ge n-MOSFETs

• Ge devices on (100) and (111) wafers

• Process variation and mobility effects examined

S DCh

LG

Lul Lul

NSD NSD

LT=LG+2Lul

Doping Density Profile

EOT=0.6nm

Rahman et al., IEDM 2003


IOFF [μA/μm]

Gate Length, LG [nm]

W/C device

Thinbody

Thickbody

VD = 0.4 V; VG = 0 V

Nominaltbody = 2.5 nm

tbody

Energy

YSensitivity to process variation

Results: Ge n-MOSFETsResults: Ge n-MOSFETs

VG = VD = 0.4V

IDS [μA/μm]

ch=300cm2/V-sec

S/D mobility, SD [cm2/V-sec]

ITRS 2016

Ballistic

limitch=1000cm2/V-sec

S DCh

NSD NSD

μSD μSDμCh

NEGF Scattering


Outline:Outline:





• Summary and Conclusion• Future Work

Chapter 4


Top-of-the-Barrier Ballistic Top-of-the-Barrier Ballistic ModelModel

Source Drain

FSFD

Gate Electrostatics

S DCh

Top Gate

Bottom Gate

VDVS

VG COX

CS CD

CQ

Circuit Model for 2-D Circuit Model for 2-D ElectrostaticsElectrostatics

UTB DG Model DeviceUTB DG Model Device

Key Features:Key Features:

• Semiclassical ballistic transport

• Poisson equation solved only at top-of-barrier

• Quantum capacitance, CQ, treated

• Treats arbitrary bandstructure

• Treats floating source potential

• Two carrier fluxes, FS and FD present

• Sum of carrier density in FS and FD is total charge

• Difference of current from FS and FD is net current

Rahman et al., TED, 2003


Outline:Outline:






Chapter 5


Theory: Tight-bindingTheory: Tight-binding

a

(001)

(100)

(010)

(111)

(110)

Key Features: Localized atomic orbital-like basis

set

Suitable for modeling

nanostructures

Correct full bandstructure

Strain, hetero-channel, novel

materials

Two FCC Lattices — Red and Blue

DrainChannelSource

Device — Ultra-thin Body Symmetric Dual-gate MOSFET

Challenges: Appropriate TB model

Finite dimensional

systems

Remove surface states

Treat electrostatics

Sparse matrix

techniques

Computing I-V


NN-sp3s*

5 orbitalsNN-sp3d5s*

10 orbitals

Silicon CB ΔEc = +100meV

Vogl NEMO

“Well-behaved” TB Parameter Set

• Manageable size — two

center integrals

• Correct bandgap and

effective masses

• Scalable for strained

materialsBoykin et al.,

PRB 69(11), 2004

Approach: A Good TB ModelApproach: A Good TB Model


Approach: Band BendingApproach: Band Bending

Transport

Potential Charge

Poisson

Charge Potential

Self-consistenceSelf-consistence

Calculate Bandstructure

Bulk/HOIMOSFETs

UTBMOSFETs

VG

EV

EC

nZ atoms

TB Domain

Poisson Domain

VG

EV

EC

nZ atomsTB Domain

VG

Band bending along thickness is less important in UTB.

Band bending along thickness is important in bulk/HOI devices.


Outline:Outline:




• Tight-binding Application: UTB DG CMOS• Validity of single band parabolic E-k in Ge n-MOSFETs• Compare Si, Ge, GaAs, InAs as channel materials

• Tight-binding Application: Self-consistent Electrostatics


Chapter 6


ΔEc=300meV

Bulk Ge Bandstructure:Bulk Ge Bandstructure:

• The CB Δ, Λ, Г within

250meV.

• Parabolic E-k valid at low

energy

• Quantum confinement

can

alter the order of the

bands.

NN-sp3d5s*-SO

ΔEc=170meV

Red-Eff. mass Black-TB

Study: Validity of Parabolic E-k in Study: Validity of Parabolic E-k in GeGe

Simulation SetupSimulation Setup:

• Validity of parabolic E-k in UTB

unstrained Ge n-MOSFET examined

• 20 band sp3d5s*-SO TB used

• Three thicknesses: 16nm, 4nm, 2nm

• Band bending not treated

• I-V calculated from top-of-barrier model

Rahman et al., IEDM 2004


Results: Thick Body Limit Results: Thick Body Limit (16nm)(16nm)

1 2 3

2D E-k~ 16nm (113 atomic layers) Ge bodySize of H ~ 2200 X 2200Electrostatic potential not treated(100) wafer quantization along [100]Conduction band subbandsNon-parabolicity important at high energyI-V shown for (001)/[100] device

12

3

2D DOS Ballistic I-V

VT not adjusted

VDS = 0.4V

[110] [100]

L

XГ


Results: Going Thinner (4nm)Results: Going Thinner (4nm)

VT not adjusted

25% lower ION for

eff. mass

ΔVT=55 meV

~ 4nm (30 atomic layers) Ge

body

Size of H ~ 600 X 600

Conduction band Subbands

L and Г- Valleys came closer

Non-parabolicity affects ground

state

Ge (001)/[100] device

VT shifted by 55 meV (not

adjusted)

1 2 3[110] [100]

2D E-k

2 31

ΔVT

2D DOS

VDS = 0.4V

Ballistic I-V

L

XГ


123

1

23 VT adjusted

2D E-k

2D DOS15%

higher ION for

eff. mass

ΔVT=570 meVΔVT

~ 2nm (12 atomic layers) Ge body

Size of H ~ 240 X 240

Conduction band Subbands

At Г, X Valleys form ground state

Strong non-parabolicity affects L-

valleys

VT shifted by 570 meV (adjusted)

[110] [100]

Ballistic I-V

Results: Extreme Scaling Results: Extreme Scaling (2nm)(2nm)

L

XГ


Outline:Outline:




• Tight-binding Application: UTB DG CMOS• Validity of single band parabolic E-k in Ge n-MOSFETs• Compare Si, Ge, GaAs, InAs as channel materials

• Tight-binding Application: Self-consistent Electrostatics


Chapter 6


Study: New Channel MaterialsStudy: New Channel Materials

Energy, [eV]

Si

Ge

Eeff = 1.3eV

Eeff=1.04eV

GaAs

InAs

Eeff=1.72eV

Eeff=0.78eV

Energy, [eV]

Group IVGroup IV

Group III-VGroup III-V

Objective:Objective:To explore and compare scaling characteristics of CMOS with Si, Ge, GaAs, InAs as channel materials.


• 2016 device specification from ITRS 2004

(22nm HP)

• UTB DG with, body: 19 AL (~2.5nm),

EOT=0.5nm

• Unstrained material

• Semiclassical, top-of-barrier, ballistic model

Bandstructure:Bandstructure:

• CB and VB split into subbands

• Quantum confinement increase effective band gap

• Very high vinj expected for III-V

• Lowest CB are X2(Si), L4(Ge), Г1(GaAs, InAs)

• Si and Ge display higher CB DOS compared to III-VRahman et al., to appear in IEDM 2005.


Results: New Channel Results: New Channel MaterialsMaterials

GeGe

SiGaAsInAs

ID-VDDevice: Deeply scaled body (19AL)

and oxide (0.5nm)

Ballistic IBallistic IDD-V-VDD::• Ge performs best (n or p-FET)• GaAs or InAs cannot compete with Si or Ge• InAs n-FETs performs worst

GaAs

InAs

GeSi

vinj-VG

Injection velocity, vInjection velocity, vinjinj vs. V vs. VGG::

• Very high vinj for III-V materials

• Electron vinj in InAs is highest, as expected

• Beyond 0.4V, GaAs vinj drops (Г→L transfer)

GeSi

GaAs

InAs

Qtop-VG

Carrier density, QCarrier density, Qtoptop vs. V vs. VGG::

• Ge: High CB DOS is key to its success

• InAs: Electron Qtop and CG is strongly degraded

• Beyond 0.4V, CG in GaAs improves (Г→L transfer)

Low CB DOS strongly degrades deeply scaled III-V device performances


tox=0.5nm

Ge

InAs

Si

GaAs

tox=0.5nm Ge

InAs

Si

GaAs

Ge

InAs

SiGaAs

tox=0.5nm

Thin OxideThin Oxide

Thin EOT + Thick Body (Small Thin EOT + Thick Body (Small CCQQ/C/COXOX):):

• Ge n-MOSFETs perform best

• Qtops in III-V suffer, CG strongly degraded

tox=1.0nm

Results: New Channel Results: New Channel MaterialsMaterials

Si

GeInAs & GaAs

Ge

InAs

Si

GaAs

tox=1.0nm

Ge

InAs

Si

GaAs

IIDD-V-VDD

QQtoptop-V-VGG

tox=1.0nm

vvinjinj-V-VGG

Thick OxideThick OxideEffects of ratioEffects of ratio CCQQ/C/COXOX explored:explored:

• 100 AL (~15nm) body thickness

• Only n-MOSFETs treated

• Ballistic transport using top-of-barrier model

• Less QC effect, subbands closely separated

• Thick body increase 2D DOS, consequently, CQ

• EOT =1.0nm, and 0.5nm (thin) considered.

Thick EOT + Thick Body (Large Thick EOT + Thick Body (Large CCQQ/C/COXOX):):

• III-V n-MOSFETs perform best

• Silicon performs worst (slow X4 valleys)


Outline:Outline:





• Mobility behavior in strained bulk p- and n- MOSFETs• Hole density profile in HOI structure


Chapter 7


Study: Strained Bulk p-Study: Strained Bulk p-MOSFETsMOSFETs

SiSi

Source

Drain

Si

UnstrainedUnstrained

SiGe

Si SiSi

Source

Drain

Substrate InducedSubstrate InducedBiaxial TensionBiaxial Tension

SiGe

Drain

SiGe

Si

Source

Process InducedProcess InducedUniaxial CompressionUniaxial Compression

Rim et al. (Biaxial) 2002

Rim et al. (Biaxial)

1995

Universal Hole Mobility(Unstrained)

Mob

ilit

y [

cm

2/V

-sec]

Eeff [MV/cm]

Intel 90 nm(Uniaxial)

Experimental Hole MobilityExperimental Hole MobilityOverview:Overview:• Devices on (100) wafers• Strain can be substrate-induced (biaxial)

or

process-induced (uniaxial)• Strain deforms crystal by changing bond

lengths

and bond orientations• Biaxial tensile strain: Hole mobility

improves

at low gate bias but disappears at high bias• Uniaxial compressive strain: Hole

mobility

improvement at low VG retained at high VG

Thompson et al., TED 04


Top VB HH

Second VB LH

Unstrained

Strained

Consequence of Strain: Consequence of Strain: spsp33dd55ss**-SO-SO

Unstrained Bulk Si VBUnstrained Bulk Si VB

Strained Bulk Si VBStrained Bulk Si VB


Results: Strained Bulk p-Results: Strained Bulk p-MOSFETsMOSFETs

and High VG

Ballistic IBallistic IONON Ratio vs. E Ratio vs. Eeffeff

Rim et al. (Biaxial) 2002

Rim et al. (Biaxial)

1995

Universal Hole Mobility(Unstrained)

Mob

ilit

y [

cm

2/V

-sec]

Eeff [MV/cm]

Intel 90 nm(Uniaxial)

Experimental Hole MobilityExperimental Hole Mobility

• Bulk p-FETs: Self-consistent sp3d5s*-SO TB

approach

• Low VG: Top VB LH for both uniaxial and

biaxial

• High VG: Top VB HH for biaxial, LH for

uniaxial

• QC nullify strain splitting of LH,HH in biaxial

case

• Ballistic simulation explains mobility behavior

in

strained p-MOSFETs

2D E-k, Low VG

Eeff=q(Ndep+p/3)/εSi


Study: Strained Bulk n-MOSFETsStudy: Strained Bulk n-MOSFETs

Ballistic n-MOSFETsBallistic n-MOSFETs

Eeff=q(Ndep+p/2)/εSi

SiGe

Drain

SiGe

Si

Source

Process InducedProcess InducedUniaxial TensionUniaxial TensionMobility Behavior in n-MOSFETs:Mobility Behavior in n-MOSFETs:

• Experimentally, both substrate-induced biaxial-

tension and process-induced uniaxial-tension

improves electron mobility

• Electronic mobility enhancement is observed over

the

entire range of gate bias

• Such mobility enhancement is often explained in

terms

of degeneracy removal of X2 and X4 valleys, which

is

recently questioned (Fischetti et al., JAP, 2002.)

Simulation Setup and Observation:Simulation Setup and Observation:

• Self-consistent sp3d5s*-SO TB model and the top-of-

barrier ballistic model does not show any

enhancement

of strained device performance

• Bandstructure alone cannot explain the electronic

mobility enhancement in strained planar n-MOSFETs


Outline:Outline:





• Mobility behavior in strained bulk p- and n- MOSFETs• Hole density profile in HOI structure


Chapter 7


ε-Si (y=0.24)

ε-Si (y=0.24)

ε-Si0.5Ge0.5

TOX

BOX

Biaxial tensile

Biaxial tensile

Biaxial compressiv

e

30 AL~ 4 nm

30 AL~ 4 nm

21 AL~ 3 nm

E

EV EC


• The 20 band sp3d5s*-SO TB model with

self-

consistent electrostatics.

• Compressively strained Si0.5Ge0.5

sandwiched

between two Si layers under tensile

strain.

• Top and bottom oxides are 2 nm and 10

nm

thick, respectively.

Heterostructure on Insulator Heterostructure on Insulator ((HOIHOI))

• Utilizes the high mobility central SiGe

channel to improve hole mobility

• Band discontinuity moves holes to

center

• Band bending due to VG rearranges

hole

profile

Buried Oxide

Poly-Si

ε-Siε-SiGe

Hoyt Group (MIT)

Schematic Representation

Study: Hole Profile in HOIStudy: Hole Profile in HOI


Results: HOIResults: HOI

BOXSi/SiGe/Si

Hole ProfileHole ProfileVB ProfileVB Profile

BOX

Si/SiGe/Si

BOXSi/SiGe/Si

Observations:Observations:

• Tri-layer (Si-SiGe-Si) structure

• tOX= 2 nm(top), tOX=10 nm(bot)

• Low VG: band discontinuity

moves holes to central channel.

• High VG: hole profile moves

near the surface.

Q-VQ-VGG

EF = 0.45 eV

EF = 0.45 eV

EF = 0.45 eV


Outline:Outline:






Chapter 8


Summary:Summary:

• Effective mass approach extended to treat n-MOSFETs on arbitrary

wafer

orientations.

• An NEGF study of LG=10nm end of ITRS Ge n-MOSFET reveals that:

• Ge (001)/[100] device performs best and can meet target

ION

• Gate under-lap improves short-channel-effects

• High mobility in the S/D region is crucial to limit RS

degradation

• A strict process tolerance in body thickness necessary to

limit VT fluctuation across the chip.

• A physics based top-of-the-barrier semiclassical ballistic transport

model

developed and its application demonstrated.

Continued to next slide


Summary (cont.):Summary (cont.):• A semi-empirical 20 band sp3d5s*-SO TB model used to assess strained

and

unstrained UTB novel channel material CMOS devices, and was reveled

that:

• Ge n-MOSFETs: Below 4nm thickness, use of single band

parabolic E-k is limited by non-parabolicity. Below 2nm thickness,

its use is further limited by band reordering and multi-valley

conduction.

• A trade-off exists between high vinj and low DOS. III-V devices

outperform Si or Ge n-MOSFETs only for thick body and thick EOT.

For deeply scaled devices Ge displays the best ballistic

performances.

• Self-consistent gate electrostatics was treated in sp3d5s*-SO TB model

and was revealed that:

• Experimental hole mobility behavior in strained planar p-

MOSFETs can be explained by bandstructure modulation. Similar

behavior for electron mobility in n-MOSFETs cannot be explained by

bandstructure alone.

• HOI simulation shows that at high gate field, the hole-profile

moves near the surface and not at the central high-mobility SiGe

layer.


Future WorkFuture Work

1. Separate the effects of bandstructure and scattering in published

experimental mobility data

2. Discretize the TB Hamiltonian for arbitrarily oriented wafers—Only

(100) wafers treated here

3. Mode-space representation of TB Hamiltonian for UTB MOSFETs—A

full 2D representation is not feasible, computationally

4. Employ zone-unfolding technique to treat SRS and random alloy

effects

5. Employ self-consistent TB approaches for III-V HEMT and QWFET

devices— Ballistic simulation is more relevant here due to their

very high mobility

Documents

Exploring New Channel Materials for Nanoscale CMOS Devices: A Simulation Approach