Experiment 1 digital

UINVERSITY OF BAHRAIN

COLLEGE OF ENGINEERING

DEPARTMENT OF ELECTRICAL & ELECTRONIC ENGINEERING

EEG 251: Digital Systems

EXPERIMENT #1

INDIVIDUAL LOGIC GATES

DONE BY

SUBMITTED TO

EBRAHIM MOHAMMED JASSIM – 20043389

Tayeba Iqubal

Objective:

The goal of this experiment is to understand and verify the functions of the NOT (inverter), AND, NAND, OR, NOR, XOR, XNOR gates, also to be familiar with the digital trainer and the other lab equipments.

Introduction:

In this experiment the TTL integrated circuits (IC) is used to apply the functions of the simple logic gates. In order to determine the pin assignments for the used logical elements you must refer to the given data sheet.

Equipment and components:

Digital trainer

74LS00 x 1, 74LS02 x 1, 74LS04 x 1, 74LS08 x 1, 74LS32 x 1, 74LS86 x 1.

Procedure:

A-Verification of the inverter function

1. The 74LS04 was inserted into the mounting board.2. The pin diagram was referred to and the Vcc pin was connected to +5V

and the GND pin was connected to ground.3. The inverter was as shown in fig 1a and connected in such a way that

the input of the inverter is connected to any switch and its output is connected to any LED (light emitting diode).

(a) (b)

4. The power was turned on, and the switch was placed on the ON position and the LED output was observed.

5. The switch was placed on the OFF position and LED output was observed.

L1

AA'

1 2

SW1

L1

A1 2

L2 L3 L4

3 4 13 12 11 10

SW1

L1

A1 2

L2 L3 L4

3 4 13 12 11 10

SW1

Figure 1

6. The results were recorded in table 1a.7. The trainer was powered OFF and the circuit in figure 1b was

connected as shown.8. The trainer was powered ON and the output was observed and

recorded in table 1b.

(a) (b)

B-Verification of the AND and the NAND functions

1. The ICs 74LS08 and 74LS00 were inserted into the board of the trainer.2. The pin diagram of ICs 74LS08 and 74LS00 was referred to and the Vcc

pins were connected to +5V and the GND pins were connected to ground.

3. The circuit on fig 2 as connected as shown.

4. The circuit was turned on and the position of both SW1 and SW2 was changed as shown in the 1st column in table 2.

5. The outputs of L1 and L2 were recorded in the 2nd and the 3rd columns of table 2 respectively.

A B L1 = A . B L2 = ( A . B )'0 0 0 10 1 0 11 0 0 11 1 1 0

A L1 L2 L3 L40 1 0 1 01 0 1 0 1

A L1 = A'0 11 0

Table 1

Figure 1

C-Verification of the OR and the NOR functions



3. The circuit was connected as shown in figure 3.


5. The outputs of L1 and L2 were recorded in the 2nd and the 3rd columns

of table 3 respectively.

A B L1 = A + B L2 = ( A + B )'0 0 0 10 1 1 01 0 1 01 1 1 0

Table 2

Figure 3

Table 3

D-Verification of the XOR and the XNOR functions



3. The circuit was connected as shown in figure 4.


5. The outputs of L1 and L2 were recorded in the 2nd and the 3rd columns of table 4 respectively.

A B L1 L20 0 0 10 1 1 01 0 1 01 1 0 1

Figure 4

Table 4

AB

Discussion:

1. The maximum number of similar gated that a gate can drive and maintain its output is called a fan-out. Referring to the TTL data sheets, find out the fan out of all the gates used in this experiment.

Using the TTL data sheet for IC 74LS04 we find that with a supply voltage is +5 volts

IOH = 0.4 mA IIH = 20 µA

IOL = 8 mA IIL = 0.4 mA

For maximum number of gates driven IOH / IIH = 20 IOL / IIL = 20

So by that we find that the maximum number of gates that can be driven is 20

Reference : http://focus.ti.com/lit/ds/symlink/sn74ls04.pdf.

2. Using only 2-input AND gates , draw the circuit that will produce the function

F=A.B.C.D.E

3. Assume that you need a 2-input OR gate but you have only three inputs OR gate available. Show how the unused input of the 3-input OR gate can be connected.

Conclusion:

In this experiment have learned about the simple logic gates and verified these functions, there were no problems at all with the experiment and the outputs were all correct.

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Experiment 1 digital