EXAMPLE 7.1BJECTIVEDetermine the total bias current on an IC due to subthreshold current. Assume there are 107 n-channel transistors on a single chip, all biased at VGS = 0 and VDS =2 V. Assume Isub = 10-10 A for each transistor for this bias condition and for a threshold voltage of VT = 0.5 V. What happens to the total bias current on the IC if the threshold voltage is reduced to VT = 0.25 V, all other parameters remaining the same. SolutionThe total bias current is the bias current of each transistor times the number of transistors, or

IT = Isub(107) = (10-10)(107) 1 mAWe can write

so

Now, if the threshold voltage changes to VT = 0.25, then the subthreshold current at VG

S = 0 becomes

t

TGS

V

VVII exp0sub

0242.00259.0

5.00exp10 00

10

II

or

Isub = 1.56 106 ANow, the total bias current for this IC chip would be

IT = (1.56 10-6)(107) = 15.6 A CommentThis example is intended to show that, taking into account subthreshold currents, the threshold voltage must be designed to be a “reasonable” value such that the zero-bias gate currents are not excessive.

0259.0

25.00exp0242.0exp0sub

t

TGS

V

VVII

EXAMPLE 7.2OBJECTIVETo determine the effect of channel length modulation on the value of drain current. Consider a n-channel MOSFET with a substrate impurity doping concentration of Na = 2 1016 cm-3, a threshold voltage of VT = 0.4 V, and a channel length of L = 1 m. The device is biased at VGS = 1 V and VDS = 2.5 V.

SolutionWe find that

andVDS(sat) = VGS VT = 1 0.4 = 0.6 V

Now

or L = 0.181 mWe can write

or CommentDue to channel length modulation, the drain current is 22 percent larger than the ideal long channel value.

V365.0105.1

102ln0259.0ln

10

16

i

atFp n

NV

6.0365.06.05.26.0365.0

102106.1

1085.87.1122/1

1619

14

L

181.01

1

LL

L

I

I

D

D

22.1

D

D

I

I

EXAMPLE 7.3OBJECTIVETo calculate the effective electric field at threshold for a given semiconductor doping. Consider a p-type silicon substrate at T = 300 K and doped Na = 3 1016 cm-3.

SolutionFrom Equation (6.8b) in Chapter 6, we can calculat

and

which is xdT = 0.18 m. Then

At the threshold inversion point, we may assume that Qn = 0, so the effective electric field from Equation (7.10) is found as

CommentWe can see, from Figure 7.10, that this value of effective transverse electric field at the surface is sufficient for the effective inversion charge mobility to be significantly less than the bulk semiconductor value.

V376.0105.1

103ln0259.0ln

10

16

i

atFp n

NV

V/cm1034.81085.87.11

1064.8max 4

14

8

SDQ

V/cm1034.81085.87.11

1064.8max

1 414

8

eff

SDs

Q

2/1

1619

142/1

103106.1

376.01085.87.1144

a

Fps

dT eNx

EXAMPLE 7.4OBJECTIVETo determine the ratio of drain current under the velocity saturation condition to the ideal long-channel value. Assume an n-channel MOSFET with a channel length L = 0.8 m, a threshold voltage of VT = 0.5 V, an electron mobility of n = 700 cm2/V-s, and vsat = 5 106 cm/s. Assume that the transistor is biased at (a) VGS = 2 V and (b) VGS = 3 V.

SolutionWe can write

For (a) VGS = 2 V, we find

and for (b) VGS = 3 V, we obtain

CommentWe see that as the applied gate-to-source voltage increases, the ratio decreases. This effect is a result of the velocity saturation current being a linear function of VGS VT , whereas the ideal long-channel current is a quadratic function of VGS VT .

5.0

105

700

108.022 64sat

ideal

sat,

GSTGSnD

vD

VVV

vL

I

I

762.0ideal

sat, D

vD

I

I

457.0ideal

sat, D

vD

I

I

EXAMPLE 7.5BJECTIVECalculate the threshold voltage shift due to short-channel effects. Consider an n-channel MOSFET with Na = 5 1016 cm-3 and tox = 200 Å. Let L = 0.8 m and assume that rj = 0.4 m. SolutionWe can determine the oxide capacitance to be

and can calculate the potential as

the maximum space charge width is found as

278

14

ox

oxox F/cm1073.1

10200

1085.89.3

tC

V389.0105.1

105ln0259.0ln

10

16

i

atFp n

NV

m142.0

105106.1

389.01085.87.11441619

142/1

a

aFps

dT eN

Nx

Finally, the threshold voltage shift, from Equation (7.22), is

orVT = 0.101 V

CommentIf the threshold voltage of this n-channel MOSFET is to be VT = 0.40 V, for example, a shift of VT = 0.101 V due to short-channel effects is significant and needs to be taken into account in the design of this device.

14.0

142.021

8.0

4.0

1073.1

10142.0105106.17

41619

TV

EXAMPLE 7.6OBJECTIVEDesign the channel width that will limit the threshold shift because of narrow channel effects to a specified value.. Consider a n-channel MOSFET with Na = 5 1016 cm-3 and tox = 200 Å. Let = / 2. Assume that we want to limit the threshold shift to VT = 0.1 V.

SolutionFrom Example 7.5, we have

From Equation (7.28), we can express the channel width as

or

W = 1.46 m CommentWe can note that the threshold shift of VT = 0.1 V occurs at a channel width of W = 1.46 m, which is approximately 10 times larger than the induced space charge width xdT .

m142.0andF/cm1073.1 27ox

dTxC

1.01073.1

10142.02

105106.1

7

241619

ox

2

T

dTa

VC

xeNW

EXAMPLE 7.7BJECTIVECalculate the theoretical punch-through voltage assuming the abrupt junction approximation. Consider an n-channel MOSFET with source and drain doping concentrations of Nd = 1019 cm-3 and a channel region doping of Na = 1016 cm-3. Assume a channel length of L = 1.2 m, and assume the source and body are at ground potential. SolutionThe pn junction built-in potential barrier is given by

The zero-biased source-substrate pn junction width is

V874.0

105.1

1010ln0259.0ln 210

1916

2

i

datbi n

NNVV

m336.0

10106.1

874.01085.87.11221619

142/1

0

a

bisd eN

Vx

The reverse-biased drain-substrate pn junction width is given by

At punch-through, we will have

Which fives xd = 0.864 m at the punch-through condition. We can then find

The punch-through voltage is then found asVDS = 5.77 0.874 = 4.9 V

CommentAs the two space charge regions approach punch-through, the abrupt junction approximation is no longer a good assumption.

2/12

a

DSbisd eN

VVx

2.1336.0or0 ddd xLxx

V77.5

1085.87.112

10106.110864.0

2 14

1619242

s

adDSbi

eNxVV

EXAMPLE 7.8BJECTIVEDesign the ion implant dose required to adjust the threshold voltage to a specified value. Consider an n-channel MOSFET with a doping of Na = 5 1015 cm-3, and oxide thickness of tox = 500 Å, and an initial flat-band voltage of VFBO = 1.25 V. Determine the ion implantation dose such that a threshold voltage of VT = +0.70 V is obtained. SolutionWe may calculate the necessary parameters as

288

14

ox

oxox

2/1

1519

142/1

0

0

10

15

0

F/cm109.610500

1085.89.3

m413.0105106.1

329.01085.87.1144

V329.0105.1

105ln0259.0ln

tC

eNx

n

NV

a

Fps

dT

i

atFp

The initial pre-implant threshold voltage is

The threshold votage after implant, from Equation (7.31), is

so that

V113.0109.6

10413.0105106.1329.0225.1

2

8

41519

ox

00 0

C

xeNVV dTa

FpFBOT

8

19

109.6

106.1113.070.0

ID

ox0 C

eDVV I

TT

Which givesDI = 3.51 1011 cm2

If the uniform step implant extends to a depth of xI = 0.15 m, for example, then the equivalent acceptor concentration at the surface is

orNs = 2.84 1016 cm3

CommentThe required implant dose to achieve the desired threshold voltage is DI = 3.51 1011 cm-2. This calculation has assumed that the induced space charge width in the channel region is greater than the ion implant depth x

I. We can show that this requirement is indeed satisfied in this example.

3-164

11

cm1034.21015.0

1051.3

I

Ias x

DNN