EUVL Challenges for Next

Generation Devices

Center for Semiconductor Research & Development

Advanced Lithography Process Technology Dept.

Tatsuhiko Higashiki

2

Contents

Device Roadmap and Lithography

Extendibility toward 1x nm hp and

beyond with New Lithography

ＳＡｘＰ

EUVL

EUVL+DSA

Conclusion

3

Contents

Device Roadmap and Lithography

Extendibility toward 1x nm hp and

beyond with New Lithography

ＳＡｘＰ

EUVL

EUVL+DSA

Conclusion

4

All information that is created, captured, replicated and/or

consumed by all human on the planet.

All information is not fully stored, but partially stored.

⇒ Need for larger-capacity memory in the future.

Rapid Increase of Information Volume Demand

40ZB

20ZB

1ZB=1,000,000,000,000,000,000,000=10＾21B

5

6

STI

FG

CG

FG FG FG

STI

FG

CG

FG FG FG

STI

FG

CG

FG FG FG

Roadmap of the Memory

NAND

BiCS

Cross Point

7

Lithography Challenges

ArF im

NA>1~1.35

EUVL NA0.32→ >0.4x ?

ArF im SADP

Performance

& Economics

EUVL+SADP

Light

Source Resist, Mask,

Inspection, etc

ArF imSAQP/SAOP ?

More Moore

More

than

Moore

ML2

Tool

Defect

NIL

EUVL+DSA

NIL+DSA

hp56nm hp43nm hp32nm hp2xnm hp1xnm hp0xnm

ML2+DSA

Arf im SAQP+DSA

SADP : self-aligned double patterning

SAQP : self-aligned quadruple patterning

SAOP : self-aligned octuplet patterning

Cost

8

Contents

Device Roadmap and Lithography

Extendibility toward 1x nm hp and

beyond with New Lithography

ＳＡｘＰ

EUVL

EUVL+DSA

Conclusion

9

Lithography Challenges

ArF im

NA>1~1.35

EUVL NA0.32→ >0.4x ?

ArF im SADP

Performance

& Economics

EUVL+SADP

Light

Source Resist, Mask,

Inspection, etc

ArF imSAQP/SAOP ?

More Moore

More

than

Moore

ML2

Tool

Defect

NIL

EUVL+DSA

NIL+DSA

hp56nm hp43nm hp32nm hp2xnm hp1xnm hp0xnm

ML2+DSA

Arf im SAQP+DSA

SADP : self-aligned double patterning

SAQP : self-aligned quadruple patterning

SAOP : self-aligned octuplet patterning

Cost

10

Single Exposure by Mask Technology Revolution

EUVL single

Exposed

Processed

Mask (Template)

Litho.

Slimming

Film depo.

etching

etching

SADP single

11

Cycle time can not be described on CoO Single Exposure

Patterning

Patterning

DPT

Cycle time

Δ Cycle time

ＣｏＯ

（￥／ｗｆ）

ＣｏＯ

（￥／ｗｆ）

Ref T.Higashiki ConFab2010(June)

DPT Economical Problems Investment Cost (LP, Etching , M&I, etc.)

Mask Cost

Opportunity Cost (“Time is money”)

12

Contents

Device Roadmap and Lithography

Extendibility toward 1x nm hp and

beyond with New Lithography

ＳＡｘＰ

EUVL

EUVL+DSA

Conclusion

13

Lithography Challenges

ArF im

NA>1~1.35

EUVL NA0.32→ >0.4x ?

ArF im SADP

Performance

& Economics

EUVL+SADP

Light

Source Resist, Mask,

Inspection, etc

ArF imSAQP/SAOP ?

More Moore

More

than

Moore

ML2

Tool

Defect

NIL

EUVL+DSA

NIL+DSA

hp56nm hp43nm hp32nm hp2xnm hp1xnm hp0xnm

ML2+DSA

Arf im SAQP+DSA

SADP : self-aligned double patterning

SAQP : self-aligned quadruple patterning

SAOP : self-aligned octuplet patterning

Cost

14

Light Source Performance

Enough Power for Throughput>150wph Operational Cost (Mirror, E Power, DMT, etc)

Mask Defect Control DD<0.1/cm2 Inspection ・ABI（Actinic Blanks Inspection) ・PI（Pattern Inspection) ・Inspection after Pattern Repairing

Resist Performance Resolution<hp16nm,LWR<2nm,Photo

Speed<20mj/cm2,Difectivity<0.1/cm2

EUVL Challenges for NAND Memory

15 Ref , EIDEC Symposium 2013

16

EUV Collaboration

・Pattern Layout

Tech.

(OPC/DFM)

・Specification

Design for Tools

・Mask process

・Resist process

Lithography Device

&

design

Si

Process

Mask Quality Mask Inspections Resist Quality High NA Exposure EUVL+DSA

Exposure Tool EDA Resist Material Mask

Metrology and Inspection

Suppliers

Advanced EUVL

17

Structure of EUVL Mask

EUV Mask Section and Defects

Phase Defect

Reflective Multilayer

Absorber

Damage after

repairing Pattern Defect

Ref T.Higashiki ConFab2010(June)

18 Ref H.Watanabe, EIDEC Symposium 2013

19

Electron Gun

Detector: TDI Sensor

Continuous

Moving (Y) Stepping (X)

EUV Mask

EBeyeM

Projection Electron

Microscope

Electron Gun

Detector

EUV Mask

EUV Mask

EB inspection tool

20

• EUV AIMS operation will be difficult in 2012.

Quality assurance of hotspot & repaired pattern

• 3D SEM + Litho. Simulation will be applied.

3D mask image

Lithography

simulation

Prediction of

wafer image

top-down +5deg -5deg Top-down & tilted

SEM images of mask

pattern

21

Toshiba Technology Scenario for EUV Mask

HP 2Xnm HP 1Xnm

Multilayer defect

inspection

Patterned mask

inspection

Defect repair

Hotspot & repaired

pattern assurance

Particle

inspection

Actinic inspection

DUV inspection EB inspection

EB repair

Litho. Sim. w/ 3D mask

image EUV-AIMS

ready

under developing

EB inspection

DUV inspection

22

TaBO

TaBNRu

90(deg)

44nm (4x) L&S

Iino, et al. (BACUS2010)

Dry Etching Equipment : “ARESTM”

CDU of 44nm (4x) L&S : 1.7nm (3sigma)

Scanning-type Developer : “PGSD” Proximity-Gap-Suction-Development System

Scan

Mask

Deve

lopi

ng

Solu

tion

Suction

Suction

Rin

se

Rin

se

Developing Area

GapSensor

Gap

Cross-sectional view

Slit and scan type development

Narrow gap Suction slits for

removing dissolution products

Mask

Mask StagePGSD Nozzle

Scan

Extreme high uniformity of developing solution supply

Nearly zero loading effect caused by dissolution products Etched absorber pattern has capability for scaling down to hp1x EUVL single exposure.

EB writer : “EBM8000”

http://www.nuflare.co.jp/product/ebm.html

Absorber Pattern Generation

(NuFlare) (Tokyo Electron)

(Shibaura Mechatronics)

23

“SMRAT Network of Mask & Lithography”

DTF

・Cleaning Tech. ・Etching

・EB Writer ・Inspection

・Mask House

・Mask Inspections ・High Performance Resist ・Sub-10nm DSA material

・Advance Mask & Litho ・Computational Litho ・OPC/DFM ・Next Emerging Litho.

Toshiba Confidential

(EUVL Infrastructure

Development Center)

Toshiba Advanced Litho.&

Mask Dept.

Toshiba

R&D Center

24

Resolution Limit of EUVL

Depend on

Resist

Performance

25

EUVL and SADP Complementally

Spacer Film

EUVL

Spacer

hp14nm

Resist

hp28nm

28nm 14nm

Siウェハ

dTEOS加工後

Y. Watanabe et al, Photomask Japan 2010(April)

hp14nm Exposure was Realized by EUVL + SADP

26

Contents

Device Roadmap and Lithography

Extendibility toward 1x nm hp and

beyond with New Lithography

ＳＡｘＰ

EUVL

EUVL+DSA

Conclusion

27

Lithography Challenges

ArF im

NA>1~1.35

EUVL NA0.32→ >0.4x ?

ArF im SADP

Performance

& Economics

EUVL+SADP

Light

Source Resist, Mask,

Inspection, etc

ArF imSAQP/SAOP ?

More Moore

More

than

Moore

ML2

Tool

Defect

NIL

EUVL+DSA

NIL+DSA

hp56nm hp43nm hp32nm hp2xnm hp1xnm hp0xnm

ML2+DSA

Arf im SAQP+DSA

SADP : self-aligned double patterning

SAQP : self-aligned quadruple patterning

SAOP : self-aligned octuplet patterning

Cost

28

EUV Collaboration

・Pattern Layout

Tech.

(OPC/DFM)

・Specification

Design for Tools

・Mask process

・Resist process

Lithography Device

&

design

Si

Process

Mask Quality Mask Inspections Resist Quality High NA Exposure EUVL+DSA

Exposure Tool EDA Resist Material Mask

Metrology and Inspection

Suppliers

Advanced EUVL

29

ＤＳＡ（Directed Self Assembly)

Composition

Mo

lecu

lar

We

igh

t

Change in Structure

C

han

ge in

Siz

e

Spherical Cylindrical Bicontinuos Lamella B polymer

A polymer

K. Asakawa, T. Hiraoka, Jpn. J. Appl. Phys. vol.41, 6112 (2002).

Chemical bond

DSA Molecule

Hydrophilic Hydrophobic

Micro-Phase Separated Structures of Block-copolymer

30

DSA (Directed Self Assembly)

Hydrophobic (PS)

Hydrophilic

（PMMA）

Contact Hole Line & Space

BCP: Block copolymer

31

Grapho-Epitaxy & Chemo-Epitaxy

Segalmann et al., Adv.Mater. 3,1152(2001) Nato et al., IEEE Trans. Magn.38,1949(2002) Chen et al.,Appl.Phys.Lett.81,3657(2002)

Chen et al.,Adv.Mater. 20,3155(2008) Rulz et al., Science, 321,936(2008) Tada, Macromol.41,9267(2008)

32

Guide Hole vs. DSA Hole

Guide hole DSA hole

Ave. CD 72.1nm

3sigma 7.6nm

Ave. CD 28.5nm

3sigma 1.3nm

Ref.Y.Seino, SPIE Advanced Lithography 2012 8323-33

33

Layout

Guide Data

OPC Litho Simulation

GDS

DSA Simulation

HotSpot result

OPC

Condition (material/process)

DfM FeedBack

Wafer Process FeedForward APC

Judge

Model

EDA Tool

EDA Tool

DSA OPC/DfM/APC Flow

34

Pre

dic

tion

Accura

cy

speed

(<0.25nm)

TAT (1m/10μm2)

Rigorous Model

Shroedinger's Equation etc

Model Self Consistent mean Field Dissipative Particle Dynamics

methodology Based on statistical field theory Based on Newton's motion equation

Challenge Modeling of thermal

fluctuations

Difficult to fit to a measured data

Target

SCF DPD

TAT (5h/10μm2)

(5nm)

DSA Simulation Model

TAT (? years/10μm2)

Impractical model

35

DSA Simulation Model ◆ Molecular Dynamics based Available Free Software Tools are;

LAMMPS /GROMAX/ OCTA-COGNAC,, Coarse Grained MD

DPD（Dissipative Particle Dynamics)

Δvelocity Solvent

Dissipative Force

Repulsive Force

Coarse Graining

Beads Spring

Brownian Motion

Spring Force

36

Challenges for DSA Lithography

• High performance DSA material – High χ material

– Resolution, LWR/LER, Etching

• Long term stability – Robust material and tool for environmental control such as surface energy stability,

temperature, humidity, pressure and PH, etc.

– Defectivity, CD and overlay accuracy

• Development of molecular dynamics based DSA simulator – More accurate simulation model

• BCP and related molecular design

• Microphase separation (2D/3D)

– TAT / accuracy trade-off

• DSA OPC/DFM technology – Design rule verification

– DSA and guide patterning (litho/wet/dry)

• Metrology & Inspection – Metrology for 3D profile

– Inspection technology for 1xnmhp and beyond needs to overcome throughput / accuracy / sensitivity trade-off.

37

Contents

Device Roadmap and Lithography

Extendibility toward 1x nm hp and

beyond with New Lithography

ＳＡｘＰ

EUVL

EUVL+DSA

Conclusion

38

Conclusion

Economical factor is dominant criteria for a lithography strategy

For Memory Device; Throughput, Investment & Si Process Cost

For Logic Device ; Mask Cost, Cycle Time

EUVL

Moving from R&D phase to production

Light source performance is improving, but a significant concern.

DSA

DSA will be a complementary technology for all other lithography

EUVL+DSA will be one of candidates for sub 10nm lithography.

Next Challenges

Next generation lithography will depend on innovation of infrastructure technologies such as OPC, DFM, M&I, etching and cleaning.

39 2013/7/7