EMBEDDED SYSTEM OF SHIBU K V

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    ASSIGNMENT 1

    ADVANCED EMBEDED SYSTEMS

    BMSCE-VLSI

    Technology underlying programMemory

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    Technology underlying varied program memory

    Memory is an important part of a processor/controller basedembedded systems.

    Some of the processors contain built-in memory is referred as on-

    chip memory.

    External memory connected with the processor to store control

    algorithm is called as off-chip memory.

    Program Storage Memory(ROM)

    a) Mased !"M#M!"M)

    b) $rogrammable !"M#$!"M)

    c) Erasable $rogrammable !"M#E$!"M)

    d) Electrically Erasable $rogrammable !"M#EE$!"M)

    e) %&'S(

    f) *!'M

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    Program Storage Memory(ROM)

    +he program memory or code storage memory of an embedded system stores the

    program instructions.

    +he code memory is non-,olatile storage memory.

    epending on the fabrication erasing and programming techniues they are

    classified as shown in figure.

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    Masked ROM(MROM)

    M!"M is one time programmable de,ice maes use of hardwired technology for storing

    data.

    +he de,ice is factory programmed by masing and metalli0ation process at the time of

    production according to the data pro,ided by the end user.

    $rimary ad,antage of this is low cost for high ,olume production.

    ifferent mechanisms are used for the masing process of !"M lie

    1. 2reation of an enhancement or depletion mode transistot through channel implant.

    3. 4y creating the memory cell either using a standard transistor or a high threshold

    transistor.

    +he limitation with M!"M based firmware storage is the inability to modify de,ice firmware

    against the upgrades.

    Since the M!"M is permanent in bit storage it is not possible to alter the bit information.

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    ProgrammableRead Only Memory(PROM)/OTP

    $!"M is not pre-programmed by the manufacturer. +he end user is responsible for

    programming of these de,ices.

    +his memory has nichrome or polySi wires arranged in matrix functionally ,iewed

    as fuses.

    5t is programmed by $!"M programmer which selecti,ely burns the fuses

    according to the bit pattern to be stored.

    %uses which are not burned represent a logic 1 fuses which are burned represent a

    logic 6.

    5t is a low cost solution for commercial production. "+$s cannot be reprogrammed.

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    Erasable Programmable Read Only Memory(EPROM)

    E$!"M gi,es the flexibility to re-program the same chip.

    5t stores the bit information by charging the floating gate of an %E+.

    5t contains a uart0 crystal window for erasing the stored information.

    5f the window is exposed to 7* rays for a fixed duration the entire memory will beerased.

    5t needs to be taen out of the circuit board and put in 7* eraser de,ice for 36 to 86

    minutes. So it is time consuming process.

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    Electrically Erasable Read Only Memory(EEPROM)

    +he information contained in the EE$!"M memory can be altered by using electrical

    signals at the register /byte le,el.

    +hey can be erased and re-programmed in-circuit.

    +his chip includes a chip erase mode and in this can be erased in a few milliseconds.

    $ro,ides greater flexibility for system design.

    "nly limitation is their capacity is limited when compared with the standard !"M.

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    lash Memory!

    &atest and the most popular !"M technology used in todays Embedded systems it is

    a ,ariation of EE$!"M technology.

    5t combines the reprogrammability of EE$!"M and the high capacity of standard

    !"Ms.

    %lash memory is organi0ed as sectors or pages stores information in an array of

    floating gate M"S%E+ transistors

    Erasing of memory can be done at sector le,el without affecting the other

    sectors/pages.

    +ypical erasable capacity of flash is 1666cycles.

    93:2;13 from 954" is an example of 4 %lash memory.

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    "#R$M

    on-,olatile !'M is a random access memory with battery bacup.

    5t contains a static !'M based memory and a minute battery for

    pro,iding supply to the memory in the absence of external power supply.

    +he memory and battery are paced together in a single pacage.

    S14 *!'M.