Embedded System Architecture Slides

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Embedded System architecture


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Differences between RISC AND CISC

Architecture

RISC CISC1)Simple instruction set 1) Complex instruction set

2) Requires single cycle 2) Requires multiple cycle

3) Very few instructions refer 3) Many instruction refer memory

memory4) Instruction are executed by 4) Instructions are executed by

hardware micro program

5) Fixed instruction Form at 5) Variable instruction format

6) Few addressing modes 6) Many addressing modes

7) Does not support complex 7) support complex addressing modesaddressing modes

8)Multiple register set 8) single register set

9) Highly pipelined 9) not Pipelined or less


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Interrupts

Interrupt is signal to the processor to indicate the event has

occurred

Corresponding to each interrupt their will be ISR that will be

executed

HALT the work

Save the content of register and address by pushing onto the stack

Interrupt vector- ISR address

Execute IRS

Reloads address and register contents by popping the stack

There may be More than one interrupt to the processor

Assign priority to each interrupt


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PIC- programmable interrupt controller interfaces with CPU to

handle external devices and decide which interrupt has to be

processed

Interrupt vector table-address, number,priority,frequency

NMI Non maskable interrupt ex-reset


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Clock oscillatory circuit or clocking

units

The clock controls the time for Executing the instruction

Controls Clocking requirements of CPU , System timer, CPU

machine cycle

Machine cycle are for fetching the codes and data frommemory and then decoding and executing them at the

processor and transferring the results to the memory.

For processing units, a highly stable oscillator is requiredand processor clock out signal provides the clock for

synchronizing all system units with the processor


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System Timers and Real time Clock

Timer circuit is suitably configured as system clock ,which ticks andgenerates system interrupt periodically

For example 60 times per second

ISR perform the required operation

REAL TIME CLOCK

A timer circuit is suitably configured as RTC

RTC generates system interrupt periodically for scheduler , real timeprogram, for periodic saving of time and data in the

system

Used to obtain software control delays , timeout

RTC acts as driver for timers


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Watchdog timer(reset Circuit)

Most embedded system do not have reset button

Due to software or hardware error , need to reset processor

Reset button is provided in embedded system , on pressing

the button reset signal is sent to the processor Watchdog timer does the resetting


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Chip select

As many peripherals share common bus(memory chips/ input

and output devices)

Processor must uniquely identify a peripheral to communicate

with it

Processor performs this identification using a signal called

chip select

Chip select signal is available to all the peripherals connected

to the bus


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Function Keypad

Based on the application an embedded system

has to be provided with function keypad to

input data and/or commands


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http://www.google.co.in/imgres?hl=en&sa=X&tbo=d&biw=1429&bih=575&tbm=isch&tbnid=kIiNT3rvOSJfCM:&imgrefurl=http://zedomax.com/blog/2009/06/12/tekgadget-numeric-keypad/&docid=pnoK3J_g7fHftM&imgurl=http://zedomax.com/blog/wp-content/uploads/2009/06/51ecosd3tpl__ss400_.jpg&w=400&h=400&ei=7ssZUeCbJIiOiAeItYCwBQ&zoom=1&ved=1t:3588,r:14,s:0,i:124&iact=rc&dur=822&sig=106521000543516167198&page=1&tbnh=211&tbnw=218&start=0&ndsp=16&tx=109&ty=87


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Led

Act as output devices

Available in different colour

RED,Green,yellow,blue,white

Blue and white led are expensive

Used for status display ,power failure

indications etc


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LCD-Liquid crystal display

A liquid crystal display (LCD) is a flat panel display, electronic visual

display, or video display that uses the light modulating properties of

liquid crystals. Liquid crystals do not emit light directly

Used to display status information

Display can be small as 1 line with 8 characters

Other display can be of 6.4 inch or 8.4 inch

Resolution can be 640*480 or 1024*768

new display technologies

TFTThin Film transistor

High resolution,used in mobile phones
http://en.wikipedia.org/wiki/Liquid_Crystalshttp://en.wikipedia.org/wiki/Liquid_Crystalshttp://en.wikipedia.org/wiki/Liquid_Crystals


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3 dimensional display

OLED- Organic light emitting diode display

Organic light emitting polymer is placed between anode and cathode

When voltage is applied between anode and cathode OLED glows

Much brighter display used in PDAs


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Digital clock


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Debug port

Manufacturers provide proprietary interfaces to do the debugging

JTAG-JOINT TEST ACCESS GROUP

Mechanism for providing a debugging through a port called JTAG

PORT

JTAG port provide access to the internal of the processor

Standard IEEE 1149.1a-1993 ( standard test access port and

boundary scan architecture) gives details of protocol used in JTAG

port

Using boundary scan technique the connection between processorand memory/peripherals can be probed by given appropriate

signals at the output pins and regarding the response from input

pins


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1) Test data input (TDI)

2) Test data output (TDO)

3) Test mode select (TMS)4) Test clock (TCK)

JTAG port can also be used to download thesoftware to embedded system


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Communication Interfaces

For embedded system to extract with external world, a number

of communication interfaces are provided

Serial interface using RS232

Serial interface using Rs422/485

Universal serial bus

Infrared

Ethernet

Wireless interface based on IEEE 802.11 wireless LANstandard

Bluetooth radio interface


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Direct memory access

Data transfer between I/O device and memory is coordinated

by the CPU

In case processor is busy

Data transfer between I/O device and memory can take place

directly, this is known as DMA

A device called DMA controller does a job

DMA controller takes control of the bus and transfer data

between I/O device and memory


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CPU DMA Controller

MemoryI/O device


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Inter integrated circuit

device device device

Serial clk


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Has two wires for connecting devices

Bus is bidirectional, synchronous to common clock

Built in in microcontroller

Data rate-100kbps,400kbps are supported Bus consist of two lines

1) serial clock

2) Serial data

High not in use

The device using the bus drives the line low

Each device has 7 bit unique address


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128 devices can be connected

A device can act as master or slave

A device transmitting data -master receiving data-slave

Bus is bidirectional Multiple master can be available

We can interface a RTC such as philips pCF8353

Display device can be interfaced


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Serial peripheral interface

Synchronous serial data link

Operates in full duplex

Named by Motorola

Device communicate in master/slave mode Master initiates data frame

Multiple slave devices are allowed with individual slave

select(chip select lines)

Sometimes SPI is called a four wire serial bus


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The SPI bus specifies four logic signals:

1) SCLK: serial clock (output from master);

2) MOSI: master output, slave input (output from master);

3) MISO: master input, slave output (output from slave);

4) SS: slave select (active low, output from master).

The SPI bus can operate with a single masterdevice and with one or more slave devices.

If a single slave device is used, the SS pin maybefixed to logic low if the slave permits it.


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Some slaves require the falling edge (high-low transition) of

the chip select to initiate an action such as the Maxim

MAX1242 ADC, which starts conversion on said transition.

With multiple slave devices, an independent SS signal is

required from the master for each slave device
http://en.wikipedia.org/wiki/Analog-to-digital_converterhttp://en.wikipedia.org/wiki/Analog-to-digital_converter


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Data transmission


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The bus master first configures the clock, using a frequency

less than or equal to the maximum frequency the slave device

supports.

Such frequencies are commonly in the range of 1100 MHz.

The master then transmits the logic 0 for the desired chip

over chip select line

If a waiting period is required (such as for analog-to-digital

conversion), then the master must wait for at least that period

of time before starting to issue clock cycles


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During each SPI clock cycle, a full duplex data transmission occurs:

the master sends a bit on the MOSI line; the slave reads it from thatsame line

the slave sends a bit on the MISO line; the master reads it from thatsame line

Transmissions normally involve two shift registers of some givenword size, such as eight bits, one in the master and one in the slave;

they are connected in a ring.

Data is usually shifted out with the most significant bit first, whileshifting a new least significant bit into the same register.

After that register has been shifted out, the master and slave haveexchanged register values.


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Then each device takes that value and does something withit, such as writing it to memory.

If there is more data to exchange, the shift registers are

loaded with new data and the process repeats. Transmissions may involve any number of clock cycles. When

there is no more data to be transmitted, the master stops

toggling its clock. Normally, it then deselects the slave.


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Power supply unit

Most systems have apower supply of their own.

The supply has a specific operation range or arange of voltages.

Various units in an embedded system operate inone of the following four operation ranges:

(i) 5.0V + 0.25V

(ii) 3.3V + 0.3V

(iii) 2.0 + 0.2V

(iv) 1.5V + 0.2V


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Additionally, a 12V + 0.2V supply is needed for a flash

(a memory form used in systems like latest digital

cameras) or Electrically Erasable and Programmable

Read Only memory (EEPROM) when present in themicrocontroller of an embedded system and for

RS232C serial Interfaces


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Certain systems do not have a power source of their own:

they connect to an externalpower supplyor are powered by

the use ofcharge pumps. (1) Network Interface Card (NIC)

and Graphic Acceleratorare examples of embedded systems

that do not have their own power supply and connect to PCpower-supply lines. (2) A charge pump consists of a diode in

the series followed by a charging capacitor. The diode gets

forward bias input from an external signal;


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Embedded System Architecture Slides