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Question 1
1 out of 1 points
Which one of the following statement on ARM states is incorrect?Answer
Selected Answer:
b.
A processor in one state can execute instructions from another instruction set.
Question 2
1 out of 1 points
The following is an instruction in ARM assembly languageStart MOV r0, #15 ; load R0 with 15
One of the following state ments on the instruction is incorrectAnswer
Selected Answer: d.Each instruction should have a lebel in an assembly program
Question 3
1 out of 1 points
Which one of the following statement on directives is incorrect?Answer
Selected Answer:
b.AREA is a directive to specify a chunk of data that is manipulated by the linker. It cannot specify a code chunk.
Question 4
0 out of 1 points
Which one of the following is not a data processing instruction?Answer
Selected Answer: d.RSC r1,r2,r3
Question 5
1 out of 1 points
Which one of the following statements on the C-1 operation in the SBC instruction is incorrect.Answer
Selected Answer:
c.In big number subtraction, SBC should be used in all the 32 bit section, including lowest 32 bit .
Question 6
1 out of 1 points
For data processing instructions, S at the end indicate some something. Which of the following explanation is correct?Answer
Selected Answer:
a.The status of the operation, such as Z, C and N will be kept in the flags.
Question 7
1 out of 1 points
Which of the following is not a logical operation instruction?Answer
Selected Answer: d.BIT r1, r2, r3
Question 8
1 out of 1 points
Four comparison instructions are given with explanation in the comments. One of the comments is incorrect. Which one?Answer
Selected Answer: c.TEQ r1, r2 ; set cc on r1 OR r2
Question 9
0 out of 1 points
The following statements are on addressing mode. One of the is incorrect. Which one?Answer
Selected Answer: a.A 32 bit data can be directly moved to a register.
Question 10
0 out of 1 points
One of the following statements comments on indexing addressing is incorrect Which one?Answer
Selected Answer:LDR r0, [r1, #4] !
is equivalent to
ADD r1, r1, #4LDR r0, r1