electronics lab EC 2257

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EC1255 / ELETRONIC CIRCUITS II AND SIMULATION LABORATORY

M.A.M SCHOOL OF ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

LAB MANUAL

Subject Code: EC1255

Subject Name: ELECTRONIC CIRCUITS II AND SIMULATION LABORATORY

Year/Sem: II/IV

EC1255 – ELECTRONIC CIRCUITS II AND SIMULATION LABORATORY

LIST OF EXPERIMENTS DESIGN OF THE FOLLOWING CIRCUITS 1. Series and shunt feedback amplifiers: Frequency response, input and output impedance calculation 2. RC phase shift oscillator, wien bridge oscillator 3. Hartley oscillator, colpitts oscillator 4. Tuned class C amplifier 5. Integrators, Differentiators, Clippers and Clampers 6. Astable, Monostable and Bistable multivibrators SIMULATION USING PSPICE 1. Differential amplifier 2. Active filters : Butterworth 2nd order LPF, HPF (magnitude & phase response) 3. Astable, Monostable and Bistable multivibrator transistor bias 4. D/A and A/D converters (successive approximation) 5. Analog multiplier 6. CMOS inverter, NAND and NOR

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Circuit diagram: (i) Without feedback:

(ii) With feedback:

CURRENT-SERIES FEEDBACK AMPLIFIER

Aim: To design and test the current-series feedback amplifier and

to calculate the following parameters with and without feedback. 1. Mid band gain.

2. Bandwidth and cut-off frequencies.

3. Input and output impedance. Components & Equipment required:

SL.NO Components / Equipment

Range / Specifications

Quantity

1 Power supply (0-30)V 1 2 Function

generator (0-20M)Hz

1

3 CRO 1 4 Transistor BC107 1 5 Resistors 6 Capacitors 7 Connecting

wires Accordingly

Theory:

The current series feedback amplifier is characterized by having shunt sampling and series mixing. In amplifiers, there is a sampling network, which samples the output and gives to the feedback network. The feedback signal is mixed with input signal by either shunt or series mixing technique. Due to shunt sampling the output resistance increases by a factor of ‘D’ and the input resistance is also increased by the same factor due to series mixing. This is basically transconductance amplifier. Its input is voltage which is amplified as current.

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Design: (i) Without feedback:

VCC = 12V; IC = 1mA; β=1

fL = 50Hz; S = 2; RL = 4.7KΩ; hfe =

re = 26mV / IC = 26Ω;

hie = β re

hie = hfe re =

VCE= Vcc/2 (transistor Active) =

VE = IERE = Vcc/10

Applying KVL to output loop, we get

VCC = ICRC + VCE + IERE

RC =

Since IB is very small when compare with IC,

IC ≈IE

RE = VE / IE =

S = 1+ RB / RE = 2

RB =

VB = VCC R2 / (R1 + R2)

RB = R1 || R2

R1 =

R2 =

XCi = Zi / 10 = (hie || RB) / 10 =

Ci = 1 / (2πf XCi) =

Xco = (RC || RL)/10 =

Co = 1 / (2πf XCo) =

XCE = RE/10 =

CE = 1 / (2πf XCE) =

(ii) With feedback (Remove the Emitter Capacitor, CE):

Feedback factor, β = -RE =

Gm = -hfe / (hie + RE) =

Desensitivity factor, D = 1 + β Gm =

Transconductance with feedback, Gmf = Gm / D =

Input impedance with feedback, Zif = Zi D

Output impedance with feedback, Z0f = Z0 D

Procedure: 1. Connect the circuit as per the circuit diagram.

2. Keeping the input voltage constant, vary the frequency from 50Hz to 3MHz in regular steps and note down the corresponding output voltage.

3. Plot the graph: Gain (dB) Vs Frequency

4. Calculate the bandwidth from the graph.

5. Calculate the input and output impedance.

6. Remove Emitter Capacitance, and follow the same procedures (1 to 5).

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Tabular column:

Without feedback:

Vi =

With feedback: Vi =

Sl. No

Frequency (Hz)

Output Voltage (V0) (volts)

Gain = V0/Vi

Gain = 20 log(V0/Vi) (dB)

Sl. No

Frequency (Hz)


Gain = V0/Vi


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Model graph: (frequency response)

Result:

Thus the current series feedback amplifier is designed and constructed and the following parameters are calculated

With feedback Without feedback Input impedance

Output impedance

Gain (midband)

Bandwidth

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Circuit Diagram: (i) Without Feedback:

(ii) With Feedback:

VOLTAGE SHUNT FEEDBACK AMPLIFIER

Aim:

To design and test the voltage-shunt feedback amplifier and to calculate the following parameters with and without feedback. 1. Mid band gain.

2. Bandwidth and cut-off frequencies.

3. Input and output impedance. Components & Equipment required:



Quantity

1 Power supply (0-30)V 1 2 Function

generator (0-20M)Hz

1

3 CRO 1 4 Transistor BC107 1 5 Resistors 6 Capacitors 7 Connecting

wires Accordingly

Theory:

In voltage shunt feedback amplifier, the feedback signal voltage is given to the base of the transistor in shunt through the base resistor RB. This shunt connection tends to decrease the input resistance and the voltage feedback tends to decrease the output resistance. In the circuit RB appears directly across the input base terminal and output collector terminal. A part of output is feedback to input through RB and increase in IC decreases IB. Thus negative

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feedback exists in the circuit. So this circuit is also called voltage feedback bias circuit. This feedback amplifier is known an transresistance amplifier. It amplifies the input current to required voltage levels. The feedback path consists of a resistor and a capacitor.

Design

(i) Without Feedback: VCC = 12V; IC = 1mA; AV = 30; Rf = 2.5KΩ; S = 2; hfe = ; β=1/ Rf = 0.0004. re = 26mV / IC = 26Ω; hie = hfe re = ;VCE= Vcc/2 (transistor Active) = VE = IERE = Vcc/10 = Applying KVL to output loop, we get VCC = ICRC + VCE + IERE RC = Since IB is very small when compare with IC, IC ≈ IE RE = VE / IE = S = 1+ RB / RE RB = VB = VCC R2 / (R1 + R2) RB = R1 || R2 R1 = R2 =

(ii) With feedback:

RO = RC || Rf = Ri = (RB || hie ) Rf = Rm = -(hfe (RB || Rf) (RC || Rf)) / ((RB || Rf) + hie) = Desensitivity factor, D = 1 + β Rm Rif = Ri / D = Rof = Ro / D = Rmf = Rm / D = XCi = Rif /10 = Ci = 1 / (2πf XCi) = Xco = Rof /10 =

Co = 1 / (2πf XCo) = RE’ = RE || ((RB + hie) / (1+hfe)) XCE = RE’/10 = CE = 1 / (2πf XCE) = XCf = Rf/10 Cf = 1 / (2πf XCf) =


2. Keeping the input voltage constant, vary the frequency from 50Hz to 3MHz in regular steps and note down the corresponding output voltage.

3. Plot the graph: Gain (dB) Vs Frequency 4. Calculate the bandwidth from the graph.

5. Calculate the input and output impedance.

6. Remove Emitter Capacitance, and follow the same procedures (1 to 5).

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Tabular column:

Without feedback:

Vi =

With feedback:

Vi =

Sl. No

Frequency (Hz)


Gain = V0/Vi


Sl. No

Frequency (Hz)


Gain = V0/Vi


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Model graph: (frequency response)

Result:

Thus the voltage shunt feedback amplifier is designed and constructed and the following parameters are calculated With feedback Without feedback Input impedance

Output impedance

Gain (midband)

Bandwidth

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Circuit Diagram:

Model Graph:

RC PHASE SHIFT OSCILLATOR Aim:

To design and construct a RC phase shift oscillator for the given frequency (f0).

Components & Equipment required:



Quantity

1 Power supply (0-30)V 1 2 CRO 1 3 Transistor BC107 1 4 Resistors 5 Capacitors 6 Connecting

wires Accordingly

Theory:

In the RC phase shift oscillator, the required phase shift of 180˚ in the feedback loop from the output to input is obtained by using R and C components, instead of tank circuit. Here a common emitter amplifier is used in forward path followed by three sections of RC phase network in the reverse path with the output of the last section being returned to the input of the amplifier. The phase shift Ф is given by each RC section Ф=tan1 (1/ωrc). In practice R-value is adjusted such that Ф becomes 60˚. If the value of R and C are chosen such that the given frequency for the phase shift of each RC section is 60˚. Therefore at a specific frequency the total phase shift from base to transistor’s around circuit and back to base is exactly 360˚ or 0˚. Thus the Barkhausen criterion for oscillation is satisfied

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Design: VCC = 12V; IC = 1mA; C = 0.01µF; fo = ; S = 2; hfe = re = 26mV / IC = 26Ω; hie = hfe re = VCE= Vcc/2 (transistor Active) = VE = IERE = Vcc/10 Applying KVL to output loop, we get VCC = ICRC + VCE + IERE

RC = Since IB is very small when compare with IC, IC ≈ IE

RE = VE / IE = S = 1+ RB / RE = 2 RB = VB = VBE + VE = VB = VCC R2 / (R1 + R2) RB = R1 || R2

R1 = R2 = Gain formula is given by, AV = -hfe Rleff / hie (Av = -29, design given) Effective load resistance is given by, Rleff = Rc || RL

RL = XCi = [h ie+(1+hfe)RE] || RB/10 = Ci = 1 / (2πf XCi) = Xco = Rleff /10 = Co = 1 / (2πf XCo) = XCE = RE/10 = CE = 1 / (2πf XCE) = Feedback Network: f0 = ; C = 0.01µf;

fo =

R = Procedure: 1. Connections are made as per the circuit diagram. 2. Switch on the power supply and observe the output on the CRO (sine wave). 3. Note down the practical frequency and compare with its theoretical frequency Result: Thus RC phase shift oscillator is designed and constructed and the output sine wave frequency is calculated as

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CIRCUIT DIAGRAM:

MODEL GRAPH

WEIN BRIDGE OSCILLATOR Aim : To Design and construct a Wein Bridge Oscillator for a given cut-off frequency . Components & Equipment required:



Quantity

1 Power supply Dual (0-30)V 1 2 CRO 1 3 Transistor BC107 2 4 Resistors 5 Capacitors 6 Connecting

wires Accordingly

Theory:

In wein bridge oscillator, wein bridge circuit is connected between the amplifier input terminals and output terminals. The bridge has a series rc network in one arm and parallel network in the adjoining arm. In the remaining 2 arms of the bridge resistors R1and Rf are connected . To maintain oscillations total phase shift around the circuit must be zero and loop gain unity. First condition occurs only when the bridge is balanced . Assuming that the resistors and capacitors are equal in value, the resonant frequency of balanced bridge is given by

Fo = 0.159 RC

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Design Given : Vcc = 12V , fo = 2 KHz, Ic1= Ic2 = 1mA.; Stability factor = [0-10], fL = 100Hz When the bridge is balanced, fo = 1/ 2πRC Assume, C = 0.1µF Find, fo = ? Given data : Vcc = 15V , fL = 50Hz, Ic1= Ic2 = 1mA.; AvT = 3 ; Av1 =2; Av2 = 1; Stability factor = [10] Gain formula is given by Av = -hfe RLeff / Zi RLeff = R c2 RL hfe2 = 200 (from multimeter ) re2 = 26mV / IE2 = 26 hie2 = hfe2 re 2 = 200 x 26 = 5.2kW From dc bias analysis , on applying KVL to the outer loop, we get Vcc = Ic2Rc2 + VCE2+VE2 VcE2 = Vcc/2 ; VE2 = Vcc / 10 ; Ic2 = 1mA Rc2 = ? Since IB is very small when compared with Ic Ic approximately equal to IE Av2 = -hfe2 RLeff / Zi2 Find RL|| Rc2 from above equation Since Rc2 is known , Calculate RL. VE2 = IE2RE2 Calculate RE2

S = 1+ RB2 / RE2 RB 2 =? RB 2 =R3 || R4

VB2 = VCC . R4 / R3 + R4 VB2 = VBE2 + VE2 R3 =? Find R4 Zi2 = (RB2 hie2 ) Zi2 = ? Rleff1 = Zi2 Rc1 Find Rleff1 from the gain formula given above Av1 = -hfe1 RLeff 1/ Zi1 RLeff1 = ? On applying KVL to the first stage, we get Vcc = Ic1 Rc1 + VCE1 +VE1 VCE1 = VCC / 2 ; VE1 = VCC / 10 Rc1 = ? Find Ic1 approximately equal to IE1 R6 = RE1=? S = 1+ RB1 / RE1 RB 1 =? RB 1 =R1 || R2 VB1 = VCC . R2 / R1 + R2 VB1 = VBE2 +VE2 Find R1 = ? Therefore find R2 = ? Zi1 = (RB1 hie1 )

R5 = RL – R6 Coupling and bypass capacitors can be thus found out. Input coupling capacitor is given by , Xci = Z i / 10 Xci = 1/ 2πf Ci Ci = ? output coupling capacitor is given by , X co=(Rc2 | | RL2) / 10 Xc0 = 1/ 2πf Co Co =? By-pass capacitor is given by, XCE = RE2 / 10 XCE 1/ 2πf CE2 CE =?

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PROCEDURE: 1. The circuit is constructed as per the given circuit diagram. 2. Switch on the power supply and observe the output on the CRO ( sine wave) 3. Note down the practical frequency and compare it with the theoretical frequency.

RESULT :

Thus wein bridge oscillator is designed and constructed

and the output sine wave frequency is calculated as

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Circuit Diagram:

Model Graph:

HARTELY OSCILLATOR Aim : To design and construct the given oscillator for the given frequency (fO). Components & Equipment required: SL.NO Components /

Equipment


Quantity

1 Power supply Dual (0-30)V 1 2 CRO 1 3 Transistor BC107 1 4 Resistors 5 Capacitors 6 DIB 7 DCB 8 Connecting

wires Accordingly

Theory: Hartley oscillator is a type of sine wave generator. The oscillator derives its initial output from the noise signals present in the circuit. After considerable time, it gains strength and thereby producing sustained oscillations. Hartley Oscillator have two major parts namely – amplifier part and feedback part. The amplifier part has a typically CE amplifier with voltage divider bias. In the feedback path, there is a LCL network. The feedback network

generally provides a fraction of output as feedback.

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Design: VCC = 12V; IC = 1mA; fo = ; S = 2; hfe = re = 26mV / IC = 26Ω; hie = hfe re = VCE= Vcc/2 (transistor Active) = VE = IERE = Vcc/10 Applying KVL to output loop, we get VCC = ICRC + VCE + IERE

RC = Since IB is very small when compare with IC, IC ≈ IE

RE = VE / IE = S = 1+ RB / RE = 2 RB = VB = VBE + VE = VB = VCC R2 / (R1 + R2) RB = R1 || R2

R1 = R2 = Gain formula is given by, AV = hfe RLeff / hie (Av = -29, design given) Effective load resistance is given by, Rleff = Rc || RL

RL = XCi = [h ie+(1+hfe)RE] || RB/10 = Ci = 1 / (2πf XCi) = Xco = Rleff /10 = Co = 1 / (2πf XCo) =

XCE = RE/10 =

CE = 1 / (2πf XCE) =

Feedback Network:

f0 = ; L1 = 1mH; L2 = 10mH

A = = -

f= C=

Procedure: 1. Connections are made as per the circuit diagram.

2. Switch on the power supply and observe the output on the CRO (sine wave).

3. Note down the practical frequency and compare with its theoretical frequency. Result: Thus Hartley oscillator is designed and constructed and the output sine wave frequency is calculated as

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Circuit Diagram:

Model Graph:

COLPITTS OSCILLATOR

Aim :

To design and construct the given oscillator at the given

operating frequency.

Equipments required:



Quantity

1 Power supply Dual (0-30)V 1 2 CRO 1

3 Transistor BC107 1

4 Resistors

5 Capacitors

6 DIB

7 DCB

8 Connectingwires Accordingly

Theory: A Colpitts oscillator is the electrical dual of a Hartley oscillator. In the Colpitts circuit, two capacitors and one inductor determine the frequency of oscillation. The oscillator derives its initial output from the noise signals present in the circuit. After considerable time, it gains strength and thereby producing sustained oscillations. It has two major parts namely – amplifier part and feedback part. The amplifier part has a typically CE amplifier with voltage divider bias. In the feedback path, there is a CLC network. The feedback network generally provides a fraction of output as feedback.

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Design: VCC = 12V; IC = 1mA; fo = ; S = 2; hfe = re = 26mV / IC = 26Ω; hie = hfe re = VCE= Vcc/2 (transistor Active) = VE = IERE = Vcc/10 Applying KVL to output loop, we get VCC = ICRC + VCE + IERE RC = Since IB is very small when compare with IC, IC ≈ IE RE = VE / IE = S = 1+ RB / RE = 2 RB = VB = VBE + VE = VB = VCC R2 / (R1 + R2) RB = R1 || R2 R1 = R2 = Gain formula is given by, AV = -hfe RLeff / hie (Av = -29, design given) Effective load resistance is given by, Rleff = Rc || RL RL = XCi = [hie+(1+hfe)RE] || RB/10 = Ci = 1 / (2πf XCi) = Xco = Rleff /10 = Co = 1 / (2πf XCo) = XCE = RE/10 = CE = 1 / (2πf XCE) = Feedback Network: f0 = ; C1 = ; C2 =

A = = -

f = L=

Procedure: 1. Rig up the circuit as per the circuit diagrams (both oscillators). 2. Switches on the power supply and observe the output on the CRO (sine wave). 3. Note down the practical frequency and compare with its theoretical frequency. Result: Thus Colpitts oscillator is designed and constructed and the output sine wave frequency is calculated as

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CIRCUIT DIAGRAM:

MODEL GRAPH:

CLASS C SINGLE TUNED AMPLIFIER AIM: To study the operation of class c tuned amplifier.

APPARATUS REQUIRED: SL.NO

Components / Equipment

Range / Specifications Quantity

1 Power supply (0-30)V 1 2 CRO 1 3 Transistor BC107 1 4 Resistors 4.2KΩ,500Ω,197KΩ,2.2kΩ 5 Capacitors 0.1µf,0.001µf,100µf 6 Connecting

wires Accordingly

7 Function generator

1

THEORY: The amplifier is said to be class c amplifier if the Q Point and the input signal are selected such that the output signal is obtained for less than a half cycle, for a full input cycle Due to such a selection of the Q point, transistor remains active for less than a half cycle .Hence only that much Part is reproduced at the output for remaining cycle of the input cycle the transistor remains cut off and no signal is produced at the output .the total angle during which current flows is less than 180..This angle is called the conduction angle, Qc

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Tabular column:

Vi =

PROCEDURE: 1.The connections are given as per the circuit diagram. 2. Connect the CRO in the output and trace the waveform. 3.calculate the practical frequency and compare with the theoretical Frequency 4.plot the waveform obtained and calculate the bandwidth RESULT: Thus a class c single tuned amplifier was designed and its bandwidth is Calculated.

Sl. No

Frequency (Hz)


Gain = V0/Vi


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Circuit Diagram: Differentiator

Model Graph:

WAVE SHAPING CIRCUITS (Differentiator, Integrator, Clipper and Clamper)

Aim: To design and implement different wave shaping circuits

(Differentiator, Integrator, Clipper and Clamper). APPARATUS REQUIRED: SL.NO Components /

Equipment Range / Specifications

Quantity

1 CRO (0-20M)Hz 1 2 Resistors 1KΩ,100kΩ 3 Capacitors 0.1µf 4 Connecting wires Accordingly 5 Function /Pulse

generator 1

Theory: Differentiator: The high pass RC network acts as a differentiator whose output voltage depends upon the differential of input voltage. Its output voltage of the differentiator can be expressed as,

Vout = Vin

Integrator: The low pass RC network acts as an integrator whose output voltage depends upon the integration of input voltage. Its output voltage of the integrator can be expressed as, Vout = ∫Vin dt

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Circuit Diagram Integrator

Model Graph:

Clipper: This circuit is basically a rectifier circuit, which clips the input waveform according to the required specification. The diode acts as a clipper. There are several clippers like positive clipper, negative clipper, etc. Depending upon the connection of diode it can be classified as series and shunt. Clamper: The clamper circuit is a type of wave shaping circuit in which the DC level of the input signal is altered. The DC voltage is varied accordingly and it is classified as positive clamper or negative clamper accordingly. Design: Differentiator: f = 1KHz τ = RC = 1ms If C = 0.1µF Then R = 10KΩ For T << τ, Choose R = 1KΩ and For T >> τ, Choose R = 100KΩ Integrator: f = 1KHz = RC = 1ms

If C = 0.1µF Then R = 10KΩ For T << τ, Choose R = 1KΩ and For T >> τ, Choose R = 100KΩ

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Clamper: Positive Clamper:

Model Graph:

Negative Clamper

Model Graph:

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Clipper: Series Positive Clipper:

Model Graph:

Series Negative Clipper:

Model Graph:


2. Set Vin = 5V and f = 1KHz.

3. Observe the Output waveform and plot the graph. Result: Thus different wave shaping circuits are studied and their output waveforms are plotted.

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Circuit Diagram:

Model Graph:

ASTABLE MULTIVIBRATOR Aim:

To design and construct an astable multivibrator using transistor and to plot the output waveform.

Components / Equipments Required SL.NO



1 Power supply (0-30)V 1 2 CRO (0-20M)Hz 1 3 Transistor BC107 2 4 Resistors 4.9KΩ,1.6MΩ, 2 each 5 Capacitors 0.45nf 2 6 Connecting

wires Accordingly

Theory:

Astable multivibrator is also known as free running multivibrator. It is rectangular wave shaping circuit having non-stable states. This circuit does not need an external trigger to change state. It consists of two similar NPN transistors. They are capacitor coupled. It has 2 quasi-stable states. It switches between the two states without any applications of input trigger pulses. Thus it produces a square wave output without any input trigger. The time period of the output square wave is given by, T = 1.38RC.

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Design Procedure: VCC = 10V; IC = 2mA; VCE (sat) = 0.2V; f = 1KHz; hfe =

RC = = = 5.9KΩ

R ≤ hfe RC = 315 * 5.9 * 103 = 1.85MΩ R = 1.5MΩ T = 1.38RC C = T / (1.38R) = (1 * 10-3) / (1.38 * 1.5 * 106)= 0.48nF Tabular Column:


2. Switch on the power supply.

3. Note down the output TON, TOFF and output voltage from CRO.

4. Plot the output waveform in the graph. RESULT:

Thus the astable multivibrator is designed and constructed using transistor and its output waveform is plotted.

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Circuit Diagram:

Model graph

MONOSTABLE MULTIVIBRATOR

Aim: To design and construct monostable multivibrator using

transistor and to plot the output waveform. Components / Equipments Required: SL.NO



1 Power supply (0-30)V 1 2 CRO (0-20M)Hz 1 3 Transistor BC107 2 4 Resistors 4.9KΩ,1.6MΩ, 2 each 5 Capacitors 0.45nf 2 6 Connecting

wires Accordingly

Theory:

Monostable multivibrator has two states which are (i) quasi-stable state and (ii) stable state. When a trigger input is given to the monostable multivibrator, it switches between two states. It has resistor coupling with one transistor. The other transistor has capacitive coupling. The capacitor is used to increase the speed of switching. The resistor R2 is used to provide negative voltage to the base so that Q1 is OFF and Q2 is ON. Thus an output square wave is obtained from monostable multivibrator.

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Design Procedure: VCC = 12V; VBB = -2V; IC = 2mA; VCE (sat) = 0.2V; f = 1KHz; hfe =

RC = = = 5.9 KΩ

IB2(min) = IC2 / hfe = Select IB2 > IB2(min) IB2 =

R = =

T = 0.69RC C = T / 0.69R =

VB1 =

= (since, V B1 is very less)

VBBR1 = VCE (sat) R2

R2 =10R1 (since, VBB = 2V and VCE (sat) = 0.2V) Let R1 = 10KΩ, then R2 = 100KΩ Choose C1 = 25pF. Tabular Column:


2. Switch on the power supply. 3. Observe the output at collector terminals.

4. Trigger Monostable with pulse and note down the output TON, TOFF and voltage from CRO.

5. Plot the waveform in the graph. Result:

Thus the monostable multivibrator is designed and constructed using transistor and its output waveform is plotted.

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Circuit Diagram:

Model Graph:

BISTABLE MULTIVIBRATOR

Aim: To design a bistable multivibrator and to plot its output

waveform.

Components / Equipments Required:

SL.NO



1 Power supply (0-30)V 1 2 CRO (0-20M)Hz 1 3 Transistor BC107 2 4 Resistors 4.9KΩ,1.6MΩ, 2 each 5 Capacitors 0.45nf 2 6 Connecting wires Accordingly

Theory:

The bistable multivibrator has two stable states. The multivibrator can exist indefinitely in either of the twostable states. It requires an external trigger pulse to change from one stable state to another. The circuit remains in one stable state until an external trigger pulse is applied. The bistable multivibrator is used for the performance of many digital operations such as counting and storing of binary information. The multivibrator also finds an applications in generation and pulse type waveform.

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Design: VCC =12V; VBB = -12V; IC = 2mA; VCE (sat) = 0.2V; VBE (sat) = 0.7V

RC = = = 5.9 KΩ

R2 ≤ hfe RC = 315 * 5.9 * 103 = 1.85MΩ R2 = 1.8MΩ Let R1 = 10KΩ, C1 = C2 = 50pF Tabular Column:


2. Set the input trigger using trigger pulse generator.

3. Note the output waveform from CRO and plot the graph. Result:

Thus bistable multivibrator has been constructed and its output waveforms are studied.

31


Circuit Diagram:

Model Graph:

SIMULATION LAB

DIFFERENTIAL AMPLIFIER

Aim: To implement the differential amplifier using PSPICE.

Theory: A differential amplifier amplifies the difference between two

voltages V1 and V2. The output of the differential amplifier is dependent on the difference between two signals and the common mode signal since it finds the difference between two inputs it can be used as a subtractor. The output of differential amplifier is

Vo =RF /R1 (V2 – V1)

Calculation: V1 = 5V V2 = 10V

Vo =RF /R1 (V2 – V1) = 10k/10k (10 – 5)

Output: VO = 5V

Result:

Thus a differential amplifier is implemented using operational amplifier.

32


Circuit Diagram:

Model Graph:

SECOND ORDER BUTTERWORTH - LOW PASS FILTER

Aim:

To design and implement the second order butterworth Low pass filter using PSPICE.

Theory:

A Low pass filter has a constant gain from 0 to fH. Hence the bandwidth of the filter is fH. The range of frequency from 0 to fH is called pass band. The range of frequencies beyond fH is completely attenuated and it is called as stop band. Design:

fH = 1000HZ C1= C2 =0.1µF RIN=1000Ω fH = 1 / 2ПRC R = 1 / 2ПCfH R = R1 = R2 = 1592Ω Gain = 1.586 1.586 = 1 + (RF / RIN)

RF = 586Ω Result:

Thus Low pass filter is designed and implemented using PSPICE.

33


Circuit Diagram:

Model Graph:

ASTABLE MULTIVIBRATOR

Aim: To plot the transient response of voltages at collector

terminals of the two transistors Q1 and Q2. Initial node voltages at collector and base are zero.

Theory:

It has two quasi stable states. The transition between the two states occurs automatically due to charging and discharging of the capacitors and not due to any external trigger. Thus none of the transistor is allowed to remain in ON or OFF state. Design:

VCC = 10V; IC = 2mA; VCE = 0.2V; C = 0.9Nf RC = VCC - VCE (sat) / Ic = 10 - 0.2 / 0.002 = 4.9 KΩ R ≤ hfe RC = 850KΩ T = 1.38 R C T = 1ms C = T / (1.38R) = 0.9nF

Result:

Thus astable multivibrator is designed and transient response is plotted.

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Circuit Diagram:

Model Graph:

MONOSTABLE MULTIVIBRATOR

Aim:

To plot the transient response of voltages at collector terminals of Q1 and Q2. Initial voltages of base and collector of Q1 transistor is zero.

Theory:

Monostable multivibrator has two states which are (i) quasi-stable state and (ii) stable state. When a trigger input is given to the monostable multivibrator, it switches between two states. It has resistor coupling with one transistor. The other transistor has capacitive coupling. The capacitor is used to increase the speed of switching. The resistor R2 is used to provide negative voltage to the base so that Q1 is OFF and Q2 is ON. Thus an output square wave is obtained from monostable multivibrator.

Result: Thus monostable multivibrator is designed and transient

response is plotted.

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Circuit Diagram:

Model Graph:

DIGITAL TO ANALOG CONVERTER

(R – 2R LADDER TYPE) Aim:

To construct a 8 – bit digital to analog converter using R – 2R ladder type. Theory:

A DAC accepts an n – bit input word b1, b2, ……, bn in binary and produces an analog signal that is proportional to the input. In this type of DAC, reference voltage is applied to one switch and the other switches are grounded. It is easier to build and number of bits can be expanded by adding more R – 2R sections. The circuit slow down due to stray capacitance. Observation:

Calculation: Output Voltage, VO = VR (d12-1 + d22-2 + d32-3 )

For 100, VO = 5V Output:

VO = 5V Result:

Thus R – 2R ladder type digital to analog converter is implemented

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Circuit Diagram: (i) Inverter

(ii) NAND

CMOS Inverter, NAND and NOR using PSPICE Aim:

To plot the transient characteristics of output voltage for the given CMOS inverter, NAND and NOR from 0 to 80µs in steps of 1µs. To calculate the voltage gain, input impedance and output impedance for the input voltage of 5V. Parameter Table:

Theory: (i) Inverter

CMOS is widely used in digital IC’s because of their high speed, low power dissipation and it can be operated at high voltages resulting in improved noise immunity. The inverter consists of two MOSFETs. The source of p-channel device is connected to +VDD and that of n-channel device is connected to ground. The gates of two devices are connected as common input. (ii) NAND

It consists of two p-channel MOSFETs connected in parallel and two n-channel MOSFETs connected in series. P-channel MOSFET is ON when gate is negative and N-channel MOSFET is ON when gate is positive. Thus when both input is low and when either of input is low, the output is high.

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(iii) NOR

Truth Table: (i) Inverter

(ii) NAND

(iii) NOR

(iii) NOR

It consists of two p-channel MOSFETs connected in series and two n-channel MOSFETs connected in parallel. P-channel MOSFET is ON when gate is negative and N-channel MOSFET is ON when gate is positive. Thus when both inputs are high and when either of input is high, the output is low. When both the inputs are low, the output is high. Output: (i) Inverter

Gain = V(2)/Vin = Input Resistance at Vin = Output Resistance at V(2) =

(ii) NAND Gain = V(4)/Vin1 = V(4)/Vin2 = Input Resistance at Vin1 = Input Resistance at Vin2 = Output Resistance at V(4) =

(iii) NOR Gain = V(4)/Vin1 = V(4)/Vin2 = Input Resistance at Vin1 = Input Resistance at Vin2 = Output Resistance at V(4) =

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Model Graph: (i) Inverter

(ii) NAND

(iii) NOR

Result:

Thus the transient characteristics of output voltage for the given CMOS inverter, NAND and NOR is plotted and the voltage gain, input impedance and output impedance are calculated.

Documents

electronics lab EC 2257