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ECE231 Area3
Introduction to
Electronics
.
"
Operational Amplifier Circuits
-Circuit Model for Amplifier Lecture 3: 1/9/2020Lecture I : 1/6/2020 -1soor=AmI#loaded
FrequdncyResponse of AmplifierAmplifier source amp-
-Load
Amplifier as blackfoot q¥÷./ VI¥" AF Etanfidea"↳ Manipulates electric signal In general Creal amplifier) → Transfer function
Ideal Amplifier-
input a Amp output Vo=AvoVir¥ Iink ) Au=T(w)=V÷ f Amplitude ITCH=AuVs¥kin¥i- very low Rooted Phase LTCW)voltagecurrentpower - -
Becomes I Becomes I
Gain -_%tI¥Ig÷II¥ Henri Vo=AvVs" Ideal amplifier
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-
BacnBd%dth# corner
Modelling circuit system
I3dBfrequencyBasictypeso-G.am
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A=¥.
voltage amplifier ¥. to
Voltage gain
A ¥÷ current amplifierunEFFI.! I:{faiF.÷ Dcttmplifier ax- coupled
II Transconductance amplifier ITCH^
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Determine RindRootAmplifies Dc
V¥.
Trans resistance amplifier - signal asParameters of amplifiers well as AC
signalsVoHageGainCAtorn , 20dB ④ An. → open circuit voltage gain ↳w- IOVN-720dB → Measure open circuit
AV=¥I IVN) 106Wh 120dB o=µ-o output voltage
Audie 2010%1
!-1dB ) I
www. WEEA"=¥⇒7nMp¥%Yt"age AGamper CAC-coupled) z
lover -20dB=
⇒Noted ! !(Bandwidth) ¥ap¥or#→CurrentGainC iowrw
- 10dB② Rin -7 input resistance Hwy t- BW-1 SER
¥.To:*⇒ .* :÷:¥:3. w.io#E-oriniEiI::::::i: .w⇒→⇐.
own- -20dB Loto""" / i i ↳ocpaepnacj.fr#arfespYPower Gain CAp) 001mW -
=
. ! -- ③ Root → output resistance
② measure-W ow.=D-7 ZEOAp=t¥[WWI 1,0%87,19%3
, ,
f-if-0-1i I voltage W"
' WZ↳ capacitor works as
ApdB=10logo
ftp.T/-LdBIo.oiw/w---2OdBEO ROOT = FITc-① Acpopyyenqyna" short-circuit@ high freq
Typical Amplifier↳ see
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an independent source into zero LOW Passf High Pass Filters- Auto Auto Afl y
is:÷÷E.am#=i.o.e*7.ie?k*-EH*se..riooreYnFertfYngTfmf'I¥eY"iresivsotaniemeoiineaahmp::&'
Low pass High Pass
ideaiiimepiirieiFatalAmplifier usnm¥÷÷s¥.÷¥EnR¥s¥r. Hani
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eat""""'!- =
Tcas ;¥¥.
TCwfk¥YT÷,
¥÷iE¥¥F¥ EEE away;⇒ 60dB Gotto-101-
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ago 450
sourceamplifier load
Assume that op-amp is
idealLTCW)
→ooh. .
Realtµ÷actugaa.ynoltage-o.utputvotto.ge r , ME TRY) LTCWK- tankful Ltcwtgoo- tariff)input voltage
=¥Rinµwt¥LvoEYE Vo -
↳ towerthan idealvoltage gain. towsource amp , amps amps load
=
"⇒ Passive ¥ImF¥foot In!-47,37¥,
usEkka-
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us €¥÷÷÷÷!¥±. ÷
.io?:I::s...EiiE#fE7-circuit -1cm
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in nu::÷÷÷.ve#asnsof '
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OP v.to#IEIovou..EmrtFIEI"39.2dB -0.83dB
⇒57.4dB
- AMP
I Roof 'f¥=¥, -- OR circuit Tcwk¥w=,F;÷r.Took.ru#r.=iYfwEri
Lecture 4 : 1/13/2020 Lecture 5 : 1/1412020 EC 313en Transconductance amplifier
⇒ Ideal Ricer? rs0 Difference Amplifier
u Howdowegetvo?" Integrator of Differentiator
MaximizeVi⇒Ri=O¥fTgk¥oT§r÷Igr. FRY ⇒ superposition :
Invertingcircuit
A"%Igtr9es⇒Ro=o L # u¥fFT→V°①Vz=o⇒vo=-Renu , v. -EtfIou. VE- ET Vimy, .cienvoltagega.in Vow vz TER,
vz.lk#rI2OVi--O=Vo=CHFTRFFrTV2I:IFI:Isiou.
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¥sg±¥Iro}I÷. ③ Add v. from vo= - Rrivitutrrrv."Negrito
¥.r-zodmoe.de
Vo.= -CrohnGFTITEVS 0 Ideal IntegratorNone - crollrdGFF.rs
① and ②If R¥=Rzz ⇒ Vo RICKY ) ¥= - skit
Get input resistance
!.?g÷¥.mu?o1nputResistancecseenbyvz-u,
VI inF¥IoVo 0dB
Rin=¥ ,tx=GmV: r , ④
±
↳ DC gain becomes- Rl Mm inversein Wo -70.
Rin-1¥.ir#rriv.v,
ovo Rin=u Laplace= Rita
¥I= - SIRI '⇒ VE -r, VICT)dT
Ideal op-amp circuits- ET.fi"
↳ Any DC component at the input causes Vo to
Vj, VEACH -V- I 0 Instrumentation amplifier saturate ! ! climitvo)
Ideal op-amp when Again) -700 ↳ Non - inverting configuration- voltage source connected to ⇒ Add
"
large enough"
R2 parallel to Capacitor- mmmm
positive terminal-0, Vi . -
-- - - -
- ---
;
R2
olnverting amplifier
okeyVi
TFqj' '
"TM:⇒. it:#sire:* .ro. ¥.viii.''E'III'IEi÷÷÷⇒*m¥÷.
IET.
Rz by op-amp f-TERO! ; 1¥¥.fi#iI!EIIFF1rfIov.=.r*u...r:*. Florin:ivoeiu.hr#u-u' weer
-
rads,noiarbgeeyery 1¥.tninE¥mRw3→'
i UNIT -oweighted summing circuit
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⇒""" " 'FifeAmplifier! Rfid
w
±÷÷÷÷÷¥÷÷÷÷:*.cat#Lecture6:norozo I""i⇒÷÷÷÷÷÷÷÷÷÷.in:1
Positive vs Negative feedback0 Differentiate
olnverting Configuration with general impedance-
oOpen Loop Amplifier VI-F.IE#.IoVoVoz=-SRC÷÷i÷÷÷÷÷÷÷÷÷÷÷.ru#*uo=acu-nvo*....ic*dt097¥!"
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inert!!.fr?y;.gmg!!!IYo=-riE-ratEsthEt ↳ No feedback 0dB ⇒ Not really useful
IT.IE#FR3tETRT/---RrfVI-Rff.EiE-RrfH ↳ Very difficult to design an amplifier Gharpsoundchighfreqlis amplified)
↳No Vo= - Rep,v±cµr*+q÷, with a desired gainet] Order the circuits from high-low input resistance
• High Rin ⇒ High RI . High gain ⇒ High Rz&R4 .Make Rs small enoughy.it#-ww-1.fmw-.2oNon-inverting amplifier
0 Negative feedback circuit I÷E¥I¥I.!¥ie¥¥!nee.¥I¥¥÷okey I /
- virtual shortcutI ↳ Creates ' stable system' and ¥
MYRYI-ovovo-fkz.pt/yv, '
well defined'
output exholtage amplifierRin -10 Rin --E=R Rin"7=2R
ETI ooo ① 730720
Whity- Gain Buffer R , TTY) ex) Output resistance ? Router
Vi-wmwF¥→Vo ¥p÷.¥ufr¥ssho%Iei¥÷z÷.ie#oouuIEw-o"no:p.FI#orEou.Vo=VI f it=
RED , REOo Positive Feedback Circuit ex] Input voltage IV applied at input of circuit.
0 Usefulness of Unity -gain buffer ↳creates' unstable
'
system and What if op-amp terminals are reversed? ?
Ri=5kR Rz -40kt Vcc HOV
votoofoorowrmspspea.ee. = output tends to reach extremegoer iokr
mpinornoeoo.IE#IoEI9d8Eaker' 'I'IYf7fm
,⇒ no." w cpower supply to op-amp) ex) Oscillator Mfp MYTHIBIG Ditrerence
vonysaturated hY-¥→vo iTovoIii vo-o.lvrmspspeaieer-co.io#=Ixio-3w RI THY) Vad .
-
¥0 N Ifor NII-lovmpinornoeoo.wrmsg.h.FI#I9dfFraker Vio-
www.t#--oVo/-=
← I Negative feedback Positive Feedback-Udd . -
- - - -- -
y, ,
;
=
Vaa- power supply'
attached to op-ampVo= -
Iff.lV=-2V Vo=Vcc .
Csatorated)
Lecture 7: 1/20/2020 Lecture 8-9 : 1/21423/2020 ex) Inters 'd
HA2540.EC314
ex) Miller Integrator IKOMA, Io#0nA. GBP-400MHz RTL
DC imperfections ftp.y-itatz#--tIBz-Iml . Bandwidth in time domain- a) Rz to compensate
oldealopanp. EF.fi?:MvorsIaaYEi8EhTh=a.aror
⇐T¥ho8Yb¥wftvcc
C R"=¥¥%worst-case DC output voltage ?→ using superposition, Unity Gain W3dB=
Wt
' """ ¥T÷÷j¥
.ae?nefoa=nyoswagieEhtIosinr--a3BvttIII.
.io#*oNon-ideal op-amp? ⇒ DC offset voltage !- whereVECTEIVIE -0.159145
-need To solve finna! v±o-%i¥Iov. YEE - RE,⇒⇐
Vos#± ③ compensate Lecture 9 - 10 : 1/23427/2020W Vos IDC offset voltage ↳ Ideal op-amp A too
IB= Biased current . Real op-amp
"
: A constant Limitations of op-amp → understand those
① Model real op-amp having a constant A- andtaoothem !
VI
-1① Output voltage saturation → upperflower limit of Vat
① IBI
v.÷÷i-4¥'
to In. =ri÷¥÷I÷÷÷¥o
"""
inVt
KCL3 -Vomax
① Vos Cotfset DC voltage) KEY -11%7=0 Vo=ACVt -VII - AV- ②Output current saturation → Limit into continual
W¥? V,Substitute BD into ① 0.125A is
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too much '
Basin't.int.in's::n.uoI¥" ¥=IY¥ni÷ ax HE.¥± . .E. w¥¥!⇒¥÷÷..at:9#Ihsetoni:wtase
With Vos.
ex, Rilke ,REIookr.VE-o.lv C2OmAH8R=O
Earn.t.IE?Lou.Vo--VosMIT⇒ ¥=÷¥÷!÷¥¥÷÷
. !:*!:÷:.E÷÷÷÷÷÷÷i÷÷:÷. ③ siewrate-mgyargeteo-rchangeorou.intFRY =VosCH¥) ② Finite op-amp gain & bandwidth
or -am
SR=dd¥/ma, ⇒ Cannot make rate of
Fs ⇒ Same am plication a' any ,Ao⇒osaoodB, * w⇒xf Change faster than
signal . Faff' 041 's SR=tHMs) slew rate.
OWAYS to compensate
lminim'Re Vos AtoseorRea¥a* -V y:%h%ge ex) Unity gain buffer,ACW)=µA 741 OP amp ff÷Bpe, ! ⇒ Distorted W-E2-kxlooradb.SE#V/MS
I. Trimming I ttdodcbfopffcifgr Wb A- "Tisdale't ¥%qm% Find the largest step CVII
Signal CAC coupling) ACWeft-II.gg/nEfbCbreakfreaffeconitygaintrea, possible without slew rate limiting↳ fgraemauejfcayrswhergrop ↳ tremens where #
1-1W-EW3dB
,as it is unity gain .
.
CRI Mt)v.fi#-VoVo=VICl-e--v-YqffaYigaendsVIo-ltnfov-fyzL-ovoW-Fto'Wb LAdd¥=V e-tr=VI' Wears
°- " I * In high-frequency, -45,! ⑨ to
.
I l I Vee '
op-amp shows low-pass Ideal ,
STEVEWt.
⇒ IWM5- VI.212406"
M¥4,40Wend)vogC%¥o=µ, transfer function -900 . -- - --
--- . -
- --! F-wtf VI -- 0.159 V .
" onion - inverting amplifier using op-amp ACW) Full Power Bandwidth" Offset -
The effect of Vos is R2 4Max. frequency sine wave an op-amp can produceNULL"
reduced funny,÷¥¥Iw.
v¥=CH4rKt¥#) at maximum amplitude without slew rate limiting
② Biasing current ftp.E/4tcH#*Oo+;*w.TlqYeIIerrigqb..:u..aamp,
Voctkvomaxsincztftl
¥←µB ,
Vo=R2IBl wzdpj-W-t~CHRTCHCHEK.FI! > f¥=2IfVomaxC0SC2TLfH
.EEL HIT xCHE.tl#ww..y I¥Imax= 5kNoft.TK#yQIBilE-X Gain Bandwidth ProductCGBP) Utama= #OVO- ex)Op-amp 741 ,
Vcc=Vomax=IIOYSR=IlWMsecEf¥±.non. " Its '⇒. FIE".fireal:*:*. weather.tw..'It'÷÷:÷EY÷i÷÷
'IIIa:Emodpeaalmp Ios=IBz- IBI HE
, i"GBP" Tainbandwidth Vo=zF¥=z!÷**⇒=N
very small I -45.9kHzWbW'3dB We
> WNote Thereis a tradeoff IAINo Ways to compensate IB .
enop-amp741.GBEW.kzMHz b.entourage
.gnaajo.gmgffy.de?fireg9uen4 f¥%
FRYVo=IBiRztfRsIBiCHFH Cg'S?n¥f%P Bandwidth Example
Twolimi.la#onsonBandwidth-VoED-maxEtHI=-mRiTqI.," I"
Goat, make Vo =o. HOO10kHzAudio amplifier
o small signal BW related to We inFt"* *arm.
It too"¥¥n'innit:÷:
oei.ir#as:::::::wnreni:i::::::eiii=TtQIBTVo=CIB,
- In)Rz I KIB- I 500kHz Inverting
osman - signal BW o Large -signal BW
=Ios ' Rz (HART) XFSDBXZTEIMHZXZTL = 625MHz @ so .lv =HMH2⑤2Vpp
DIODES Lecture 12 : 1/30/2020 maltase ECEZ315Diode Models In many situations , we want to analyze
Instantvoltage behaviour of circuit subject to small variations
Lecture It: 1/28/2020 Ideal drop CAD) Exponentialaround normal operating point
--in in
ONrt Forward Bias
Diodes Ttt 89rerenwta.fi?wsEoIErren-i Flo t.o.am7¥:&:;;÷¥ ex) Assume supply voltage varies 5VIO.su .
- anode cathode - EFFIE in other directionoff ⇐o v off ⇒ Variation of diode Voltage?
Ideal Model > on> V l Possible methods
Diode ON of Diode Diode OFF REEF ¥848877's " €#YEfT¥¥ iousediodeexponentialmodel+ OV -
Mi+ V -
o Reverse bias region =5±o5V ⇒ Vcdiode voltage) when Vm=45V&55V-875
RB.%3effff.rwjerddanodea.FIobcathode I ⇒ Require precise calculation with many4co⇒ ↳ current is very small KINA) and negative ② Small Signal Analysis iterations -1 Diode voltage variation
Must have positive#⇐⇒→
must have a → like leak in mechanical valve Cnegligible)- isverysmall
Diode is negative voltage - ↳ Create linear modelnon-linear - o Breakdown Region of diode around its DC bias point CVDD -5N
⇒ Forward Biased - Cprevent current to flow)
c short circuit )device ⇒ Reverse Biased ↳ Like a rupture of mechanical valve in extreme Total
.
signal = DC signal TAC signalClinear -10hm 's law) open circuit)
pressure Cvzkryzooy)⑤ VdI CD = ID t Cd
Howtoanalyzediodec.RU# → Operation in this region is not destructive VD = Vp -1 Va
if current C powers is limited properly8asnsaIazet.net?n:Iea9ehdeassumption-ivuecanworkasvoltage regulator ⇒ smaller Kk .
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.?÷÷¥¥eI÷¥¥CONT Short Circuit EFI Open Circuit)
③Eherywhether your assumptions are correct0 Forward biased region
④ Any inconsistency →Uaicrepeat ① ~③) I = Is @VNT # VIV,
- In ) &pd=V± " Small signalex) 2 Diodes → Find Vo .
Is - saturation current ID Model of diode"
qtiov Assumption Both on .
X 10-940' " A ° VT : Thermal Voltage
process of small Signal ModelHuggervoltage on node --Vo=OVC8nd ?) 4 Dependent on tfoethmmpeananFIT"-fu, Lovo 'uth=i3=t¥=ImA junction area of temperature VT=¥g- elementary charge ①Calculate DC bias
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point CVD.IO )
p , # Dz iz=F¥r=2mA ⇒'
u cannot be -1mAn
↳ VTx25mV ② room temp ② Calculate rd=Y÷ CVt 5mV Oa room temp)NodeWAssumption Di Off 2 On V - - - - - -
-
works 100nA NIA13410ktvoltage on node -_Vo . = 107ft .IO- to V
.
[= Is @ UNT ③ zero all DC elements in circuit
I - lov it doesn't exist ⇒ Assumption.FI Is @ van,Cshort voltage source . open current source)
LOgicbat.es#ECE24lmwLE*augn-EnzTz ⇒ * µ÷ ,④ use small signal model
VB on Lecture 14: 2/4/2020Y,zI¥I¥Lpvo ON OFF
ex) Given Diode voltage is 0.7k LIMA. ex) Assume supply voltage varies 5VIQ5V .
VAON I I
OR OFF I 0 Is when ( = Iseult ? Is e-"""25%6.9140
.''A ⇒ variation of diode voltage?Ego te F
AND two VB o current flows iz IMA 1mA IA ⑤TYfT¥¥⇒OIY.dad.IT/kY7era{ R on OFF to diode which VEQHO.025lnllnhtIISVOO.8-5-to.SUI¥u
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VA ON tofu toff✓ ✓
-HIT" VAoff toOOD ison ex) Find Vo
,.D , has 10x junction area of Dz
. ① Set DC bias point QCVDID)VB -H r
TurnVDz=VatVo, ⇒ Vo=VD2-VDI ④¥qlkrIT¥¥⇒, ID=VD9¥
Half - wave Rectifier 1010mA =VHnCi¥iI÷)--43mA
-
¥-1-1 ' -
-0 t Dat,turnDEFY' ¥¥sEe""""" =VHnCEF÷Ef) ② Extract small signal circuit
v, Ter v.
"#t8M¥' m¥Yma
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=EI;%mY4%m+emp, qvaa-eo.su#frTFjIIurd=VIoT=25nmTtX -1-1-0- V⇒0i¥o Lecture 13 :2/3/2020
③Anaiyesmatsigaiircuit⇒ ' 8h
• When VITO CDon
)⇒Vo=VIextend v. where diode has ON for current 1mA . VEpfftdvdd-oboffe.CIO.SN#2.9mV
Troi:.
v
"fee '
out:*EI:"÷aa¥u¥
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is÷::*:em-7 C25mV) C0.4% Variation)Io
- VITO VICO rex]"% """"°"
① DC operating pointo when CDO ⇒ Vo
n u?!&%¥" t"
i!¥ou u
Ubb .IQ?Itotov.IFHerTtoT.o o -0 t 1-1-1/-026 ¥0.7#oo-
VIE TER Vo in
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VICO VITO ¥↳-
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solutionV0.7%901361%4
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3W② calculaterd-ifzcq.am#=VbKf.Io=VbKItI
o What if diode was real? €736'eT42647mA i 1mA 43mA③ Small -signal model equivalent circuit
No VoLte) Real--
Vo ^ charger off zone Comparison of using different modelsthan on zones - f{pi÷÷:
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o.E.MU#ErEy*z.,+u.iIagosmasimpieI¥{EnronVouithitthatrivs
⑦ 5V ON 4.3mAbefore CVD /conducting ✓
µ
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Also known as
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1-
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extend I that TO Lecture 16 : 2/10/2020 Voltage doubler ECEBIGproduce -450 phase -
delay of output tITn¥° o Back to full -wave rectifier
C-lampi-9.cat#4rfIaartgIE9aEgeYgeai:*,① DC point CQ) u , ±E Peaktdetector
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HOW can Cdamped)
t " id a.
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¥F¥w% Tv . .
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=¥¥on , , o
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÷:*:*.am;r¥¥. on, @u.I,E¥¥÷¥¥⇐→⇒v.Hot ⇒ ¥=¥ A Lecture 18 : 2/13/2020⇒
÷÷÷¥¥:¥..¥¥ixoiE⇒
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no¥÷iI¥÷÷¥:* :¥¥±÷¥÷⇒±.ee#..:::o:::i:or
Di OFF Da ON ⇒ Max Up to avoid distortionenvariableq.de?oeu...attaenYcatoopreratingpoint.vo---Ernie mi Vow TEENY"no = . "⇒tea!:c.." i÷¥¥E÷÷÷i¥÷÷¥'qq.yn.gg#ouo * Capacitors -7 open @DC LiMiting/ClampingCirCUi But it is not idea
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no Vin ⇒ imitate'E± olimpirtiyeqgircyictj.styqirgamlbooseerd.to FTT VE
-'Einheit. i.ro#=E..io=YEtrEri
¥ ¥" rd=Y¥¥cIo=¥¥⇒ - #=-IT'¥¥CH= -4.9N ⇒ Vinsoomv
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ut't
②Small signal circuit ⇒ Hard limiting or soft limiting ex) c- v ,
I - - -goDerive voltage triangle characteristics vznmn-
-qvinTEIIE.IT#anVo=FiIYIkFITcTrai-trait .to#ndkey-reatores.considerextremecases-v.IeiiiiiEfou.
raitrdzkktn-voardrtf.tt#tRinVi where inputislarge ,both positive and Vi -Finite
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t
Lecture 15 : 2/6/2020 negative .and when inputizero Ii=¥Iz=¥Is=¥/÷÷
• Use constant voltage dropCID) model for E-RKHKAOME-o.ms
R.ec#fierCircuits- diodes → O.>
Vcwhenon)
ex] \
• Draw asymptotes first and Use them to guide open - loop DC transfer characteristic given . Gain and
noraoI.FI?eig!feerLf#itteIHIfegITfforI,Ioad[/ forming final curve * Diode¥Iojpeniiiii,farce offset voltage ? vosvous Vos
-5mLtea tea, E circuit example curve ¥÷÷E÷!ucmua-I.IE:7Half- wave Rectifier FFT't
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÷!÷¥÷; -
to =8odI- Vo ViDEVo - ex) Find Input Resistance .:#HI: :*, ÷÷÷¥÷; ¥÷¥÷¥÷'÷÷i÷÷÷
Vi DIE D2} Vo
Full - wave CBridge) Rectifier-0-1--5
§;: %,
ex) CVD models GetIadIoi- ftlov Assumption 2HHV gofer
Assumption IBoth on
M¥7 " I / FTL# o .> .. --NFIE
A.
Dio " on.
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: : ¥¥T:. " %.- ②E}R-
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V? If?¥j?zs Ist¥9Yf⇒ -10420¥40 -IoiIs-In -0.1625mA
Peak Rectifier → capacitor is energystorage Lecture 17 : 2/11/2020 ex) Amplifier Gains- ⇒ Voltage drop slows down
-
MyITI' ITIoHa!¥,
wave .vnizonfoiodeo.tt#.rvopkvsClaMpingCirCUt-/-J\of ±¥⇐÷i*÷÷:
' m ¥,✓ Bandpass↳ capacitor Voltage of Vr;ppie= =
=VopkI① ② ③Dio
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.GE#terwardsoFEEtga..pa:YgeIYaYpoageg.
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empty initially-
¥¥ -vsquite ① Dior-w⇒oi⇐¥o¥o¥%ain¥¥v.¥47!
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Vripple =VPk_ time for ⇒ Ripple voltageZFRC discharging Chippie) halves
I f- It
Semiconductor Physics ECE231701-Lecture 19 : 2/24/2020Semiconductor-
↳ Halfway between insulator andconductor
↳Conductivity can be controlledelectronically
.
Intrinsic C.Pure) Silicon-
④ fcgvoalnegt → At room temperature ,I some e
-
escapes the⑧-④t⑤ bond and being1 available for conduction⑤ ⑦ Free electron (negative carrier
④ hole (absence of e: positive carrier)
II:÷÷¥¥E¥⇒ota÷÷⇒ very few carriers at room temperature
Extrinsic (Doped) Silicon Ph- junction--
÷÷÷÷:÷÷:i÷÷÷÷÷÷:÷÷÷÷÷÷÷÷i÷÷:i÷÷÷÷÷:::i÷÷÷:÷÷i'i: I-- Electric Field CEI
¥o¥¥÷÷it÷÷!i⇒¥I¥I¥E son:*:*...→¥ ions in depletion
:*:#If Deme; onn i'Ee regio
↳ Lack of conductingcarriers
.
Lecture 20 : 2/25/2020
i.n
o
Electricfield CE't
- Created by positive negative ions in depletion region- Stops diffusion of majority carriers
CIDIFF - flow of majority charge carriers )- Swept minority carriers across boundary
CI drift C Is ) - Flow of minority Charge carriers )
② Drift current [holes ④ : n - type → p - type
,I drift
s,¥o¥Ego¥¥I¥ofelectrons -0 : p - type -2 n - type
-7 IDIFF
Diode behaviour from Pn junction-
- Not
① Equilibrium open circuit )o -
P n- o
IDIFFI I drift ) IDFdrift hepepietion
Region
or:÷÷÷÷÷*÷¥i÷:¥¥¥¥
⇒ I net= - Is Gato ration -
current ) Wider depletion region
③ Forward Bias
IDIFF→① '# o
← Idris ¥n
Ip µµn
-1E- Is @VNT- I ) -0 to
use" "
Forward
µ⇒Idris tchwinan.ee?aeE!entionegregign
Equilibrium Iot = I drift
÷,F¥¥ ,Reverse
IDIFFSI drift