ELECTRONIC AMPLIFIERS - NASAcircuits represent a carefully selected collection of items on electronic amplifiers. Most of the items are based on well known circuit design concepts

NASA SP-5947(01)

TECHNOLOGY UTILIZATION

ELECTRONIC AMPLIFIERS

C C

COPYA COMPILATION

NATIONAL AERONAUTICS AND SPACE ADMINISTRATION

https://ntrs.nasa.gov/search.jsp?R=19720006584 2020-03-18T11:38:46+00:00Z

ForewordThe National Aeronautics and Space Administrat ion and the Atomic Energy

Commission have established a Technology Uti l izat ion Program for the dissemina-tion of information on technological developments which have potential utilityoutside the aerospace and nuclear communities. By encouraging mul t ip le applica-tion of the results of their research and development, NASA and AEC earnfor the public an increased re turn on the investment in aerospace research anddevelopment programs.

The innovations in this updated series of compilations dealing with electroniccircuits represent a careful ly selected collection of items on electronic amplifiers.Most of the items are based on well known circuit design concepts that havebeen simplified or ref ined to meet demanding requirements for reliability,s implici ty, safety, and environmental adaptabili ty. The items included in thesix sections should be of particular interest to the electronic technician andhobbyist.

Addit ional technical informat ion on ind iv idua l devices and techniques canbe requested by circling the appropriate number on the Reader Service Cardincluded in this compilation.

Unless otherwise stated, NASA and AEC contemplate no patent actionon the technology described.

We appreciate comment by readers and welcome hearing about the relevanceand u t i l i t y of the in format ion in this compilation.

Ronald J. Philips, DirectorTechnology Utilization OfficeNational Aeronautics and Space Administration

NOTICE • This document was prepared under the sponsorship of the Nat ional Aeronautics and SpaceAdmin i s t r a t ion . Nei ther the United States Government nor any person act ing on behalf of the UnitedSlates Government assumes any l i a b i l i t y resulting from the use of the in fo rma t ion contained in ihisdocument , or warrants tha t such use wi l l be free from privately owned rights.

For sale by the Nat iona l Technical I n fo rma t ion Service, Springfield, Vi rg in ia 22151. $1.00

ContentsS E C T I O N ! . Preamplifiers with Wide Dynamic Range ' Page

Minia ture Electrometer Preamplifier EffectivelyCompensates for I n p u t Capacitance 1

SiC/Si Diode Trigger Circuit Provides Automatic• Range Switching for Log Ampl i f ie r 1Tiny Biomedical Ampl i f ie r Combines High Performance,

and Low Power Drain 2Log Ampl i f i e r Ins t rument Measures Physiological

Biopotentials Over Wide Dynamic Range 3Magnetometer Preamplifier 4Transistor Circuit Increases Range of Logarithmic

Current Ampl i f i e r 4

SECTION 2. High Power Amplif iersWideband Power Ampl i f ie r " . . . 5Single-Transistor Circuit Boosts Pulse Ampli tude 5Microelectronic Power Ampl i f ie r 6

SECTION 3. Communications Systems Ampl i f ie rsGain and Phase-Tracking Ampl i f ie r 6130 MHz AGC Amplif ier 7Low Noise Wide-Bandwidth IF Preamplifier 7Variable Gain Ampl i f ie r 8Complementary Pair Broadband Transistor Ampl i f ie r 9

SECTION 4. Buffer and Isolation Amplif iersBuffer Ampl i f ie r Provides Inverted and Non-Inverted

Outputs 10Field Effect Transistors Improve Buffer Ampl i f ie r 11AC-Coupled Ultrahigh Inpu t Impedance Ampl i f i e r . 11Ampl i f i e r Provides Dual Outputs from a Single

Source with Complete Insolation 12Signal Conditioner, Isolation Attenuator 12

SECTIONS. Amplif ier Circuits for Increased ReliabilityCircuit Provides Overcurrent Protection to Push-Pull

Ampl i f i e r 13Ground Equalizer Ampli f ier 14Continuous Redundancy DC Ampl i f ie rs 15Ampl i f ie r Gain Control 15Self-Check Circuits for AC and DC Amplif iers 16Amplif ier Corrects Errors Introduced by Large

Spurious Inpu t Signals 17

SECTION 6. General Purpose Amplif iersLow Power Bias and Erase Circuit for Magnetic

Tape Recorders 18I n p u t Gate Circuit Converted for Use as a Linear

A m p l i f i e r 19Improved Compensation Circuit for Direct-Coupled

Ampl i f ie r s 20Signal Conditioner, DC Ampl i f i e r 20Stable Ampl i f i e r Has High Common-Mode Rejection 21General Purpose FET Ampl i f i e r with High Gain

and Low Distortion 22

Section 1. Preamplfiers with Wide Dynamic Range

M I N I A T U R E ELECTROMETER PREAMPLIFIER EFFECTIVELY COMPENSATESFOR INPUT CAPACITANCE

This preamplfier can be used whereverstable wideband dc amplif icat ion from highimpedance sources is required. Typical applica-tions include biomedical ins t rumenta t ion , videoamplifiers, and pH and ionization chambers.

An exceptionally high i n p u t impedance isachieved with the use of a dual MOS transistorin the input stage. The input signal is coupledto the gate of Q1A which is one-half of thedual MOS transistor employed in a differentialampli f ier configurat ion. Temperature compensa-tion is achieved automatical ly since both Ql A andQ1B are diffused on a single substrate. Open-loop gain is provided by Q2, Q3, and Q5. Re-sistors Rl and R2 determine the drain currentsand are selected so that the temperature coef-f ic ient of the gate-to-source voltage is approxi-mately zero. R3 and R4. form a 2:1 negativefeedback potential divider which determinesthe closed-loop gain. R5 shunted by Cl providesthe s tabi l i ty necessary to prevent the circuit

Q6 Output

from oscillating. The negative capacitance con-trol, determined by the setting of R6, can bereduced to less-than 1.0 pF.

Source: G. J. DeBoo and C. N. BurrowsAmes Research Center

(ARC-69)

Circle I on Reader Service Card.

SiC/Si DIODE T R I G G E R CIRCUIT PROVIDES AUTOMATICR A N G E SWITCHING FOR LOG AMPLIFIER

An automat ic ranging c i rcui t extends theoperating range of a logari thmic amplif ierand increases its stability near the range switch-over point. A silicon carbide (SiC) and silicon(Si) diode pair provide hysteresis (bias voltageoffset) for a trigger c i rcui t that actuates a relayat the desired range extension point . A triggercircui t , consisting of a transistor-driven relay,provides the range extension, while the diode

pair provides the voltage offset and increasesthe s tabi l i ty .

If no hysteresis were provided at the i n p u t tothe trigger circuit, any noise associated withthe input current at or very near the rangeswitchover point would cause the extendercircui t to drop in and out on each noisespike. To avoid this instabi l i ty , the SiC diodeis placed in parallel with the Si diode to provide

ELECTRONICS AMPLIFIERS

the voltage offset at the input to the trigger cir-cuit. The forward bias voltage drop of the SiC

Log Amplif ier

appropriate voltage at the output to coverthe number of decades the system range hasbeen extended.

Output

+ 15 V

diode (1.6 V) and the 0.6 V bias of the Sidiode assure tha t the trigger circuit will notenergize and deenergize at precisely the sameinpu t current.

Al though this system provides a rangeextension of two decades, any desired decadeextension can be obtained by selecting the divisionfactor of the input circuit, and adding the

-25 VTrigger Circuit

Source: Tyco Laboratoriesunder contract to

Marshall Space Flight Center(MFS-1879)

Circle 2 on Reader Service Card.

TINY BIOMEDICAL AMPLIFIER COMBINES HIGH PERFORMANCEAND LOW POWER D R A I N

Vin

V0ut

-o + 4.2 Vdc

A t iny, high-performance ampl i f i e r u t i l izesa d i f f e r en t i a l i n p u t to obtain a common-moderejection of 25,000 to 1. Because of its small

-4.2 Vdc

size and low power drain, it could be usedin the biomedical f ield for ampl i fy ing electro-cardiogram and electromyogram signals and

P R E A M P L I F I E R S WITH WIDE D Y N A M I C R A N G E

could be mounted directly on an ambulatorysubject.

Emitter follower transistors Ql and Q2 pro-vide the necessary high inpu t impedance of about10 MQ. The different ia l output of the emitterfollowers is converted to a single-ended signal bya difference amplifier consisting of Q3, Q4, andQ5. Q5 provides the difference amplifier withthe high emitter impedance necessary for highcommon-mode rejection. The signal is fedsequentially through emitter follower Q6, asecond difference amplif ier Q7 and Q8, a com-mon emitter ampl i f ier Q9, and a f ina l emitter

follower Q10. Capacitance coupling in thesestages is minimized to provide good low fre-quency response from 0.15 Hz. The amplif ierexhibits a gain of 1,000 while drawing 5 mW ofpower. This amplif ier has been constructed ina weld-connected cordwood configuration hav-ing dimensions of 2.0 cm by 1.7 cm by 0.9 cmand weighing 4.5 grams.

Source: T. B. Fryer and G. J. DebooAmes Research Center

(ARC-41)


LOG AMPLIFIER INSTRUMENT MEASURES PHYSIOLOGICALBIOPOTENTIALS OVER WIDE DYNAMIC RANGE

The extreme dynamic range of biopotentials the stage is 1 Mfi. The inpu t transistors areusually exceeds the capability of most recordingdevices. The electronic amplifier shown in the

CalibrationSignal In •

direct-coupled to a difference amplifier con-sisting of a matched pair of silicon PNP tran-sistors, Q3A and Q3B. The output from thesecond different ia l stage, Q3B, is coupled

Logarithmic Input Stage

Input

Input .

figure compresses the signal amplitudes withoutresolution loss so that EEG signals can betransmitted. The biopotential inputs are capacita-tively coupled to .the miniature, low power,solid-state signal conditioner which consists ofa two-stage di f ferent ia l preamplifier with alow noise figure.

The differential input stage is a conventionalcircuit employing two low-noise NPN transistors,Ql and Q2, with capacitatively coupled inputsand appropriately placed diodes to suppressvoltage overloads. The input resistance of

directly to an NPN amplif ier , Q4, which inturn provides dc feedback to the base of Q2for stabilization of the overall amplifier,and feeds an amplified signal via a capacitorto the logarithmic diode signal compressors,(Dl and D2).

Source: R. T. Kado ofUniversity of California at Los Angeles

under contract toAmes Research Center

(ARC-10032)

Circle '4 on Reader Service Card.

MAGNETOMETER P R E A M P L I F I E R

The preamplifier, packaged as a thick-f i lmhybrid circuit, is intended'for use in a magnetom-eter,.where the stray dc field .must be extremelylow and all materials must be nonmagnetic.

-o15 Vdc

Vout

Fabrication techniques allow miniatur izat ion,and the planar layout simplifies compensationof stray dc fields.

The preamplifier circuit has a high inputimpedance suitable for operation with a siliconphotodiode. The low output impedance (achievedby the emitter-follower Q3) can be matchedto drive up to 30 cm of coaxial cable. The .pre-amplifier stage, consisting of Ql and Q2, hasa 3 dB bandwidth of 15 MHz when drivenfrom a low source impedance.

With proper choice of input resistor andphotodiode, the circuit can be used as a lowgain photodiode preamplifier at frequencies upto 15MHz.

Source: P. A. Sedalis ofPhilco-Ford Corporation

under contract toGoddard Space Flight Center

(GSC-10931)

CirclcS on Reader Service Card.

TRANSISTOR CIRCUIT INCREASES RANGE OF LOGARITHMICCURRENT AMPLIFIER

The logarithmic current amplif ier shown in thefigure is capable of operating throughout arange of 10-10 to 10'2 A. The amplif ier is

OutputC1

l\ Input

R1 l/^ R2

Logarithmic Element

Temperature Compensating Network

simple to operate and the calibration procedureis straightforward. The wide dynamic amplifica-tion range is achieved by placing a logarithmicelement in a feedback loop across the amplifier,causing the output voltage to be proportionalto the log of the input current. Cl providescircuit stabilization and Q2 provides temperaturecompensation for Ql. The high input impedance(10 Mfi) makes the amplifier well suited forapplications with electrometers and ionizationchambers.

Source: G.Gi lmourofWestinghouse Astronuclear Laboratory

under contract to- - - - - - .-- Space'NucIear Systems Office

(NUC-00018)


Section 2. High Power Amplif iers

WIDEBAND POWER AMPLIFIER

An economical power switching transistorcan be used in a 5 W power amplifier thathas a frequency response from 0.10 to 15 MHz.

out

This amplifier should find application in testand calibration operations where an inexpensivemethod of increasing power output is required.Thirty dB of power gain can be achieved withthe simple circuit shown in the schematic.

Source: R. E. Calhoun ofNorth American Rockwell Corp.

under contract toManned Spacecraft Center

(MSC-13058)


+ 12 Vdc

SINGLE-TRANSISTOR CIRCUIT BOOSTS PULSE AMPLITUDE

A simple amplif ier circuit provides a voltagepulse greater than that normally available fromemitter follower circuits to drive a 100 W trans-

V3 = V1 + V2

mitter. Capacitor storage, followed by common-base switching, is accomplished with only onetransistor.

During circuit operation, capacitor Cl ischarged through Rl and R2 to the supplyline voltage VI. With no input signal, theemitter and base of the transistor are at the

same potential and the collector is cut off.With an input pulse V2 present, the potentialof Cl with respect to ground is increased byV2. The emitter becomes more positive than thebase, and the transistor is switched on. Thisaction produces an output pulse, V3, equal toVI + V2 (minus small losses in Cl and thetransistor).

In order for Cl to reach approximate f u l lcharge between pulses, the ratio of charge intervalto charge time-constant must be much greaterthan the ratio of discharge interval to dischargetime-constant. The circuit produces an outputwaveform at about twice the amplitude of thesupply line voltage V1.

Source: M. W. Matchett and T. Keon of.Cutler Hammer

under contract to1

Goddard Space Flight Center(GSC-501)


ELECTRONICS A M P L I F I E R S

MICROELECTRONIC POWER AMPLIFIER

The power amplifier shown in the figure canserve as a prototype for the volume productionof push-pull power transistors for switchingor amplifying. The design provides flexibil i tyfor scaling either upward or downward, de-pending on the power dissipation requirements.

The integrated push-pull power amplif ier isfabricated on a single chip of silicon. The inter-digitated power transistors occupy 80 percentof the area, with the remaining 20 percent beingoccupied by the resistors and diodes. The deviceis hermetically encapsulated in a beryllia flatpackage. Beryllia was chosen over other ceramicsbecause of its high thermal conductivity,high electrical resistivity, and high dielectricstrength. Although the amplif ier can providean output of 10 A from an input current driveof 1A, it is capable of current outputs severaltimes greater than the rated value.

'out

V0ut

Source: T. C. New ofWestinghouse Electric Corporation

under contract toMarshall Space Flight Center

(MFS-13621)


Section 3. Communications Systems Amplifiers

GAIN AND PHASE-TRACKING AMPLIFIER

A comprehensive analysis of IF amplif iersoperating at 40.8 MHz was undertaken toprovide criteria for selecting the appropriatematched transistors. With the use of matched

SignalInput

-12 Vdc

+ 6 Vdc

DC Return

AGC Output

transistors, the adverse effects in a common-base amplifier stage are minimized. Included inthis analysis is a mathematical model of theAGC circuit shown in the figure. The optimumAGC control voltage was determined, and mathe-matical expressions were derived to enable thedesign engineer to select devices for optimum cir-cuit performance.

Source: Herbert L. Slade ofRadio Corp. of America

under contract to• Manned~SpacecrafrCenter

(MSC-12277)


130 MHz AGC AMPLIFIER

The ampl i f ier shown can be used as the firstIF stage in a communication receiver requiringa 50 0 interface between it and the AGC stage.These receivers are required to handle high in-

AGC

cost considerably. The common-base dual-gateMOSFET replaces complex diode attenuatorspreceeding or between fixed-gain stages below250 MHz, with a substantial savings in cost,complexity, and control power.

Ql is used as a common gate amplifier

RF SignalInput 0

V0ut

put levels on the order of —4 dBm at the inputof the first stage. The amplif ier is designedto provide gains of 18 to -34 dBm whilemainta ining an output level of -40 dBm witha minimum bandwidth of 30 MHz. The abilityto apply 200 mV RF signals directly to the inputof the first stage is achieved with the use ofa dual-gate FET (Ql). The application of theFET in place of conventional diode attenuatorssimplifies the circuit design and reduces the

for the purpose of simplification, and Q2 is acommon source. Q3 provides a ground referenced50 12 output source.

Source: R. Rheinlander ofMotorola Inc.


(MSC-12290)


LOW NOISE, WIDE-BANDWIDTH IF PREAMPLIFIER

A comprehensive analytical evaluation ofcircuit configurations, in terms of opt imumoverall wideband performance, resulted in thedevelopment of a wideband IF preamplifier,

shown in the figure, which can be used in mosttypes of communications receivers. Its ex-ceptional performance features include a 20 dBpower gain over the passband of 10 MHz to

COMMUNICATIONS SYSTEMS A M P L I F I E R S

100 MHz, with a passband ripple of 1 dB. Dur-ing the in i t ia l design, the major problemswhich hindered the achievement of a highpassband with a concurrent low noise figurewere found to stem from the di f f icul ty ofachieving a source admittance that was

the noise figure of 1.5 dB at 60 MHz if thepassband is from 20 to 120 MHz. The shunt-C,series-L input matching network was foundto provide better overall performance from 10to 110 MHz but had a marginal noise figure.

+ 20 Vdc c

(SV—•II o—I Matching^ lr ^" Network

260 nH

^ 2000 pF

i >

D

(A) Shunt-b Input Matching Network

C

150 nH

Figure 1A Two-Stage Amplifier

optimum with respect to the noise figure overa wide bandwidth.

After a thorough analytical investigation, thebasic configuration chosen was a two-stage,common-emitter amplifier with series feedbackin the second stage only (see fig. I A). Thedesign in Fig. IB provides a choice betweenthe two input matching networks (A and B) thatoptimize performance over different portionsof the passband. Further computer analysisshowed that the simple, shunt-L network meets

-r- 19 PF

(B) Shunt-c Series-L Input MatchingNetwork

Figure 1B

Source: W. S. Jones and G. R. Pierson ofTexas Ins t ruments

under contract toElectronic Research Center

(ERC-10321)


VARIABLE GAIN AMPLIFIER

The design of this amplifier combines improvedinput and output impedances with relatively.,large "signal handl ing capability and an immuni tyfrom the usual adverse effects of automaticgain control (AGC). These advantages areachieved through the use of two FETs, withsources and drains in parallel, plus a resistive

divider for the signal, and bias to either of thegate terminals. - — - ~ " ~

The ac signal is coupled into the circuit withCl, LI provides a high impedance to the acsignal and a low impedance path for the AGCpotential, while C2, C3, and C4 (bypass capac-itors) provide low impedance ac-signal paths. Rl

and R2 divide the ac signal and AGC potentialapplied to the gate of Ql, and L2 and C5 forma tuned resonant circuit which is the load im-pedance at the ac operating frequency. The twoFETs, Ql and Q2, with their drains and sourcesin parallel, and their gates tied together through

Since the signal is divided by the resistors,larger signals may be used as Q2 approachescutoff for the same amount of distortion in thedrain current.

The grounded-base configuration of Q3provides a low impedance drain load for Ql

AC Input C1

o—Ih

R1

o L1

02

Q1 'R2

C2

Vout-O

R3 _ C3 < R4

AGC _ _

the resistive-divider Rl and R2, produce theremote cutoff feature that makes the circuitperform in a manner similar to that of a remote-cutoff vacuum tube. At low values of AGC bias,both Ql and Q2 contribute to the forwardtransfer admittance. Since the signal is atten-uated, Q2 does not contribute as much tothe forward transfer admittance under lowvalues of AGC bias as Ql does. As the bias isincreased, Ql approaches cutoff more rapidlythan Q2 because the bias applied to Q2 is alsodivided by Rl and R2. As Ql approachescutoff, Q2 takes over control of the forwardtransfer admittance of the circuit. The AGCbias required to cutoff Q2 is larger than that re-quired to cutoff Ql by a factor determined byRl and R2. With the proper selection of theratio of Rl and R2, the FET transfer charac-teristic can be optimized for a smooth transition.

IC4

and Q2. This further reduces the reverse energytransfer from drain-to-gate of Ql and Q2, andtherefore reduces input impedance variationsproduced by the AGC.

This reduction is important, because inputimpedance variations (as a function of AGC volt-age) are virtually eliminated. This feature isespecially important in RF and IF amplifierswhere input impedance variations can alter thebandwidth and center frequency of the previousstage. The output impedance of Q3 remainshigh and minimizes the variat ion in dampingacross the load tuned circuit.

Source: G. H. SpaidGoddard Space Flight Center

(GSC-10116)


COMPLEMENTARY PAIR BROADBAND TRANSISTOR AMPLIFIER

A wideband dis t r ibut ion amplif ier with abandwidth of 50 MHz can be used in commercialradio, FM and television circuits. Additional

applications may include its use in pulse andt iming circuitry in computers.

In operation, the input signal is attenuated by

10 ELECTRONICS A M P L I F I E R S

the voltage divider action of resistor Rl inseries with a thermistor. Transistor Ql acts asan isolation stage, and a voltage amplification

Input R1

of 10 is achieved by the next stage, which in-cludes Q2. The signal is then fed into a high-impedance emitter follower Q3.

The complementary pair of transistors, Q4and Q5, functions as a driver for the f ina loutput stages. The output impedance of thecomplimentary emitter follower output stagesis very low, allowing them to drive low im-pedance loads with low distortion.

Since the basic amplifier is a linear device,

required; 20 dB of AGC is obtained by varyingthe resistance of the thermistor in the attenuatorcircuit.

Source: G. D. Thomson, Jr. andG. F. Lutes, Jr. of

Caltech/JPLunder contract to

NASA Pasadena Office(NPO-10003)

an automatic gain control (AGC) system is Circle 14 on Reader Service Card.

Section 4. Buffer and Isolation Amplif iersBUFFER AMPLIFIER PROVIDES INVERTED

AND NON-INVERTED OUTPUTS

A general purpose buffer amplifier, shownin the figure, provides both inverted and non-inverted output signals from a single input .The two outputs are proportional to the input ,or if need be, can be varied to suit the applica-t ion. Similar components in the invert ing andnon-inverting stages eliminate the adverse

-effects^ of" component^ changes caused" bytemperature and aging.

In operation, Al is connected as an invert-ing amplif ier in a standard feedback configura-tion. A vir tual ground in the feedback loopenables the output, V2, to act as a low im-

InvertingOutput

Non-Invert ingA2 > f O Output

BUFFER AND ISOLATION A M P L I F I E R S 11

pedance. A2 is connected as a non-invertingun i ty gain amplifier in a feedback configurationwhich also provides a low impedance output.

One important feature is the accurate track-ing of the two outputs. This is achieved byhaving Rl and R2 common to both amplif iergains so that any variations will affect bothoutputs equally.

Source: C. A. Berard, Jr. ofRadio Corp. of America


(GSC-11124)


FIELD EFFECT TRANSISTORS IMPROVE BUFFER AMPLIFIER

A uni ty gain buffer amplifier with a differ-ential input stage has a faster response timethan bipolar transistors when operated at low

+ 18 Vdc

Input

-6 V

Output

current levels. The circuit shown in the schematichas an extremely high input impedance,low bias current requirements , and a widebandwidth. A basic tradeoff between input cur-rent and bandwidth for optimum stabilityenables the amplifier to operate with an inputbias current less than 10"8 A and a bandwidthgreater than 2 MHz. The offset temperaturestability for these conditions is 5 m V a t 3 5 8 K.

Source: Dynatronics, Inc.under contract to



AC-COUPLED ULTRAHIGH INPUT IMPEDANCE AMPLIFIER

High input impedance and low input capaci-tance are achieved with a uni ty gain bufferamplifier having positive feedback. The circuitshown in the figure has an input impedance ofseveral hundred megohms and input capacitanceless than 1.0 pF.

The high input impedance is obtained bypositive feedback through Cl to the positiveinput of the amplifier. The input capacitanceplus the capacitance to ground can becancelled by adding the feedback capacitorC2 and adjusting R3.

Since the low frequency response is determinedprimarily by Cl, the use of an electrolytic

Vin o

out


capacitor is advisable. High frequency responseis limited by the operational amplifier. Usinga Ma 709 amplifier, the circuit can amplifya 5 Msec wide pulse coupled through a 1.0 pFcapacitor.

Source: A. G. BirchenoughLewis Research Center

(LEW-11154)

No further documentation is available.

AMPLIFIER PROVIDES DUAL OUTPUTS FROM A SINGLE SOURCEWITH COMPLETE ISOLATION

An amplifier provides two outputs from asingl.e input signal. Complete isolation from in-put to output is obtained and the two outputscan be grounded at different potentials. Intypical use, one output is employed as a controlsignal while the second output provides signalmonitoring. Adaptations of this method forachieving dual isolated outputs may be usedin devices other than amplifiers.

A low-level signal from a basic sensor suchas a thermocouple or strain gage is fed intodifferential input terminals of the amplifierthrough a twin conductor shielded cable. Thesignal is modulated to achieve an equivalentdc signal which is then coupled into a carrieramplifier via isolation transformer Tl. Afteramplification to the desired level, the signalfrom the carrier amplifier is fed into outputdemodulator A for conversion back to anamplified duplication of the original signal.The carrier amplifier signal is also fed intodemodulator B. In this path, however, trans-former T2 and buffer amplifier Kl are addedahead of the demodulator. Transformer T2 pro-vides carrier signal isolation and buffer amplifierKl provides impedance isolation to preventdemodulator B from introducing spikes backinto transformer T2.

Both demodulators, A and B, are simultan-eously driven through separate isolated windingsof transformer T3. Output amplifiers K2 and

K.3 are included to provide low output im-pedance characteristics and load driving capabil-ity. No conductive paths exist between the

Input SignalFrom Sensor

DemodulatorDrive

K1

Demodulator B

K3

input terminals and output A, between theinput terminals and output B, or between outputA and output B. The ground voltage level islimited only by the breakdown voltages ofthe transformers, which can be controlled atthe time of transformer production.

Source: C. R. Dipple ofWestinghouse Astronuclear Laboratory

a n d G . A . N e f f o fNeff Instrument Corporation

under contract toSpace Nuclear Systems Office

(NUC-10056)


SIGNAL_CONDITIONER,_ISOLAIION ATTENUATOR-

The isolation attenuator signal conditioner(see diagram) amplifies a positive dc low-fre-quency signal input and provides isolationbetween the input and output. The dc input

signal is first modulated (at the carrier fre-quency of 2.2 kHz) with a square wave referencesignal of 7.5 V p-p.

The output, an amplitude-modulated square

BUFFER AND ISOLATION A M P L I F I E R S 13

wave, is transformer coupled to the ac ampli-fier. The ac amplifier includes an emitter fol-lower input stage which drives the first of

arm of the potentiometer is capacitively con-nected to an input of the ac amplifier so thateither positive or negative potentials can be

Vout

Modulator Transformer AC Amplifier Demodulator

three differential amplifier stages. Series feed-back and summing are employed withinthe amplifier for stability and control of themodulated signal. The input modulated signaland feedback signal are combined to producean error signal that is amplified and trans-former-coupled to the demodulator. The de-modulator is driven in synchronism with themodulator. The resultant pulsating dc signalis fed to a simple RC filter network, employinga zener-diode network that limits the peak valuesof the output signal. The zero-bias circuitcancels any offsets which might occur in themodulator or amplifier. Two zener-regulatedvoltages of opposite polarity are connectedto the ends of a 20,000 fi potentiometer. The

selected. In addition, an integrated choppertransistor is connected, emitter to emitter,between the potentiometer arm and the con-verter ground. The chopper transistor is drivenin synchronism with the modulator and de-modulator. In this way, either positive ornegative square waves of variable amplitude areinjected into the ac amplifier input. This enablesthe dc amplifier signal output to be adjustedfor null when the input signal is zero.

Source: G. Broxton ofNorth American Rockwell Corp.


(MSC-15291)


Section 5. Amplif ier Circuits for Increased Reliabili tyCIRCUIT PROVIDES OVERCURRENT PROTECTION

TO PUSH-PULL AMPLIFIER

The amplif ier circuit shown in the figurelimits the current output to a predeterminedlevel. This l imit ing action protects the push-pullamplifier if the load is short circuited for anyreason. If an excess current through Rl causesthe voltage across it to equal the sum of thediode voltages D3, D4, and D5, the circuitstarts to l imit the current to a value determinedby the value of Rl.

If Q2 tends to draw excessive current, D2turns on and applies a voltage across theemitter-base junct ion of Q3, opposite in polarity

Input

03

to that required to maintain Q3 in the conduc-tion state. Conversely, should Q3 tend to draw


excessive current, equal and opposite actionwould take place in Dl and the emitter-basejunction of Q2, causing Q2 to turn off. Thus,no high frequency oscillation or driving voltagecan cause both Q2 and Q3 to conduct atthe same time, thereby short-circuiting the volt-age across the two output terminals.

Source: D. J. Skorra ofHoneywell, Inc.


(MSC-12033)


GROUND EQUALIZER AMPLIFIER

In many electronic systems, both ac and dc,potentials exist between grounds of variousparts of the system. The dc portion is generally

the ac current with no signal input; Rl is keptvery small to minimize the input power require-ment. To prevent noise frequencies from appear-

Load

of little consequence, but the ac component caninduce noise and errors into the system. In thecircuit shown in the figure, the ground voltageis fed into an ampl i f ie r and returned toground as negative feedback, thereby reducingthe ground voltage essentially to zero. Theamplif ier senses the voltage drop (Vp) betweenGl and G2 and produces a voltage rise ap-proximately equal to Vp in the ground return.This voltage rise is in phase with the excitationvoltages,"Vl and^V2, but as far as input-outputrelationships, the amplif ier has an output whichis in phase with the inpu t .

Transistor Q2 carrys a dc current equal to

ing in the ground circuit, the ampli f ier must havea high frequency response and must be decoupledabove its effective frequency band with a suit-able capacitor. For optimum operation, thesignal returns should be grouped in each as-sembly, and the composite grounds shouldthen be brought to the same potential by meansof a single amplifier.

Source: K.James of_ General Motors Corp.


(MSC-12058)


A M P L I F I E R CIRCUITS FOR I N C R E A S E D R E L I A B I L I T Y15

CONTINUOUS REDUNDANCY DC AMPLIFIERS

The continuous redundancy technique,shown in the figure, for dc amplifiers greatlyincreases reliability in linear electronic systems.Previously, redundancy techniques have hadsuch disadvantages as: double the power require-ments, an increase in weight and space require-ments, and a reduction in circuit gain uponfailure of either circuit.

In this arrangement the funct ional blockamplifier, made up of "n" parallel amplifiers,acts as a single amplifier. All but one of theamplifiers may be considered redundant. Thesum of the outputs is used for feedback, so thata failure will result in increased outputs fromthe remaining amplifiers.

The most common and serious failure forany amplifier is opening or shorting of the B +

V0ut

supply voltage. A short to B-t- in a nonredundantsystem generally causes complete loop fai lure.In the redundant ampl i f ier , however, the otherparalleled amplifiers cancel out the effects ofthe shorted amplif ier . The outputs of all the in-dividual amplifiers are summed to provide a sin-gle common output . The gain of each individualamplif ier should be as large as possible, with theonly l imita t ion on the value being the necessityof keeping the outputs of each stage as close tozero as possible for a zero-volt i n p u t .

The dynamic range of the amplifier, how-ever, is reduced by 3.75 volts. This reduceddynamic range is the result of changing theoutput of each working amplifier in order tocorrect for the error voltage. If the normaldynamic 'range was 10 volts, it would be re-duced to 6.25 volts by one failure. The useful-dynamic range would be less than 6 volts, thusinsuring that the fu l l linear mode would bemaintained.

This type of cont inuous redundancy appliedto dc amplifiers is superior to previous standbytechniques in that the redundant amplifiersuffers only reduced dynamic range and in-creased offset. The gain and the phase responseof the redundant amplifiers are not affectedby a failure condition.

Source: F. C. WellmanMarshall Space Flight Center

(MFS-12473)


AMPLIFIER GAIN CONTROL

An amplifier gain control has been developedto reduce amplitude rise and fall times sothat circuits which malfunction with fast risesignals can be operated correctly without ex-posure to sudden large signals. The circuit shownin the schematic reduces the amplif ier gain,upon command, from unity to a min imumvalue and back to unity, in a quasi-linear •fashion, in a time period from 3 to 10 msec.

Ini t ia l ly , Cl is charged to -4.5V, which biases

Ql close to its conducting state. The reduce-gaincontrol inputs are open so that Q2 and Q3 areoff . Since Rl and R2 are equal, and Ql is non-conducting, the signal output equals the signalinput; i.e., the gain is one. At To the reduce-gain control is grounded, causing Q3 to providea constant charging current to Cl. The voltageacross Cl gradually increases, tu rn ing on Alto increase the feedback and reduce the gain.At a time near Tl, the resistance of Ql is

16 ELECTRONIC AMPLIFIERS

RestoreGain

10 msec •*•

ReduceGain J

sufficiently low that the circuit gain is less than0.1 of the original value. At Tl, the reduce-gaincontrol is opened and the restore-gain controlis grounded, turning Q3 off and Q2 on. Q2 pro-vides a constant current discharge path for Cland reverses the sequence. At time T2, Ql isturned off and the original conditions arerestored. R4 and R5 provide a reference pointof one-half the signal to avoid unequal startingpoints when the signal is positive or negative.

Source: J. E. Goodwin, R. O. Leighou,and J. McGowan of

Martin-Marietta Corp.under contract to



SELF-CHECK CIRCUITS FOR AC AND DC AMPLIFIERS

Redundant monolithic operational amplifierscan be used to increase the reliability ofelectronic systems without an extensive increasein size, weight, and number of components.The dynamic self-test circuits shown in thefigures are designed to checkout and evaluateoperational amplifiers, with the aid of digitalprocessing equipment. The self-test circuitscan accept digital input commands and trans-mit output data without-interfering with normalsystem operation.

AC amplifiers can be tested with the frequencydetection scheme shown in Figure 1. Upon re-ceipt of a digital command, a test-frequencyinput is applied to Al and A2. The outputsfrom both amplifiers contain the test fre-quency with the same amplitude but phase

shifted Trad (180°). Since the test frequencysignals from both amplifiers cancel when com-bined, the output from the summing amplifierdoes not contain the test frequency, and systemoperation is neither affected nor interruptedduring the test procedure. If either amplifierfails, the test signal does not appear at A2.

A fil ter monitors the output of A2 and passesonly the test frequency. The output of thisfilter feeds a comparator whose output (3Vlogic level) _is^ applied to- the digital- dataacquisition system for further evaluation.

Each dc amplifier in the redundant circuitmay be tested using the level detection schemein Figure 2. Upon receipt of digital test com-mand, an FET switch applies a saturation signalto the amplifier under test. A comparator senses

A M P L I F I E R CIRCUITS FOR INCREASED RELIABILITY17

TestFrequence

TestCommand

Test SignalLevel

Vout

Filter Test Out

Figure 1A

the amplifier output and initiates a control pulseif the amplifier is functioning properly. Becauseonly one amplifier is tested at a time, the otheramplifiers are not disturbed and normal systemoperation continues.

out

TestOutput

BiasFigure 1B

Source: F. C. Wellman ofSperry Rand Corp.


(MFS-12474)

No further documentation is available.

AMPLIFIER CORRECTS ERRORS INTRODUCED BY LARGE SPURIOUSINPUT SIGNALS

The amplifier circuit shown in the figureeliminates significant measurement errors whichoccur as a consequence of large spurious inputsignals. The shift in the reference baseline asa result of a large input signal prevents accuratemeasurement of the small signals which areintended to be measured. The solution tothis problem, which is common to such instru-ments as nuclear particle detectors, is achievedby the novel technique of applying a signal ofopposite polarity to correct the baseline shift .The charge amplifier senses the amount by whichthe reference baseline is shifted and appliesthe proper signal to a high gain amplifier.The output of the amplif ier is returned to a conr

trol circuit which shifts the baseline to its properlevel. As a result, a very small signal can bemeasured even after a large spurious signal isapplied to the input .

The control circuit contains a zero crossingcomparator which causes the residual

—o startSignal

Zero-CrossingComparator

V0utHigh GainAmplifier\mplifier

Sensor

correction charge to be removed as soon as thebaseline is returned to the original referencelevel.

Source: L. C. Labarthe ofLabko Scientific, Inc.


(GSC-11016)


Section 6. General Purpose Amplifiers

LOW POWER BIAS AND ERASE CIRCUIT FOR MAGNETIC TAPE RECORDERS

A bias/erase circuit provides the necessary biascurrent for a group of modular, direct record-ing amplifiers. It also provides a simple meansof erasing the tape using the same head as

During the half cycle when Q4 is turned on, Q2is prevented from conducting, and the voltageat the emitters of Q2 and Q3 approaches zero.This quasi square wave is coupled through

+ 12 Vdc

RecordSignal

-12 Vdc

+ 5 Vdc

BiasFrequency

that used for recording. An astable mult ivibratorgenerates a square wave signal which is appliedto the bias frequency input of the record ampli-fiers. Each record amplifier contains a chopperamplifier, which switches between the dc supplyand ground, to produce a square wave at thebias frequency. This square wave is then filteredto remove the harmonic content and is suppliedto the record head as a low distortion current.

During normal recording, the square wavefrom the bias oscillator causes Q4 to turn onand off at the bias frequency of 400 Hz. WhenQ4 is off, the voltage at the emitters of Q2 andQ3 approaches the supply voltage (12 Vdc).

Rl and R2 to the filter, consisting of Cl, C2,and L2, which removes the higher harmonicsand provides a low distortion sine wave at thefi l ter output. This waveform is coupled to therecord head by means of C3, which is chosento resonate with the record heat inductance.

During the erase mode, circuit operation isessentially the same as that of the record cycle.The. only difference. is_.that 45 Vdc -level-is-applied to the erase power input . With thishigher input , Q2 and Q3 generate a 44 V p-psquare wave voltage which increases the biaserase current in the head to a level suff icientto erase the tape completely.

18

G E N E R A L PURPOSE A M P L I F I E R S 19

The most notable features of the bias/erase circuit are: (1) good efficiency, because theamplif ier transistors operate in a switching moderather than as a linear amplif ier ; (2) ampli tudestabil i ty is improved since it is primarily de-pendent on the value of the dc supply (normallywell regulated); and (3) the bias oscillator canbe a very simple relaxation oscillator. The onlycritical requirement is that it be reasonablyclose to a 50% duty-cycle square wave in

order to minimize the amount of second har-monic component.

Source: A. E. Fisher ofAlmond Ins t rument Co.


(MSC-13808)


INPUT GATE CIRCUIT CONVERTED FOR USE AS A LINEAR AMPLIFIER

An input gate circuit containing MOS de-vices can be used as a linear amplif ier . The3-input NAND gate circuit shown in the f igure

Drain

Ground Output

transconductance mismatch. The values of Rl,R2, R3, and R4 are selected to balance the highinput impedance ratios which are necessary for

- 24 Vdc

Output

Output

c—H

>mX-P

i

Q1

rD2

i<<

£T-\Q2

*R3I

Input 3

I

Source

MOS 3 Input Gate Circuit

contains the MOS transistors in series with thesource and drain.

The ac input signal is coupled through Cland C2 to the gate elements of Ql and Q2,which form a differential amplifier. Rl and R2form a voltage divider' that provides the dcbias to Ql, and Dl supplies a constant currentof 2 mA to the source elements of Ql and Q2.The diode combination of Dl and D2 establishesthe circuit balance regardless of temperaturevariations and also overcomes the problem of

V0ut

Linear Amplifier Conversion

the MOS circuit operation. The important per-formance parameter is a voltage gain whichis l inear over a frequency range of 4 Hz to100 kHz. Above 100 kHz, the gain decreasesand is half-power at 180 kHz.

Source: T. P. Harper ofIBM


(MFS-14265)

Circle-25 on Reader Service Can/.


IMPROVED COMPENSATION CIRCUIT FOR DIRECT-COUPLEDAMPLIFIERS

A novel control circuit, shown in the figure,compensates for the inherent temperature dr i f tand offset of a closed-loop feedback amplif ier .Disadvantages such as chopping spikes andthe undesirable dynamic characteristics ofconventional chopping circuits are minimized.

V0ut

Drift-OffsetControl Circuit

Drift ControlB-Side

O-A

Drift ControlA-Side Offset Control

. T__ Control A-SideB-STde

I o-B:'TemPerature— Independent Currents

'D-Aar|d 'D-B: Linearly Temperature— Dependent Currents

The equivalent input voltage d r i f t is lessthan 0.05 j"V/K over the temperature range of233 to 373 K. Power turn-on and overloadsettling are orders of magnitude faster than forchopping-type amplifiers. The circuit inherent lyallows monolithic integration of the entireamplif ier in a 0.95 cm flat-pack.

Ql and Q2 are the input transistors of theamplifier, and Rl and R2 form the emitter feed-back network. Currents drawn from the R1-R2nodes by the drift-offset control circuitcompensate for the inherent temperature dr i f t ofthe amplifier.Note: Title to this invention has been waivedunder the provisions of the National Aeronauticsand Space Act [42 U.S.C. 2457'(f)], to the TRWSpace Technology Laboratories, One Space Park,Redondo Beach, CA 90278.

Source: D. R. Breurer ofTRW Space Technology Laboratories


(MSC-11148 and 11235)

SIGNAL CONDITIONER, DC AMPLIFIER

The ability of this dc amplifier to acceptinput signals from 20 to 250 mV makes it ideallysuited for signal condit ioning applications indata acquisition and electronic test systems.The amplifier output, a maximum of 5 Vdc, isproportional to the input signal.

The simple circuit design permits the use ofhigh-density packaging with a low-power con-sumption. Important circuit parametersinclude: reduced size; high input /output isola-tion (greater than 100 Mfl); an input resistancegreater than 500 k£2; and a low output resist-

-ance_less-than_25012As shown in the block diagram, the signal

conditioner amplifier contains a modulator, anac amplifier, dc-to-dc converter, and a demodu-lator with an output filter. The funct ion of theful l-wave modulator is to chop (or modulate),

at a 2.2 kHz rate, the signal applied to theinput. The ac amplifier includes an emitter-fol-lower input stage which drives the gain-settingattenuator circuit. The amplifier is succeededby three differential amplifier stages, all direct-coupled, with the last one feeding the outputemitter followers. Current supplied to the firstdifferential stage provides a current feedback(depending on the common mode offset of theoutput emitter followers, which tends to keepboth output emitter followers nominallybiased at 4 Vdc. Additional degenerative feed-

-l>ack_is_incor.por.ated_thro.ugho.ut_the_am.p.lif.ier_stages to ensure stability.

The gain setting network, along with othercritical gain controlling resistors, is containedwithin one un i t in which all resistor temperaturecoefficients are matched to within 10 ppm/K.

GENERAL PURPOSE AMPLIFIERS 21

+ Vjn

18 Vdc 0

22 kHz oInput

V0ut

This ensures gain accuracy over the operatingtemperature range. The ou tpu t signals areTrad (180°) out of phase and are capacitivelycoupled to the demodulator. The demodulatorand fil ter consist of two chopper transistorswitches whose collectors are connectedin parallel and whose emitters are connectedto one of the two ac amplifier outputs.

The zero bias circuit operates in sucha manner that it cancels any offsets whichmight occur in - the modulator or amplifier.

The dc-to-dc converter is a conventional invertercircuit which supplies +15 and -15 Vdc tothe ac amplifier, the zero bias, and the demodu-lator circuits.

Source: R.T. Hirata ofNorth American Rockwell Corp.


(MSC-11648)


STABLE AMPLIFIER HAS HIGH COMMON-MODE REJECTION

IN 753

InvertingInput

-12 Vdc

Low-level dif ferent ia l signals having an un-desirable common mode component are d i f f i cu l tto amplify. If the signal source impedance is

high, the amplifier must have an extremelyhigh input impedance. The operational ampli-fier circuit shown in the diagram combines the


property of high input impedance with verylow dr i f t and exceptional stability. The abi l i tyto operate the input stage at low collector cur-rents, combined with the abil i ty to select thetransistors, decreases the noise figure below thatof monolithic amplifiers.

The gain of the amplifier can be selectedby changing the resistance ratio of R4 and R7,

and R3 and R6. Limi t ing the bandwidth withoutaffecting the common mode rejection of the over-all amplifier circuit is accomplished by theaddition of Cl.

Source: J. SturmanLewis Research Center

(LEW-10712)

A'oJuriher documentation is available.

G E N E R A L PURPOSE EET AMPLIFIER WITH HIGH G A I NAND LOW DISTORTION

High gain and low distortion are achieved witha simple FET amplif ier that uses a current sourceas a load.

Most Class-A FET amplifiers operating witha load resistor have a gain equal to gmR where

Vdc

Vout

gm (mutual transconductance) is dependent uponthe amount of current f lowing through the FET.When a large ac i n p u t is applied, the current,I ,varies inversely to the output signal. Therefore,the variation of gm and the gain results in a dis-tortion of the output waveform. The novelcircuit shown in the figure reduces the distortionwith the aid of a current source Ql that actsas the load impedance. The current source main-tains I at a constant level, which in tu rn keepsgm constant.

Other advantages obtained with this circuitinclude a higher gain factor and a reduction inpower dissipation as a result of the smallervoltage drop across the current source.

Source: J. M. Fawcett ofWestinghouse Electric Corp.


(MSC-13107)


NASA-Langley, 1971

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NASA TECHNOLOGY UTILIZATION PUBLICATIONS

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Details on the availability of thesepublications may be obtained from:

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Documents

ELECTRONIC AMPLIFIERS - NASAcircuits represent a carefully selected collection of items on electronic amplifiers. Most of the items are based on well known circuit design concepts