EDC Bell Lab Manual Part III

LABORATORYINVESTIGATION 30Op-Amp Schmitt Trigger Circuits

IntroductionAn inverting Schmitt trigger using an op-amp is first constructed and tested for upper andlower trigger points using a triangular input waveform. The circuit is modified by theinclusion of diodes, and the trigger points are again investigated. A noninverting Schmitttrigger circuit is also constructed and is modified by the use of diodes, and its perfor-mance is investigated.

EquipmentOscilloscope;DC power supply; (0 to 15 V)0.25 W resistors27 k, 82 k, (2 100 k), 150 k, 180 kOp-amp741Low-current diodes(2 1N914)Circuit board

Procedure 1 Inverting Schmitt Trigger Circuit1-1 Construct the inverting Schmitt trigger circuit shown in Fig. 30-1. (This circuit is

designed in Example 14-13 in the textbook.)1-2 Connect the power supply, signal generator, and oscilloscope as illustrated.1-3 Switch on the power supply and adjust it for VCC ;15 V.1-4 Set the signal generator to produce a ;7 V, 1 kHz, triangular wave.1-5 Sketch the input and output waveforms (on the laboratory record sheet) as displayed

on the oscilloscope. 1-6 Measure and record the circuit upper trigger point (UTP) and the lower trigger point

(LTP).

147

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1-7 Change the input amplitude to ;8 V and ;6 V. Measure and record the UTP and LTPin each case, and sketch the waveforms.

1-8 Modify the inverting Schmitt trigger circuit by including the diode as illustrated inFig. 30-2a.

1-9 Repeat Procedures 1-3 through 1-6.1-10 Modify the circuit as illustrated in Fig. 30-2b.1-11 Once again, repeat Procedures 1-3 through 1-6.

Procedure 2 Noninverting Schmitt Trigger Circuit2-1 Construct the noninverting Schmitt trigger circuit shown in Fig. 30-3. (This circuit

analyzed in Example 14-14 in the textbook.)2-2 Connect the power supply, signal generator, and oscilloscope as illustrated.

148

Figure 30-1 Inverting Schmitt trigger circuit.

(a) Circuit

VCC15 V

VEE15 V

741

R1180 k

R2100 k

Power supply

Circuit board

Tooscilloscope

(b) Connection diagram

R2

R1

Signal generator

1 2 3 4

8 7 6 5741

0195429885_147-151_ch30.qxd 2/13/08 5:15 PM Page 148

2-3 Switch on the power supply and adjust for VCC ;15 V. Adjust the signal generatorto produce a ;5 V, 1 kHz, triangular wave.

2-4 Sketch the input and output waveforms (on the laboratory record sheet), and measureand record the UTP and LTP.

149

Figure 30-2 Inverting Schmitt trigger circuits using diodes.

VCC

VEE

741

(a) Schmitt circuit with LTP 0

R1

R2

D1

R11 2 3 4

8 7 6 5741

D1

(b) schmitt circuit with different UTP and LTP levels.

R3

D2

D1

R1

R2

1 2 3 4

8 7 6 5741

VCC

VEE

741

R1

R2

D1

R3100 k

D2

0195429885_147-151_ch30.qxd 2/13/08 5:15 PM Page 149

150

Figure 30-3 Noninverting Schmitt trigger circuit.

(a) Circuit

VCC

VEE

741

120 k

R3D2

D1

150 k

R2

27 k

R1

Power supply

Circuit board

Tooscilloscope


R2

D2

D1

R3

R1Signal generator

1 2 3 4

8 7 6 5741

Analysis1 Compare the UTP and LTP measured in Procedures 1-6 and 1-7 to the design quan-

tities in Example 14-13 in the textbook. Discuss the input and output waveforms.2 Discuss the results obtained in Procedures 1-9 and 1-11 for the inverting Schmitt

circuits using diodes. Analyze the inverting Schmitt trigger circuits using diodes todetermine UPT and LTP in each case. Compare these to the measured results.

3 Compare the UTP and LTP measured in Procedures 2-4 to the quantities deter-mined in Example 14-14 in the textbook. Discuss the input and output waveforms.

4 Plot the output/input characteristics for the inverting Schmitt trigger circuits withand without diodes.

5 Plot the output/input characteristics for the noninverting Schmitt trigger circuit.

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151

Record Sheet L30-1

Procedure 1-6

Lab. # 30 Op-Amp Schmitt Trigger Circuits

ViUTPLTP

7 V Inputwaveform

Outputwaveform

Inputwaveform

Outputwaveform

Inputwaveform

Outputwaveform

Procedure 1-7Vi

UTPLTP

8 V 6 V

Procedure 1-9Vi

UTPLTP

7 V

Inputwaveform

Outputwaveform

Procedure 1-11Vi

UTPLTP

7 V

Inputwaveform

Outputwaveform

Procedure 2-4Vi

UTPLTP

5 V

Record Sheet Date

0195429885_147-151_ch30.qxd 2/13/08 5:15 PM Page 151

LABORATORYINVESTIGATION 31Op-Amp Frequency Response and Compensation

IntroductionAn inverting amplifier using a 741 op-amp is constructed and tested to determine its band-width. The circuit gain is modified, and the bandwidth is again investigated. The slew rateof the op-amp is next investigated by applying a square wave and measuring the rise timeof the output waveform. The slew-rate-limited cutoff frequency is then investigated. Aninverting amplifier using an LM108 op-amp is also investigated for bandwidth.

EquipmentOscilloscopeSignal generator;DC power supply; (0 to 15 V)0.25 W resistors(2 100 ), (2 1 k), 10 k, 100 k30 V capacitors3 pF, 30 pF, 1500 pFOp-amps741, LM108Circuit board

Procedure 1 741 Op-amp Circuit Bandwidth1-1 Using a 741 op-amp, construct the inverting amplifier circuit shown in Fig. 31-1 and

connect the test equipment as shown.1-2 Switch on the power supply and adjust it for VCC ;15 V.1-3 Set the signal generator for a 1 kHz sine wave and adjust the signal amplitude to

produce a 100 mV peak-to-peak circuit output. (Note that it may be necessary to usea resistive attenuator to reduce the signal amplitude.)

1-4 Record the input voltage (vi) and calculate the closed-loop gain (ACL); then main-taining the input voltage constant, increase the signal frequency until the output fallsto approximately 70.7 mV peak-to-peak. Record the upper cutoff frequency ( f2).

1-5 Change resistor R1 to 1 k to reduce the voltage gain by a factor of 10.

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1-6 Repeat Procedures 1-3 and 1-4.1-7 Connect a 1500 pF capacitor in parallel with R2; then repeat Procedures 1-3 and 1-4.

Procedure 2 Slew Rate Effects2-1 Using the inverting amplifier circuit in Fig. 31-1 (with R1 100 and R2 10 k),

reset the signal generator for a 1 kHz square wave, and adjust the signal amplitudeto produce a 10 V peak-to-peak output.

2-2 Measure the output rise time (tr), adjusting the signal frequency as necessary to givean accurate measurement. Record tr and calculate the slew rate (SR).

2-3 Reset the signal to a 1 kHz sine wave and adjust the signal amplitude to produce a10 V peak-to-peak output.

2-4 Maintaining the input voltage constant, increase the signal frequency until the out-put falls to approximately 7.07 V peak-to-peak. Record the slew-rate-limited cutofffrequency ( fp) along with the closed-loop gain and output peak amplitude.

Procedure 3 LM108 Op-amp Circuit Bandwidth3-1 Using an LM108 op-amp, construct the inverting amplifier circuit in Fig. 31-2. (This

is the circuit in Fig. 15-11 in the textbook, which is also analyzed in Examples 15-4and 15-5.)

153

Figure 31-1 Inverting amplifier circuit using a 741 op-amp.

(a) Circuit

VCC

VEE

741

7

4

6

3

2

10 k

R2

100

R1

R3100

Power supply

Circuit board

Tooscilloscope


R3

R1

R2

Signal generator

1 2 3 4

8 7 6 5741

0195429885_152-155_ch31.qxd 2/13/08 5:16 PM Page 153

3-2 Repeat Procedures 1-2 through 1-4.3-3 Change capacitor Cf from 30 pF to 3 pF, and again repeat Procedures 1-2 through 1-4.

154

Figure 31-2 Inverting amplifier circuit using an LM108 op-amp.

(a) Circuit

VCC

VEE

LM108

7

41 8

6

3

2

100 k

R2

1 k

R1

Cf30 pFR3

1 k

Power supply

Circuit board

Tooscilloscope


R3

Cf

R1

R2

Signal generator

1 2 3 4

8 7 6 5LM108

Analysis1 Referring to Fig. 15-13 in the textbook, calculate the circuit voltage gain and deter-

mine the expected upper cutoff frequency for the circuit with a 741 op-amp whenR1 100 , and when R1 1 k. Compare these values to those measured inProcedures 1-3 to 1-6.

2 Calculate the expected cutoff frequency for the 741 op-amp circuit with the capac-itor in parallel with R2. Compare the calculated value to the f2 value measured inProcedure 1-7.

3 Compare the slew rate determined from Procedure 2-1 with the 741 specified slewrate. Calculate the slew-rate limited cutoff frequency for the 741 op-amp circuit andcompare it to the measured value.

4 Compare the f2 values measured in Procedures 3-2 and 3-3 for the circuit using anLM108 to the values calculated in Example 15-4 in the textbook.

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155

Record Sheet L31-1

Procedure 1-4

Lab. # 31 Op-amp Frequency Response and Compensation

Vo = 100 mV p-to-pf2 =

Vi = ACL =

Procedure 1-6 Vo = 100 mV p-to-pf2 =

Vi = ACL =

Procedure 3-2 Vi =ACL = f2 =

Vo = 100 mV

Procedure 3-3 Vi =ACL = f2 =

Vo = 100 mV

Procedure 1-7 f2 =

Procedure 2-2 tr = V = SR =

Procedure 2-4 f2 =

Record Sheet Date

0195429885_152-155_ch31.qxd 2/13/08 5:16 PM Page 155

LABORATORYINVESTIGATION 32Sinusoidal Oscillators

IntroductionA phase shift oscillator with amplitude stabilization is constructed and tested. Adjustmentis made for least output distortion, and the effect of removing the amplitude stabilizationis investigated. A Wein bridge oscillator is also investigated.

EquipmentOscilloscope;DC power supply; (0 to 15 V)0.25 W resistors(3 150 ), 560 , 680 , (2 1.5 k), 2.2 k, 2.7 k, 4.7 k,

(2 15 k)Potentiometer(1 k 0.25 W)30 V capacitors(2 1500 pF), (2 2000 pF), (3 0.082 F), (3 0.15 F), (2 0.1 F)Diodes(6 1N914)Op-amp741Circuit board

Procedure 1 Phase Shift Oscillator1-1 Construct the phase shift oscillator circuit in Fig. 32-1 and connect an oscilloscope to

monitor the output. (Note the use of 0.1 F capacitors [C1 and C2] for circuit stabil-ity. Note also that this is the circuit designed in Example 16-5 in the textbook.)

1-2 Set R6 to maximum resistance, and then switch on the power supply and adjust it forVCC = ;15 V.

1-3 Observe the output waveform on the oscilloscope. Sketch the waveform on thelaboratory record sheet and record the amplitude and frequency.

1-4 Set R6 to minimum resistance and note the effect on the output.

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0195429885_156-159_ch32.qxd 2/13/08 5:17 PM Page 156

1-5 Readjust R6 to produce a ;5 V output. Record the output frequency.1-6 Switch off the power supply, substitute 0.15 F capacitors for the 0.082 F capacitors,

and then switch the supply on again and record the new amplitude and frequency ofthe output waveform.

Procedure 2 Wein Bridge Oscillator2-1 Construct the Wein bridge oscillator circuit in Fig. 32-2, omitting the diodes at this

time. Connect an oscilloscope to monitor the output.2-2 Switch on the power supply and adjust it for VCC ;10 V.2-3 Observe the output waveform on the oscilloscope. Sketch the waveform on the

laboratory record sheet and record the peak amplitude and frequency.2-4 Switch off the power supply and connect the diodes into the circuit as illustrated;

then switch the supply on again, and repeat Procedure 2-3.2-5 Switch off the power supply and change capacitors C1 and C2 to 2000 pF; then switch

the supply on again and repeat Procedure 2-3.

157

Figure 32-1 Amplitude-stabilized phase shift oscillator.

(a) Circuit

741

VCC

VEE

C10.1 F

C20.1 F

0.082 F0.082 F 0.082 F

1N914

R1

R150

R150

R4 R6

R3

R7

D3

C C C

D4

D1 D2

150

4.7 k

1 k 2.7 k1.5 k


Power supply

Circuit board

R3

C2

C1

C

CC

R1

R4

R7

RR

1 2 3 4

8 7 6 5741

D2

D4

D1D3

R6

0195429885_156-159_ch32.qxd 2/13/08 5:17 PM Page 157

158

Figure 32-2 Wein bridge oscillator circuit with amplitude stabilization.

(a) Circuit

741

VCC10 V

C21500 pF

C11500 pF

R42.2 k

R215 k

R115 k

R34.7 k

10 VVEE

D1

D2

D3

D4

D5

D6


Power supply

Circuit board

R1 R3

C1

D4

D5D6

D3

D2D1

R4R2C2

1 2 3 4

8 7 6 5741

Analysis1 Discuss the phase shift oscillator output waveforms obtained for Procedures 1-3

through 1-5, and compare the circuit performance to the design quantities in Exam-ple 16-5 in the textbook.

2 Discuss the results of changing the capacitor values in Procedure 1-6.3 Discuss the Wein bridge oscillator output waveforms obtained for Procedure 2-3.

Analyze the circuit and compare the calculated and measured frequencies.4 Analyze the diode amplitude stabilization circuit for the Wein bridge oscillator and

compare the calculated output amplitude to that measured in Procedure 2-4. Explainthe result of changing the capacitor values.

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159

Record Sheet L32-1

Procedure 1-3

Lab. # 32 Sinusoldal Oscillators

f =Vp =

f =Vp =

f =Vp =

f =Vp =

f =Vp =

f =Vp =

f =Vp =

Procedure 1-4

Procedure 2-4

Procedure 2-5

Procedure 1-5

Procedure 1-6

Procedure 2-3

Record Sheet Date

Outputwaveform

Outputwaveform

Outputwaveform

Outputwaveform

Outputwaveform

Outputwaveform

Outputwaveform

0195429885_156-159_ch32.qxd 2/13/08 5:17 PM Page 159

LABORATORYINVESTIGATION 33Square- and Triangular-WaveGenerators

IntroductionAn op-amp square-wave generator is constructed, and its circuit waveforms are monitored.The circuit is modified by changing resistor and capacitor values, and the effects of thechanges are investigated. A triangular-wave generator circuit is constructed and similarlytested.

EquipmentOscilloscope;DC power supply; (0 to 15 V)0.25 W resistors(2 3.3 k), (3 8.2 k), 10 k, (2 68 k), (2 270 k)30 V capacitors(2 0.1 F), (2 0.15 F)Op-amps(2 741)Circuit board

Procedure 1 Square Wave Generator1-1 Construct the waveform generator circuit in Fig. 33-1. Switch on the power supply

and adjust it for VCC ;15 V. (This is the circuit designed in Example 16-7 in thetextbook.)

1-2 Use the oscilloscope to observe the waveforms at the op-amp output and at thecapacitor. Sketch each waveform on the laboratory record sheet and record the peakamplitudes and frequency.

1-3 Connect a 6.8 k resistor in parallel with R1; then note the effect on both outputwaveforms by repeating Procedure 1-2.

1-4 Remove the resistor paralleling R1 and connect a 270 k resistor in parallel with R2;then repeat Procedure 1-2.

1-5 Remove the resistor paralleling R2 and connect a 0.1 F in parallel with C1; thenrepeat Procedure 1-2.

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Procedure 2 Triangular Wave Generator 2-1 Construct the waveform generator circuit in Fig. 33-2. Switch on the power supply

and adjust it for VCC ;9 V. (This is the circuit designed in Example 16-10 in thetextbook.)

2-2 Observe the waveform at the two op-amp output terminals on the oscilloscope. Sketchthe waveforms on the laboratory record sheet and record the peak amplitudes andfrequency.

2-3 Connect a 3.3 k resistor in parallel with R2; then note the effect on both outputwaveforms by repeating Procedure 2-2.

2-4 Remove the resistor paralleling R2 and connect a 8.2 k resistor in parallel with R3;then repeat Procedure 2-2.

2-5 Remove the resistor paralleling R3 and connect a 8.2 k resistor in parallel with R1;then repeat Procedure 2-2.

2-6 Remove the resistor paralleling R1 and connect a 0.15 F in parallel with C1; thenrepeat Procedure 2-2.

161

Figure 33-1 Square wave generator circuit.

(a) Circuit

R2270 k

R168 k

C10.1 F

R310 k

VCC15 V

15 VVEE

741


Power supply

Circuit board

R3

R2R1

1 2 3 4

8 7 6 5741

C1

0195429885_160-164_ch33.qxd 2/13/08 5:18 PM Page 161

162

Figure 33-2 Triangular waveform generator circuit.

(a) Circuit

9 V

9 V

8.2 k

3.3 k

R2

R3

R1741

9 V

9 V

0.15 F

8.2 k 741

C1


Circuit board

Power supply

R1

R3R1

A1R2

C1

A21 2 3 4

8 7 6 5741

1 2 3 4

8 7 6 5741

Analysis1 Discuss the square wave generator output waveforms obtained for Procedure 1-2

and compare the circuit performance to the design quantities in Example 16-7 inthe textbook.

2 Analyze the square wave generator circuit to determine the capacitor waveformamplitude and frequency for each resistor/capacitor change in Procedures 1-3through 1-5. Compare the calculated performance of the circuit to that determinedexperimentally.

3 Discuss the output waveforms from the triangular wave generator as determinedfor Procedure 2-2. Compare the circuit performance to the design quantities inExample 16-10 in the textbook.

4 Analyze the triangular wave generator circuit to determine the triangular wave ampli-tude and frequency for each resistor/capacitor change in Procedures 2-3 through 2-6.Compare the calculated and experimentally determined performance of the circuit.

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163

Record Sheet L33-1

Procedure 1-2

Lab. # 33 Square and Triangular Wave Generators

Vc =f = Vc waveform

Vo =f = Vo waveform

Procedure 1-3Vc =f = Vc waveform

Vo =f = Vo waveform


Vo =f = Vo waveform


Vo =f = Vo waveform

Record Sheet 1 Date

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164

Record Sheet L33-2

Procedure 2-2

Lab. # 33

Vo(A1) =f = Vo(A1) waveform


Procedure 2-3Vo(A1) =f = Vo(A1) waveform








Record Sheet 2

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LABORATORYINVESTIGATION 34Lowpass and Highpass Filters

IntroductionTwo second-order filter circuits designed in examples in the textbook are constructedand tested. A lowpass filter is tested for upper cutoff frequency and output falloff rate. Ahighpass filter is tested for lower cutoff frequency, falloff rate, and circuit upper cutofffrequency.

EquipmentDC power supply(;15 V, 50 mA)OscilloscopeSinusoidal signal generator(100 Hz to 11 MHz, ;1 V)Op-amps(741, 108)0.25 W, ;1% resistors9.3 k, 18.7 k, (2 68.1 k)0.25 W, ;10% resistors18 k, 120 k40 V capacitors(2 1000 pF), 1600 pF, 3200 pFCircuit board

Procedure 1 Lowpass Filter1-1 Construct the second-order lowpass filter circuit shown in Fig. 34-1 using the com-

ponent values determined in Example 17-4 in the textbook.1-2 Before connecting the power supply, switch it on and adjust its output for VCC ;12 V.

Switch the power supply off, and then connect it to the circuit and switch on.1-3 Use the oscilloscope to check that the filter circuit is not oscillating; then connect the

oscilloscope and signal generator as illustrated.1-4 Adjust the signal generator to apply a ;1 V, 100 Hz sinusoidal input to the filter. Check

that the output (Vo) displayed on the oscilloscope is approximately ;1 V, 100 Hz.1-5 Keeping the input amplitude constant, increase the signal frequency until the output

level falls to approximately ;0.7 Vo. Record the filter upper cutoff frequency ( fc) onthe laboratory record sheet.

1-6 Increase the signal frequency to 2 fc (keeping the input amplitude constant); thenmeasure and record the new peak level of the output voltage.

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Procedure 2 Highpass Filter2-1 Construct the second-order highpass filter circuit shown in Fig. 34-2 using the com-


Switch the power supply off, and then connect it to the circuit and switch on.2-3 Use the oscilloscope to check that the filter circuit is not oscillating, and then connect

the oscilloscope and signal generator to the circuit as illustrated.2-4 Adjust the signal generator to apply a ;1 V, 50 kHz sinusoidal input to the filter. Check

that the output (Vo) displayed on the oscilloscope is approximately ;1 V, 50 kHz.2-5 Keeping the input amplitude constant, reduce the signal frequency until the output

falls to approximately ;0.7 Vo. Record the filter lower cutoff frequency ( fc) on thelaboratory record sheet.

2-6 Reduce the signal frequency to fc/2 (keeping the input amplitude constant); thenmeasure and record the new peak level of the output voltage.

2-7 Increase the signal frequency through fc (keeping the input amplitude constant)until the output level falls to approximately ;0.7 Vo once again. Record the filterupper cutoff frequency ( f2) on the laboratory record sheet.

166

Figure 34-1 Second-order lowpass filter circuit and connection diagram.

(a) Circuit

12 V

12 V

741

76

42

3

R1 R2

68.1 k 68.1 k

120 k

R3

C11600 pF

C2

3300 pF

(b) Connection diagramCircuit board

Power supply

Tooscilloscope

R2

R1R3Signal generator

C2

C1

1 2 3 4

8 7 6 5741

0195429885_165-168_ch34.qxd 2/13/08 5:20 PM Page 166

167

Figure 34-2 Second-order highpass filter circuit and connection diagram.

(a) Circuit

15 V

15 V

108

76

84

1

3

2

R218.7 k

18 k

R1

1000 pF

Cf 30 pF

9.31 kC2

1000 pF

C1

R3


Power supply

Tooscilloscope

R2

R1

C1

Cf

R3Signal generator

C2

1 2 3 4

8 7 6 5108

Analysis1 Compare the lowpass filter cutoff frequency measured in Procedure 1-5 with the

design quantity in Example 17-4 in the textbook.2 Use the voltage levels measured in Procedures 1-5 and 1-6 to calculate the lowpass

filter output falloff rate. Compare to the theoretical falloff rate.3 Compare the highpass filter cutoff frequency measured in Procedure 2-5 with the

design quantity in Example 17-5 in the textbook.4 Use the voltage levels measured in Procedures 2-5 and 2-6 to calculate the highpass

filter output falloff rate.5 Calculate the upper cutoff frequency for the highpass filter, and compare it to the

cutoff frequency measured in Procedure 2-7.

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168

Record Sheet L34-1

Procedure 1-4

Lab. # 34 Lowpass and Highpass Filters

Vi Vo

VoProcedure 1-6 2fc

Procedure 2-6

Procedure 2-7 f2 =

Procedure 2-4

1 V

Procedure 2-5 fc =

Procedure 1-5 fc =

Record Sheet Date

Vi Vo1 V

Vofc/2

0195429885_165-168_ch34.qxd 2/13/08 5:20 PM Page 168

LABORATORYINVESTIGATION 35Bandpass Filters

IntroductionTwo bandpass filter circuits designed in examples in the textbook are constructed andtested. A single-stage filter is tested to determine its upper and lower cutoff frequenciesand the output falloff rate beyond these frequencies. A state-variable filter using three op-amps is tested for centre frequency and upper and lower cutoff frequencies.

EquipmentDC power supply(;15 V, 50 mA)OscilloscopeSinusoidal signal generator(100 Hz to 100 kHz, ;1 V)Op-amps(3 741)0.25 W, ;1% resistors(3 5.36 k), (5 15 k), 215 k, 301 k0.25 W, ;10% resistors150 , 5.6 k40 V capacitors(2 1000 pF), 0.1 FCircuit board

Procedure 1 Single-Stage Bandpass Filter1-1 Construct the second-order lowpass filter circuit shown in Fig. 35-1 using the com-


Switch the power supply off, and then connect it to the circuit and switch on. 1-3 Use the oscilloscope to check that the filter circuit is not oscillating; then connect the

oscilloscope and signal generator to the circuit as illustrated.1-4 Adjust the signal generator to apply a ;1 V, 3 kHz sinusoidal input to the filter. Check

that the output (Vo) displayed on the oscilloscope is approximately ;1 V, 3 kHz.1-5 Keeping the input amplitude constant, decrease the signal frequency until the out-

put level falls to approximately ;0.7 Vo. Record the filter lower cutoff frequency ( f1)on the laboratory record sheet.

1-6 Reduce the signal frequency to f1/2 (keeping the input amplitude constant); thenmeasure and record the new peak level of the output voltage.

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1-7 Increase the signal frequency through 3 kHz (keeping the input amplitude constant)until the output level falls to approximately ; 0.7 Vo once again. Record the filterupper cutoff frequency ( f2) on the laboratory record sheet.

1-8 Still maintaining the input amplitude constant, increase the signal frequency to 2f2.Measure and record the new peak level of the output voltage.

Procedure 2 State-Variable Bandpass Filter2-1 Construct the second-order highpass filter circuit shown in Fig. 35-2 using the com-


Switch the power supply off; then connect it to the circuit and switch on.2-3 Use the oscilloscope to check that the filter circuit is not oscillating; then connect the

signal generator to the circuit input (at R1) and the oscilloscope to monitor the inputand the A2 output.

2-4 Adjust the signal generator to apply a ;0.1 V, 10 kHz sinusoidal input to the filter;then carefully adjust the frequency for maximum output amplitude (Vo) at the filtercentre frequency ( fo). Record fo and Vo.

2-5 Keeping the input amplitude constant, reduce the signal frequency until the outputfalls to approximately ;0.7 Vo. Record the filter lower cutoff frequency ( f1) on thelaboratory record sheet.

2-6 Increase the signal frequency through fo (keeping the amplitude constant) until theoutput falls to approximately ;0.7 Vo once again. Record the filter upper cutofffrequency ( f2) on the laboratory record sheet.

170

Figure 35-1 Circuit and connection diagram for single-stage bandpass filter.

(a) Circuit

12 V

12 V

741

7

4

6

3

2

5.36 k

1000 pF R2

C2

5.36 k

R1

R35.6 k

0.1 F

C1

Power supply

Circuit board

Tooscilloscope


C1

R3

R1

R2

Signal generator

C2

1 2 3 4

8 7 6 5741

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171

Figure 35-2 Circuit and connection diagram for state-variable filter.

(a) Circuit

15 V

15 V15 V

15 k

R1R5

A1741

1000 pF

15 k

R6

15 k

R4

15 k

C1

15 k

R3

R2

215 k 301 k

7

46

2

315 V

A2741

7

46

3

2

15 V

1000 pF

C2

15 V

A3741

7

46

3

2

Circuit board


Power supply

R4

R2

R3

R6

C1

R5

R1

R2C2

1 2 3 4

8 7 6 5A1

1 2 3 4

8 7 6 5A2

1 2 3 4

8 7 6 5A3

Analysis1 Compare the single-stage bandpass filter upper and lower cutoff frequencies mea-

sured in Procedures 1-5 and 1-7 with the design quantity in Example 17-8 in thetextbook.

2 Use the voltages measured in Procedures 1-6 and 1-8 to calculate the falloff ratesfor the single-stage bandpass filter. Compare to the theoretical falloff rate.

3 Compare the state-variable bandpass filter centre frequency and cutoff frequenciesmeasured in Procedures 2-4 through 2-6 with the design quantity in Example 17-12in the textbook.

0195429885_169-172_ch35.qxd 2/13/08 5:20 PM Page 171

172

Record Sheet L35-1

Procedures 1-4 to 1-6

Lab. # 35 Bandpass Filters

Vi Vo1 V

f1 =

Record Sheet Date

Vi Vo fo f1 f20.1 V

f12 Vo

Procedures 1-7 to 1-8 f2 = 2f2 Vo

Procedures 2-4 to 2-6

0195429885_169-172_ch35.qxd 2/13/08 5:20 PM Page 172

LABORATORYINVESTIGATION 36Series Voltage Regulator

IntroductionAn op-amp series voltage regulator circuit is constructed together with a rectifier powersupply. The circuit is tested for output voltage adjustment, ripple reduction, sourceeffect, and load effect. The regulator circuit is modified to investigate two types ofcurrent limiting.

Equipment115 V, 60 Hz variable-voltage transformer (variac)115 V, 60 Hz, 1:1 isolating transformerDC power supply(015 V)OscilloscopeThree digital multimetersSingle-pole switch20 V, 100 mARectifier diodes (4 1N4001)Decade resistance box200 mAZener diode1N757BJTs(2 2N3904), 2N718Heat sink to fit 2N718 Op-amp7410.5 W potentiometer2.5 k0.25 W resistors10 , 270 , 470 , 2.2 k, 2.7 k, 6.8 k, (2 12 k)30 V capacitors100 F, 330 FCircuit board

Procedure 1 Op-amp Voltage Regulator1-1 Construct the rectifier power supply and the series voltage regulator circuit in

Fig. 36-1 and connect the test equipment as shown. (This is the regulator designedin Example 18-8 in the textbook.)

1-2 Set the load resistor (RL) for maximum resistance and adjust the variac for the lowestac output voltage.

173

0195429885_173-177_ch36.qxd 2/13/08 5:21 PM Page 173

1-3 Connect the 115 V ac supply. Switch on the supply and slowly increase the variacto give a 20 V dc supply (Vs) to the regulator. Use the oscilloscope at the regulatoroutput to check that the circuit is not oscillating.

1-4 Adjust R5 to the top (R3 end) of its range of adjustment and adjust RL to give a 50 mAload current (IL); then readjust the variac for Vs 20 V.

1-5 Record the precise level of the regulator output voltage (Vo) on the laboratory recordsheet. Measure and record the voltages throughout the circuit.

1-6 Adjust R5 to the bottom (R4 end) of its range of adjustment, and reset RL for IL 50 mA.Again record the voltages throughout the circuit.

1-7 Adjust R5 to the give Vo 13.5 V and readjust RL to give IL 100 mA.1-8 Use the oscilloscope to measure the peak-to-peak ripple voltage (Vri and Vro) at the

regulator input and output. Record the quantities.

174

Figure 36-1 Op-amp voltage regulator circuit with a rectifier dc power supply.

VariacIsolating

transformer

Regulator under test

Decadebox

115 V60 Hz

330F

Vs

R1270

RL

R32.7 k

R46.8 k

R612 k

2.5 k

VoV

A

VC1

D3D2Q1

D1

2N718

1N757

741Q2

2N3904

D5D4

100F

C2A1

IL

(a) Circuit

R5

Toisolating

transformer

Circuit board(b) Connection diagram

Vo

Ground

C1

R6 D1

D2 and D3

D4 and D5

R4

R1 R3

C2

R5

1 2 3 4

8 7 6 5A1

E

Q1BC

EQ2BC

0195429885_173-177_ch36.qxd 2/13/08 5:21 PM Page 174

Procedure 2 Source Effect and Load Effect Measurement 2-1 Connect the additional dc voltmeter (VM2) and the power supply (PS1) as illustrated

in Fig. 36-2, and adjust PS1 to give a near zero reading on VM2. In this arrangement,PS1 is a back-off supply adjusted to equal Vo, and VM2 is a null detector, which measuressmall differences between Vo and the PS1 voltage.

2-2 Adjust the variac to increase the regulator dc supply voltage (Vs) by 10%. Measureand record the dc output voltage change indicated on VM2. (This is the regulatorsource effect: Vo(source).)

2-3 Reset the variac for Vs 20 V.2-4 Disconnect RL and observe the output voltage change from full-load to no-load

indicated on VM2. (This is the regulator load effect, Vo(load).)

Procedure 3 Use of Current Limiter 3-1 Switch off the ac supply and disconnect RL, power supply PS1, and voltmeter VM2.3-2 Modify the regulator circuit to include current limiting, as illustrated in Fig. 36-3a.

Note the inclusion of resistor R13.3-3 Keeping switch S1 open-circuited, switch the ac supply on again, adjust the variac to

give Vs 20 V, and adjust R5 to for Vo 12 V.3-4 With IL 0, measure and record the voltages throughout the circuit.3-5 Adjust the load resistance to RL 240 ; then close S1 and record the levels of IL and Vo.3-6 Open S1 and adjust RL to 100 ; then close S1 again and record the levels of IL and Vo.3-7 Open S1 once again and adjust RL to zero; then close S1 and record the levels of IL and

Vo once more.3-8 Switch off the ac supply, and modify the circuit for fold-back current limiting, as illus-

trated in Fig. 36-3b.3-9 Repeat Procedures 3-5 through 3-7.

175

Figure 36-2 Test equipment connection for measuring source and load effects.

R32.7 k

R46.8 k

R52.5 k

Vo

VM2

V100F

Regulator under test Nulldetector

Back-offpowersupply

PS1C2 RL

A IL

V

0195429885_173-177_ch36.qxd 2/13/08 5:21 PM Page 175

176

Figure 36-3 Regulator modifications for two types of current limiting circuit.

(a) Circuit modifications for overload protection

R1270

12 k

Q1

R13

R6 D1

10

741

2N718

1N757

2N3904Q2

Q7

2N3904

A1

RL

R10

A IL

S1R3

2.7 k

R46.8 k

R52.5 k

100F

C2Vo

V

(b) Modification for foldback current limiting

R11470

R1212 k

4.7

2N3904

Q7C2

100 F

R10

Analysis1 Discuss the voltage measurements from Procedures 1-5 through 1-6 and compare

them to the design values used in Example 18-8.2 Analyze the regulator circuit for ripple reduction, source effect, and load effect.

Compare the calculated and measured circuit performance.3 From the results of Procedure 3, plot the regulator current limiting characteristics

for both types of current-limiting circuit. Analyze the two current limiting circuitsand compare the calculated and measured circuit performances.

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177

Record Sheet L36-1

Procedure 1-5

Lab. # 36 Series Voltage Regulator

Vo(min) VA1+ VA1 VA1(out) VEQ2 Vs

Vo

RL() 240 100 0

VA1+ VA1 VA1(out) VEQ1 VEQ2 VBQ2 Vs

Vo(max)

IL(mA)Vo(V)

Vri = Vro =

VA1+ VA1 VA1(out) VEQ2 VsProcedure 1-6

Procedure 3-4

Procedures 3-5through 3-7

Procedures 3-9

Procedure 1-8

Procedure 2-2 Source effect Vo(source) =

Load effect Vo(load) =Procedure 2-4

Record Sheet Date

RL() 240 100 0IL(mA)Vo(V)

0195429885_173-177_ch36.qxd 2/13/08 5:21 PM Page 177

LABORATORYINVESTIGATION 37BJT Output Power Amplifier

IntroductionA BJT class AB power amplifier with an op-amp driver is constructed and tested for dcand ac performance. The dc voltages throughout the circuit are first checked withoutthe load resistor connected. The load resistor is connected, and an ac signal is applied sothat the amplifier waveforms, frequency response, output power, and efficiency can beinvestigated.

EquipmentDC power supply(;17 V, 200 mA)2 digital multimetersOscilloscopeSignal generatoraudio rangeLow-power npn and pnp BJTs2N718, 2N722Op-ampLF356Heat sinks for low-power BJTsDiodes(2 1N914)0.25 W resistors(2 8.2 ), (4 1.5 k), 4.7 k, 10 k, 82 k2 W resistor100 40 V capacitors1 F, 1.8 F, (2 100 F) Circuit board

Procedure 1 DC Conditions1-1 Construct the amplifier circuit in Fig. 37-1, leaving the signal generator and load

resistor (RL) unconnected at this time. (This is the circuit analyzed in Example 19-15in the textbook.)

1-2 Before connecting the power supply, switch it on and adjust its output for VCC ;17 V;then connect the power supply and switch on.

1-3 Use an oscilloscope at the output to check that the circuit is not oscillating.1-4 Measure and record the dc voltages throughout the circuit (with respect to ground)

as listed on the laboratory record sheet. 1-5 Connect the 100 load resistor and check that the dc output voltage remains zero.

178

0195429885_178-182_ch37.qxd 2/13/08 5:22 PM Page 178

179

Figure 37-1 Two-stage direct-coupled BJT output power amplifier.

D1

Q1 2N718

2N722Q2

LF356

7

4

6

2

3

R24.7 k

C21.8 F

R182 k

R81.5 k

R91.5 k

R101.5 k

R310 k

R111.5 k

R68.2

R78.2

RL100

VCC17 V

17 VVEE

C1

C3100 F

C4100 F

1 F

D2

(a) BJT output power amplifier circuit


Circuit board

Power supply

R2

R3

R6

R1 C2C4

C1

C3

1 2 3 4

8 7 6 5LF356

R7

RL

R8

R9D1

R11

R10

Signal generator D2

EQ1BC

C

Q2B E

0195429885_178-182_ch37.qxd 2/13/08 5:22 PM Page 179

Procedure 2 AC Measurements2-1 Connect a signal generator to the input and an oscilloscope to monitor the input and

output waveforms. Connect ammeters to measure the power supply (dc) currents. 2-2 Set the signal generator frequency to 3 kHz and adjust the signal amplitude to give

the largest undistorted output waveform.2-3 Sketch the input and output waveforms on the laboratory record sheet and record

the peak voltages. Record the dc supply currents.2-4 Adjust the signal frequency in steps as listed on the laboratory record sheet, taking

care to keep the signal amplitude constant. Record the output voltage amplitude ateach signal frequency.

2-5 Change C2 to 1 F, and then investigate the new lower cutoff frequency ( f1).2-6 Connect a 330 pF capacitor in parallel with resistor R3; then investigate the new

higher cutoff frequency ( f2).

180

Analysis1 Discuss the measured dc voltage levels for the circuit (Procedure 1-4), and calculate

the current levels throughout the circuit.2 Calculate the overall voltage gain from the results of Procedure 2-3. Comment on

the peak output voltage in comparison to the supply voltage.3 Calculate the dc input power, ac output power, and circuit efficiency from the

measurements made for Procedure 2-3.4 From the results of Procedure 2-4, plot the amplifier frequency response and

estimate the circuit cutoff frequencies ( f1 and f2). Calculate f1 from the circuit com-ponent values and compare it to the experimentally determined f1. Comment onthe measured f2.

5 Calculate the lower and upper cutoff frequencies for the changes made inProcedures 2-5 and 2-6. Compare the calculated and measured quantities.

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181

Record Sheet L37-1

Procedure 1-4Op-amp terminal voltages

Procedure 2-3

Procedure 2-4

Procedures 2-5 and 2-6

Lab. # 37 BJT Output Power Amplifier

Vi(pk) =

Vo(pk) =

V2() V6V3(+)

Idc(+VCC) = Idc(VCC) =

f1 = f2 =

f (Hz)Vo(V)

20

Inputwaveform

Outputwaveform

30 50 70 100 150 200

BJT terminal voltages VB1 VE1VB2 VE2

Resistor junction voltages VR8, R9 VR6, R7VR10, R11

f (Hz)Vo(V)

400 600 800 1 k 2 k 5 k 10 k

f (Hz)Vo(V)

20 k 30 k 50 k 60 k 70 k 80 k 100 k

Record Sheet Date

0195429885_178-182_ch37.qxd 2/13/08 5:22 PM Page 181

182

43

21

98

76

54

32

19

87

65

43

21

98

76

54

32

11

98

76

54

32

Log Graph Paper

0195429885_178-182_ch37.qxd 2/13/08 5:22 PM Page 182

LABORATORYINVESTIGATION 38MOSFET Output Power Amplifier

IntroductionA direct-coupled MOSFET output class AB power amplifier with an op-amp driver stageis constructed and tested for dc and ac performance. The dc voltages throughout thecircuit are first checked without the load resistor connected. The load resistor is connected,and an ac signal is applied to investigate the circuit waveforms and frequency response.

EquipmentDC power supply(;15 V, 1A)2 digital multimetersOscilloscopeAudio-range signal generatorOp-ampLF351Low-power npn BJTs(2 2N3904)p-channel power MOSFETe.g., IRF9522n-channel power MOSFETe.g., IRF520Heat sinks for MOSFETs0.25 W resistors(2 100 ), 470 , (2 820 ), (2 1.2 k), 2.2 k, 12 k, (2 33 k)Variable resistor1 k, 0.1 W10 W resistor20 30 V capacitors100 pF, 0.004 F, 3 F, 3.9 FCircuit board

Procedure 1 DC Conditions1-1 Construct the amplifier circuit in Fig. 38-1, using heat sinks with the MOSFETs and

including the ammeters in series with the positive and negative supply lines. Leavethe load resistor, signal generator, and oscilloscope unconnected at this time. (Thiscircuit is similar to the one analyzed in Examples 19-21 and 19-22 in the textbook.)

1-2 Set the variable resistor (R3) to maximum, and before connecting the power supply,switch it on and adjust its output for VCC ;15 V.

183

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184

Q2

Q1LF351

2N3904

2N3904

A1

Q3

Q4

A

A

R433 k

R91 k

R6

R10

1 k

R112 k

R71.2 k R11

100

RL12

R81.2 k

100

R52.2 k

C23.9 F

C4 100 pF

R2470

R31 k

VCC15 V

VEE15 V

C13 F

C30.004 F

33 k

R12

(a) MOSFET output power amplifier circuit


R8C2

C4C1

R2

R5

R1 R7

R12

R6R9

R10

RL

R4

1 2 3 4

8 7 6 5A1

R3

E B CQ2

Q4

Q1E B C Q3

G D S

Signal generator

ACOM

A

Ammeter

V

ACOM

A

Ammeter

To VCC

V

To supplyground

To VEE

R11

G D S

Figure 38-1 Two-stage direct-coupled MOSFET power amplifier.

0195429885_183-187_ch38.qxd 2/13/08 5:23 PM Page 184

185

Analysis1 Comment on the range of adjustment of the MOSFET gate-source voltages (VR7 and

VR8) and drain current levels as measured for Procedures 1-5 through 1-7.2 Discuss the circuit voltages measured for Procedures 1-4 through 1-6.3 Calculate the overall voltage gain from the results of Procedure 2-3. Comment on

the peak output voltages in comparison to the supply voltages.4 From the results of Procedure 2-5, plot the amplifier frequency response and

estimate the cutoff frequencies ( f1 and f2). 5 Calculate f1 and f2 from the component values and compare to the measured cutoff

frequencies.

1-3 Connect the power supply and switch it on and off again. While the power supply ison, observe the supply current levels (Is() and Is()), which are largely the MOSFETdrain currents. Is() and Is() should not exceed 75 mA for this particular circuit, anddepending on the MOSFETs used, it may be necessary the change the resistances ofR7 and R8.

1-4 Connect the oscilloscope to monitor the output for circuit oscillation.1-5 Switch the supply on again, and with R3 at its maximum resistance, measure Is() and

Is(). Measure the dc voltages throughout the circuit. Record all measured values onthe laboratory record sheet.

1-6 Switch off the power supply and adjust R3 to its minimum resistance. Switch thepower supply on (and off again if necessary), and note the supply current levels.

1-7 With the supply on, adjust R3 to give Is() and Is() approximately equal to 75 mA.Once again measure the circuit voltages.

1-8 Connect the 20 load resistor; then check that the circuit dc voltage and currentlevels are unaffected.

Procedure 2 AC Measurements2-1 Remove the dc ammeters from the supply lines, connect the signal generator to the

input, and connect the oscilloscope to monitor the input and output waveforms. 2-2 Set the signal generator frequency to approximately 3 kHz and adjust the signal

amplitude to give the largest undistorted output waveform.2-3 Sketch the input and output waveforms on the laboratory record sheet and record

the peak voltages. 2-4 Monitor the waveforms at the op-amp output and supply terminals. Sketch the

waveforms on the laboratory record sheet and record the peak voltages.2-5 Monitoring Vin and Vout, adjust the signal frequency in steps, as listed on the labora-

tory record sheet, taking care to keep the signal amplitude constant. Record the out-put voltage amplitude at each signal frequency.

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186

Record Sheet L38-1

Procedure 1-5

Lab. # 38 MOSFET Output Power Amplifier

VCC VEE

A1 terminals

VB1 VB2 VC2 V2 V3 V6 V7 V4 Vo

IS(+) IS()

Procedure 1-6

Procedure 1-7

Procedure 2-3

Procedure 2-4

IS(+)

Vi(pk) =

Vo(pk) =

Vs(+) =

Vs() =

VR9 =

IS()

Record Sheet Date

VCC VEE VB1 VB2 VC2 V2 V3 V6 V7 V4 Vo

Procedure 2-5f (Hz)Vo(V)

Vo(V)

20 30 40 50 100 200 500 5 k

f (Hz) 10 k 15 k 20 k 30 k 40 k 50 k 60 k 70 k

Op-ampwaveforms

Inputwaveform

Outputwaveform

A1 terminals

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187

43

21

98

76

54

32

19

87

65

43

21

98

76

54

32

11

98

76

54

32

Log Graph Paper

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188

LABORATORYINVESTIGATION 39SCR Characteristics and 90 Phase Control

IntroductionThe characteristics of an SCR are first determined by applying a constant anode voltage(VA) and increasing the gate-cathode voltage (VGK) until the SCR switches on. The gatecurrent and voltage are noted at the switch-on instant, and VAK is measured after switch-on.The process is repeated with different levels of VA. An SCR 90 phase control circuit is nextconstructed and tested by monitoring the ac supply and load waveforms for various controlelement settings.

EquipmentTwo dc power supplies;(0 to 20 V)Two dc voltmeters(0 to 20 V)DC ammeter(0 to 100 mA)DC ammeter(0 to 20 A)Oscilloscope115 V, 60 Hz variable-voltage transformer (variac)115 V, 60 Hz, 1:1 isolating transformer 0.25 W resistors120 , 270 , (2 1 k), 1.5 k, 2.2 k0.5 W potentiometer1.5 k3 W resistor100 Low-current SCR2N5064Low-current diode1N914Circuit board

Procedure 1 SCR Forward Characteristics1-1 Construct the SCR circuit in Fig. 39-1a according to the connection diagram in

Fig. 39-1b. 1-2 Set both power supply voltages to zero; then switch on and adjust VA to 5 V. At this

time VGK, IG, and IA should all be zero.

0195429885_188-192_ch39.qxd 2/13/08 5:24 PM Page 188

1-3 Slowly increase VG until the SCR fires (IA suddenly increases). Record the levels of IGand VGK at (or just before) the instant IA increases. (It may be necessary to repeat theprocess several times to get accurate measurements. To do so, VG should be reducedto zero, and VA should be switched off and then on again.)

1-4 Record VAK and IA when the SCR is on.1-5 Reduce VG to zero; then switch VA off and on, and again note the levels of VAK

and IA. 1-6 Adjust VA to 10 V. 1-7 Slowly increase VG until the SCR fires again. Record IG and VGK as explained in

Procedure 1-3. Record VAK and IA with the SCR on.

189

Figure 39-1 Circuit for investigating SCR characteristics.

1.5 k 1 k

R41 k

SCR1R1 R3

R2270

VAK

IA

IGVG

VA

VGK

(a) Circuit

V

V

A

A


A COM

A

V

Ammeter (IG)

A COM

A

V

Ammeter (IA)

A COM

V

V

Voltmeter (VGK)

A COM

V

V

Voltmeter (VAK)

Power supply (VA)

SCR1R1

R2

R3

R4

K G A

Bottom view2N5064

AGK

Power supply (VG)

0195429885_188-192_ch39.qxd 2/13/08 5:24 PM Page 189

190

1-8 Reduce VG to zero, and then switch VA off and on again. 1-9 Adjust VA to give VAK equal to 15 V. 1-10 Slowly increase VG until the SCR fires again. Record the IG and VGK once again as

explained in Procedure 1-3. Record VAK and IA with the SCR on once again.1-11 Reduce VG to zero and reconnect the VGK voltmeter to measure VA. Then progres-

sively adjust VA to 4 V, 3 V, and 2 V, recording VAK and IA at each step.1-12 Disconnect the voltmeter measuring VAK; then, observing IA, slowly reduce VA from

3 V to zero. Note the lowest level of IA that the SCR conducts at (the holding current)before it switches off.

Procedure 2 SCR 90 Phase Control Circuit2-1 Construct the phase control circuit shown in Fig. 39-2, keeping the ac supply off and

the variac set for zero output. (This is the circuit designed in Example 20-2 in thetextbook.)

Figure 39-2 SCR 90 control circuit.

(a) Circuit

SCR1

RL100

R12.2 k

R21.5 k

R3120

Variac

115 V60 Hz

Isolatingtransformer

D1


R1

Vi

VL

D1

RLR3

Tooscilloscope

AGK


VariacSCR1

R2

0195429885_188-192_ch39.qxd 2/13/08 5:24 PM Page 190

2-2 Adjust potentiometer R2 for minimum gate-cathode voltage (VGK).2-3 Switch on the ac supply and adjust the variac to give Vi 30 V peak as monitored on

the oscilloscope.2-4 Investigate the waveform (VL) developed across RL for various settings of R2. Note

the relationship between Vi and VL, and sketch each waveform on the record sheet.

191

Analysis1 Plot the SCR characteristics from the results of Procedures 1-3 through 1-10. 2 Discuss the relationship between the SCR anode-cathode voltage and the gate cur-

rent required to fire the SCR.3 Explain the results of Procedures 1-11 and 1-12.4 Note the measured forward on voltage (VTM), the gate triggering current (IG), and

the holding current (IH), and compare them to the specified quantities for the SCRused.

5 Discuss the load waveform produced by the 90 control circuit and the effect ofadjusting R2. Compare the range of waveform adjustment with that specified forExample 20-2 in the textbook.

0195429885_188-192_ch39.qxd 2/13/08 5:24 PM Page 191

192

Record Sheet L39-1

Procedure 1-3 and 1-4

Lab. # 39 SCR Characteristics and 90 Phase Control

(VA = 5 V)

R2(min) R2(max)

IG VGK VAK IA

Procedure 1-5

Procedure 1-7

Procedure 1-10

Record Sheet Date

(VA = 10 V) IG VGK VAK IA

(VA = 15 V) IG VGK VAK IA

Procedure 1-11

VAK(V)4 V 3 V 2 V

VAK IA

Procedure 1-12

Procedure 2-4

IH =

Vi

VL

IA(mA)

VA

0195429885_188-192_ch39.qxd 2/13/08 5:24 PM Page 192

LABORATORYINVESTIGATION 40SCR and TRIAC Control Circuits

IntroductionAn SCR 180 phase control circuit is constructed, and its output (load) waveform is com-pared to the ac source waveform. The control element is adjusted to determine the maximumand minimum angles of the output wave. The waveform developed across the capacitorin the control circuit is also investigated. A TRIAC 180 phase control circuit is constructedand tested in a similar way to the SCR circuit.

EquipmentOscilloscope115 V, 60 Hz variable-voltage transformer (variac)115 V, 60 Hz, 1:1 isolating transformer 0.25 W resistors1.5 k, 2.7 k10 W resistor500 0.5 W potentiometers10 k, 25 k150 V capacitors0.82 F, 3 FLow-current diodes(2 1N914)Low-current SCRe.g., 2N5064Low-current TRIACe.g., 2N6436Low-current DIACe.g., HS10Circuit board

Procedure 1 SCR 180 Phase Control Circuit1-1 Construct the SCR 180 phase control circuit in Fig. 40-1, keeping the ac supply

off and the variac set for zero output. (This is the circuit designed for PracticeProblem 20-2.2 in the textbook.)

1-2 Adjust potentiometer R1 for maximum resistance.1-3 Switch on the ac supply and adjust the variac to give Vi 70 V peak.1-4 Investigate the load waveform (VL) developed across RL for various settings of R1 as

listed on the laboratory record sheet. Note the relationship between Vi and VL, andsketch each waveform on the record sheet.

193

0195429885_193-196_ch40.qxd 2/13/08 5:25 PM Page 193

1-5 Investigate the capacitor waveform (VC) developed across C1 for various settings ofR1. Note the relationship between VC and VL, and sketch the capacitor waveform onthe record sheet.

Procedure 2 TRIAC Phase Control Circuit 2-1 Construct the TRIAC phase control circuit shown in Fig. 40-2, keeping the ac supply

off and the variac set for zero output. (This is the circuit in Example 20-4 in thetextbook.)

2-2 Adjust variable resistor R1 for maximum resistance.2-3 Switch on the ac supply and adjust the variac to give Vi 115 V rms.2-4 Investigate the waveform (VL) developed across RL for various settings of R1 as

listed on the laboratory record sheet. Note the relationship between Vi and VL, andsketch each waveform on the record sheet.

194

Figure 40-1 SCR 180 phase control circuit.

(a) Circuit


VariacRL

VC1

SCR12N5064

D2

D1R1

10 k

115 V60 Hz

C10.82 F 500

10 W

R2

1.5 k

K

Bottom view2N5064

AG


D1

D2

RL

R2

Vi

VL

C1AGK


VariacSCR1

Tooscilloscope

Tooscilloscope

R1

0195429885_193-196_ch40.qxd 2/13/08 5:25 PM Page 194

Figure 40-2 TRIAC phase control circuit.

ac voltagesource

2N6346

HS-10

D1

R125 k

RL

500 10 W

R22.7 k

C13 F

Q1

(a) Circuit

Bottom view2N6346

MT1 MT2 G


D1Q1R2

RL

C1


Variac

Tooscilloscope

Tooscilloscope

R1VL

Vi

Analysis1 Discuss the load waveform produced by the SCR 180 control circuit, and discuss

the effect produced by adjusting R1. 2 Compare the range of load waveform phase adjustment (in the SCR 180 control

circuit) with that specified for Practice Problem 20-2.2 in the textbook.3 Discuss the capacitor waveform (in the SCR 180 control circuit) and explain how

it is affected by adjusting R1. 4 Discuss the load waveform for the TRIAC 180 control circuit and the effect that

R1 adjustment has on the waveform. 5 Compare the range of load waveform phase adjustment (in the TRIAC control

circuit) with that calculated in Example 20-4 in the textbook.

195

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196

Record Sheet L40-1

Procedure 1-4

Lab. # 40 SCR and TRIAC Control Circuits

R1(min) R1(max)

Record Sheet Date

Vi

VL

Procedure 1-5R1(min) R1(max)

VC

VL

Procedure 2-4R1(min) R1(max)

Vi

VL

0195429885_193-196_ch40.qxd 2/13/08 5:25 PM Page 196

LABORATORYINVESTIGATION 41UJT and PUT Circuits

IntroductionThe characteristics of a unijunction transistor (UJT) are investigated by the process ofsetting the VB1B2 voltage at a fixed level and measuring the emitter voltage for variousemitter current levels. The process is repeated for several different VB1B2 levels to obtain afamily of characteristics. Two relaxation oscillators are constructed and tested, one usinga UJT and the other using a programmable unijunction transistors (PUT).

EquipmentOscilloscopeTwo power supplies(0 to 30 V)Two dc voltmeters(0 to 30 V)DC ammeter(0 to 5 mA)0.25 W resistors470 , 3.9 k, 6.8 k, 18 k, 33 k, 150 k0.5 W potentiometers10 k30 V capacitors0.05 F, 1 FUJTe.g., 2N4949PUTe.g., 2N6027Circuit board

Procedure 1 UJT Characteristics1-1 Construct the UJT circuit shown in Fig. 41-1.1-2 Switch on the base terminal supply (VBB) and adjust it to 5 V.1-3 Switch on the emitter supply (VE) and adjust it to give IE 4 mA.1-4 Measure the level of VEB1 when IE 4 mA and record it on the laboratory record

sheet.1-5 Keeping VBB constant, carefully reduce IE to each of the current levels listed on the

record sheet and record the corresponding VEB1 levels. (It may not be possible to reduceIE to 0.5 mA. In this case reduce it to the lowest possible level greater than zero.)

1-6 Reset VBB to 10 V and readjust IE to 4 mA.

197

0195429885_197-202_ch41.qxd 2/13/08 5:26 PM Page 197

1-7 Repeat Procedures 1-4 and 1-5 with VBB 10 V.1-8 Reset VBB to 15 V and readjust IE to 4 mA.1-9 Repeat Procedures 1-4 and 1-5 with VBB 15 V.1-10 Reset VBB to 5 V and readjust IE to zero.1-11 Slowly increase VEB1 to the point where IE increases rapidly. Record VEB1 (the peak

point voltage,VP, at this point.)1-12 Repeat Procedures 1-10 and 1-11 with VBB 10 V.1-13 Repeat Procedures 1-10 and 1-11 with VBB 15 V.

198

Figure 41-1 Circuit for determining UJT characteristics

3.9 k

R1 EIE B2

B1VEB1

VBB

VS

UJTA

V

V

(a) Circuit


R1

A

Ammeter(IE)

E

B2B1

Bottom view2N4949

A

Power supply (VBB)

Power supply (VS)

A COM

V

V

UJTB2EB1

COM

V

V

V

Voltmeter(VEB1)

Voltmeter(VBB)

ACOM

0195429885_197-202_ch41.qxd 2/13/08 5:26 PM Page 198

Procedure 2 UJT Relaxation Oscillator2-1 Construct the UJT relaxation oscillator in Fig. 41-2. (This is the circuit in Exam-

ple 20-9 in the textbook.)

199

Figure 41-2 UJT relaxation oscillator.

(a) Circuit

R3470 R1

18 k

C11 F

VBB25 V

Q1


Power supply (VBB)

C1

UJTR3

R2

B2EB1

Tooscilloscope

2-2 Switch VBB on and use the oscilloscope to monitor the circuit waveforms at theemitter and output terminals.

2-3 Sketch the waveforms on the laboratory record sheet and note the frequencies.

Procedure 3 PUT Relaxation Oscillator 3-1 Construct the PUT relaxation oscillator in Fig. 41-3 using, 10:1 probes for the oscillo-

scope. (This circuit is similar to the PUT circuit used in the battery charger in Fig. 20-49in the textbook.)

3-2 Adjust the moving contact of potentiometer R4 approximately to the centre of itsadjustment range.

3-3 Switch VBB on and monitor the capacitor waveform (at the PUT anode). Sketch thewaveform on the laboratory record sheet and note the upper and lower peak levels.

3-4 Adjust potentiometer R4 to each extreme of its range and measure the peak anodevoltage at each position of R4. Record the peak voltage levels and sketch the wave-forms on the laboratory record sheet.

0195429885_197-202_ch41.qxd 2/13/08 5:26 PM Page 199

200

Figure 41-3 PUT relaxation oscillator.

(a) Circuit

R36.8 k

R410 k

R533 k

R2150 k

Q1

C10.05 F

VBB12 V

(b) Connection diagramPower supply (VBB)

C1 Q1

R3R2

R5

AGK

Tooscilloscope

R4

A

Bottom view2N6027

KG

Analysis1 Plot the UJT characteristics from the results of Procedure 1.2 Calculate the intrinsic stand-off ratio () from the results of Procedures 1-11

through 1-13. Use Equation 20-9 in the textbook.3 Compare the calculated value of with the specified value for the UJT.4 Discuss the waveforms obtained for the UJT relaxation oscillator investigated in

Procedure 2. Compare the operating frequency with that calculated in Example 20-9in the textbook.

5 Discuss the waveforms obtained for the PUT relaxation oscillator investigated inProcedure 3. Compare the measured peak anode voltages with the maximum andminimum peak voltages calculated in Example 20-10 in the textbook.

0195429885_197-202_ch41.qxd 2/13/08 5:26 PM Page 200

201

Record Sheet L41-1

Procedures 1-4 and 1-5VBB = 5 V

Lab. # 41 UJT and PUT Circuits

IE(mA)VEB1(V )

3 2 1 0.54

f =

Procedures 1-6 and 1-7VBB = 10 V IE(mA)

VEB1(V)3 2 1 0.54

Procedures 1-8 and 1-9VBB = 15 V IE(mA)

VEB1(V)3 2 1 0.54

Procedures 1-11 to 1-13VBB(V)Vp(V )

10 155

Procedure 2-3

Record Sheet 1 Date

0195429885_197-202_ch41.qxd 2/13/08 5:26 PM Page 201

202

Record Sheet L41-2

Procedure 3-3

Lab. # 41Record Sheet 2

0195429885_197-202_ch41.qxd 2/13/08 5:26 PM Page 202

LABORATORYINVESTIGATION 42Photoconductive Cell, LED, and Solar Cell

IntroductionA photoconductive cell is connected to an ohmmeter and covered so that its dark resistancecan be measured. The cell is illuminated, and the resistance is monitored as the light level isvaried. In this way the illumination characteristic of the photo-conductive cell is investigated.A circuit in which the light level on a photoconductive cell controls the current in a lightemitting diode (LED) is constructed and tested with various illumination intensities. A solarcell is illuminated, and its output voltage is measured at various load currents. The processis repeated to produce the solar cell characteristics for two levels of illumination.

Equipment2 power supplies(0 to 12 V), (0 to 6 V)DC voltmeter(0 to 10 V)0.25 W resistors(2 10 k), 270 Decade resistance box or potentiometer1 MPhotoconductive celle.g., CL5M2Low-current solar cell6.3 V lamp and lamp holder60 W, 115 V lamp and lamp holderLight emitting diodee.g., 4300F115 V, 60 Hz variable-voltage transformer (variac)115 V, 60 Hz 1:1 Isolating transformerCircuit board

Procedure 1 Photoconductive Cell Characteristic1-1 Connect an ohmmeter to measure the resistance of a photoconductive cell, as illus-

trated in Fig. 42-1.1-2 Switch the room lights off and cover the photocell. Measure the dark resistance of the

photocell, and note the resistance value on the laboratory record sheet.

203

0195429885_203-207_ch42.qxd 2/13/08 5:27 PM Page 203

1-3 Connect a 6.3 V lamp to a power supply, switch on, and adjust the applied voltageto 6 V.

1-4 Place the lamp as close as possible to the photoconductive cell. Record the resistance(RC) of the illuminated photoconductive cell with 6 V applied to the lamp.

1-5 Adjust the lamp voltage (VL) in turn to each of the levels listed on the record sheetand note the photoconductive cell resistance at each voltage.

Procedure 2 LED Current Control by Photoconductive Cell2-1 Construct the photoconductive cell-LED circuit shown in Fig. 42-2.2-2 Switch VCC on and adjust it to 12 V.2-3 Switch the room lights off and cover the photoconductive cell. 2-4 Monitor the transistor emitter voltage (VE) and observe the level (brightness) of the

light produced by the LED. Measure the LED forward voltage drop (VF).2-5 Calculate the LED forward current from the measured emitter voltage (IF VE/R3).

Record IF and note the LED brightness as maximum.2-6 Connect the 6.3 V lamp to the power supply once again (as in Fig. 40-1b) and

switch on.

204

Figure 42-1 Investigation of photoconductive cell characteristics.

(a) Circuit diagram

6.3 Vlamp Ohmmeter

(b) Connection arrangement

6.3 Vlamp

Photo-conductive

cell

A COM

V

Ohmmeter

Power supply (VS)

0195429885_203-207_ch42.qxd 2/13/08 5:27 PM Page 204

205

Figure 42-2 Photoconductive cell control of LED current.

(a) Circuit

VCC12 V

2N3904

R110 k

R3270

R210 k

Q2

Q1

D1


A COM

V

V

Voltmeter (VE)

Circuit board

Power supply

Photo-conductive

cell

Q1

CBE

R3R2

R1D1

Q2

2-7 Place the lamp as close as possible to the photoconductive cell and determine theLED current level with 6 V applied to the lamp. Observe the LED light level. RecordIF and your impression of the relative brightness of the LED.

2-8 Adjust the lamp voltage (VL) in turn to each of the levels listed on the recordsheet. Determine the LED current level at each lamp voltage and observe the LEDbrightness.

Procedure 3 Solar Cell3-1 Construct the solar cell and lamp circuits illustrated in Fig. 42-3.3-2 Adjust R1 to 1 M, switch the lamp on, adjust it to normal brightness, and bring it

close to the solar cell.3-3 Switch the room lights off; then record the solar cell output voltage (VC ).3-4 Adjust R1 to give convenient voltages for VC, (0.5 V, 0.4, V, etc.,) to the lowest possible

output voltage. Record VC and R1 at each step and calculate the IC levels.3-5 Adjust the ac supply to reduce the lamp to approximately half its normal brightness

and return R1 to 1 M.3-6 Repeat Procedure 3-4 to obtain the corresponding VC and IC levels for the solar cell

with reduced illumination.

0195429885_203-207_ch42.qxd 2/13/08 5:27 PM Page 205

206

Figure 42-3 Investigation of solar cell characteristics.

(a) Circuit

R1115 V60 Hz


Variac

115 V,60 Wlamp

DecadeboxV


A COM

V

V

Voltmeter (VC)

Solarcell

Isolating transformerVariac

115 V,60 Wlamp

R1

Analysis1 From the results of Procedure 1, plot an approximation of the photo-conductive

cell illumination characteristics. Compare the dark resistance of the cell to the resis-tance with maximum illumination.

2 Comment on the LED forward current levels determined in Procedure 2 at maxi-mum brightness and at minimum brightness.

3 Using the VE measurements made in Procedure 2, calculate the photo-conductivecell resistance at each illumination level.

4 Plot the solar cell characteristics for two levels of illumination from the data obtainedin Procedure 3.

0195429885_203-207_ch42.qxd 2/13/08 5:27 PM Page 206

207

Record Sheet L42-1

Record Sheet

Procedure 1-2 Dark resistance =

DateLab. # 42 Photoconductive Cell, LED, and Solar Cell

Procedure 1-5VL(V) 6 5 4 3RC()

R1()


Procedure 3-4

VL(V)VE(V)

IF(mA)

6 5 4 3 2 1

VFVE IF LED brightnessmaximum

LED brightness

Lamp at maximum brightness


VC(V)

IC(mA)

R1()

Procedure 3-6Lamp at half maximum brightnessVC(V)

IC(mA)

0195429885_203-207_ch42.qxd 2/13/08 5:27 PM Page 207

LABORATORYINVESTIGATION 43Optocouplers

IntroductionThe IC/VCE characteristics of the output stage of an optocoupler are investigated forseveral levels of input current. This is done by the use of ammeters and voltmeters. Anoptocoupler with an external bias circuit for the output stage is investigated for responseto a square wave input.

Equipment2 power supplies(0 to 12 V), (0 to 30 V)DC voltmeter(0 to 30 V)Two dc ammeters(0 to 50 mA)OscilloscopeSquare wave generator;5 V, (100 Hz to 10 kHz)Optocouplere.g., 4N250.25 W resistors200 , 1 k, 4.7 k, (2 6.8 k), 12 kCircuit board

Procedure 1 Optocoupler Characteristic1-1 Construct the optocoupler circuit with an ammeter and a voltmeter to measure IC

and VCE of the output stage, as illustrated in Fig. 43-1.1-2 Set V1 and VCC to zero and switch on.1-3 Adjust V1 to produce I1 10 mA; then adjust VCC to increase VCE from zero to 20 V in

convenient steps as listed on the laboratory record sheet. Record the correspondinglevels of IC and VCE at each step.

1-4 Repeat Procedure 1-3, using I1 levels of 6 mA and 3 mA.

208

0195429885_208-212_ch43.qxd 2/14/08 9:56 AM Page 208

209

Procedure 2 Optocoupler Switching and Frequency Response 2-1 Construct the optocoupler circuit shown in Fig. 43-2 together with the square wave

generator and oscilloscope connections.2-2 Switch on VCC and adjust it to 30 V.2-3 Adjust the square wave generator for a 10 V p-to-p, 200 Hz signal.2-4 Monitor the optocoupler input and output waveforms, and sketch the waveforms

on the laboratory record sheet.2-5 Adjust the signal frequency as necessary to investigate the switching times. Measure

the delay time (td), rise time (tr), and fall time (tf). Record the measured quantities onthe laboratory, record sheet.

2-6 Increase the signal frequency to investigate the optocoupler frequency response.Record the maximum frequency that gives a reasonably undistorted output.

Figure 43-1 Investigation of optocoupler characteristics.

(a) Circuit diagram

220

4N25

Optocoupler

6

5

4

1

2

3

R21 k VCC

VCE

V1

I1IC

R1A

A

V

A COM

A

V

Ammeter (IC)

A COM

A

V

Ammeter (I1)

A COM

V

V

Voltmeter (VCE)

Power supply (VCC)

Power supply (V1)

R1 R2


1

2

3

6

5

4

0195429885_208-212_ch43.qxd 2/14/08 9:56 AM Page 209

210

Figure 43-2 Investigation of optocoupler frequency response.

(a) Circuit diagram

220

4N25

Optocoupler

6

5

4

1

2

3

R26.8 k

R54.7 k

R412 k

R36.8 k

VCC

R1

C1100F

Power supply

R1

C1

R2R4

R3R5


1

2

3

6

5

4

Tooscilloscope

Tooscilloscope

Square wave generator

Analysis1 Construct the optocoupler output characteristics from the results of Procedure 1.

Discuss the output characteristics.2 Discuss the waveform shapes and switching times obtained from the tests in

Procedure 2.

0195429885_208-212_ch43.qxd 2/14/08 9:56 AM Page 210

Record Sheet L43-1

Record Sheet


Procedure 2-4

Procedure 2-5

Procedure 2-6

DateLab. # 43 Optocouplers

(I1 = 10 mA) VCE(V)IC (mA)

1 2 3 4 5 10 20

(I1 = 6 mA) VCE (V)IC (mA)

1 2 3 4 5 10 20

(I1 = 3 mA)

td =

tr =

tf =

VCE (V)

Vi

Vo

IC (mA)1 2 3 4 5 10 20

211

0195429885_208-212_ch43.qxd 2/14/08 9:56 AM Page 211

212

0195429885_208-212_ch43.qxd 2/14/08 9:56 AM Page 212

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EDC Bell Lab Manual Part III