e3165 Unit 1 Construction of Logic Gates

8/8/2019 e3165 Unit 1 Construction of Logic Gates

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1.0 INTRODUCTION

Characteristics of the active electronic components

that determine the internal construction andoperation of electronic circuitry of a logic gate.

Y = 0

+5V

A = 1

10k;

1k;

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1.1 ypes of logic gates

NOT

AND

OR

XOR

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1.1 ypes of logic gates (cont.)

NAND

NOR

XOR

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1.2 iode as a voltage controlled switch

p-n j ncti ncomponent

Two t pematerial: p-t pe & n-t pe

Operation: forwar biased & reverse biased

Knee voltage: 0.7V (Si) n 0.3V (Ge)

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1.2 iode as a voltagecontrolled switch

(cont.)

Operation

0V knee voltage

y Small currents flow

Beyond knee voltage

Negative voltage

y

Leakagecurrent Morenegative voltage

y Zener voltage

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1.2 iode as a voltage controlled switch (cont.)

Forward biased vs. reverse biased

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Diodeworks as a logicON/OFF switch

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Voltage rangeof logic level for TTLdigital I

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Simple 2-input ORgate

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1.3 ransistor as a voltage controlled switch

p-n junctioncomponent

Two type: PNP & NPN

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1.3 ransistor as a voltage controlled switch (cont.) B-E junction

as switch

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1.3 ransistor as a voltage controlled switch (cont.) Not gate

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1.4 iode controls switching speed Speed limitationwhen switchingdiodefromON toOFF

and vice versa

Minority-carrier density

Reverse biased (OFF) Forward biased (ON)14


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1.5 Switching time Riseandfall time

Time takenfor a signal togofromLOW to HIGH and vice versa.

TrandTf

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1.5 Switching time (cont.) Storage time

(a) ircuit

(b) Input waveform

(c) Diodecurrent(d) Diode voltage

(e) Minoritycarrier

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(c)

(d)

(e)


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1.5 Switching time (cont.) Propagationdelay (cont.)

Two types:

y TPLH - delay timefrom

logic 0 to logic 1.y TPHL - delay timefrom

logic 1 to logic 0.

y Measuredat 0% on rising

andfallingedges of

the input andoutput.

y Total propagationdelay?

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1.6 L family TTL Series:

74 Series First lineof standardTTL I s

74L Series low-power version

74H Series - high-speed version 74S Series SchottkyTTL, reduce storage timedelay

74LS Series Low-Power SchottkyTTL

74AS Series Advanced SchottkyTTL

74ALS Series AdvancedLow-Power SchottkyTTL

74F Series Fast TTL

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1.6 L family (cont.) TTLNAND GateOperation

SchottkyTTL 74S

Low-Power SchottkyTTL

Advanced SchottkyTTL,

74AS Series (AS-TTL)

urrent-Sourcingand

urrent-SinkingAction

Totem PoleTTL

Tristate (Three-state) TTL

TUGASAN 1 :

PETA MINDA.

TARIKH AKHIR

HANTAR :

12 FEB 2010

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NO

PLAGIARSM!!!


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1.7 M S family CMOS INVERTER GATE

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1.7 M S family CMOS NAND GATE

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1.7 M S family CMOS TRANSMISSION GATE

Pass signal in bothdirection.

Useful for digital andanalogapplication.

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1.8 omparison of M S and L

L M S

NoiseMargin 0.4V (standard) 1. V (30% of VDD)

Typically 4 %Power

dissipation

mW nW

Propagation

delay

TPLH is 11ns 22ns

TPHL is 7ns 1 ns

30 - 50ns

Fan-in Depends onnumber ofunit loads it canhandle.

Usually 3.

Depends onnumber ofunit loads it canhandle

Fan-out Typically 10 Typically50

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1.9 Interfacing L and M S I s Connecting theoutput(s) ofonecircuit of system to the

input(s) ofanother circuit that has different electrical

characteristics.

Why? Utilize strongpoints ofdifferent logicfamilies.

Ex: 74AS used inparts needfor highest frequency

741 used in slower parts

NMOS for LSI parts of the system.

Two things toconsider:

Voltage

Current

Where? devicedata sheets

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1.9 Interfacing L and M S I s (cont.) CMOS drivingTTL

Input current for CMOS are

lowcompared tooutput

current TTL noprob. Input voltagefor CMOS are

higher thanoutput voltage

TTL pull-up resistor.

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e3165 Unit 1 Construction of Logic Gates