do an hoan chinh.docx

7/28/2019 do an hoan chinh.docx

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MC LC

LI MU---------------------------------------------------------------------------------------- 3

LI CM N---------------------------------------------------------------------------------------- 4

PHN 1. VI IU KHIN AVR ----------------------------------------------------------------- 7I. GII THIU AVR MCU ATMEL ----------------------------------------------------------- 7

1. Gii thiu: ------------------------------------------------------------------------------------- 7

2. u th ca MCU AVR ---------------------------------------------------------------------- 7

3. Mt s dng AVR ph bin ---------------------------------------------------------------- 8

II. ATMEGA16KIN TRC TNG QUAN ---------------------------------------------- 8

1. u im: -------------------------------------------------------------------------------------- 82. Cu trc Atmega16 -------------------------------------------------------------------------- 9

3. Cc khi chnh: ----------------------------------------------------------------------------- 11

4. B nh- Memory: ------------------------------------------------------------------------- 14

5. Qu trnh thc thi lnh: -------------------------------------------------------------------- 16

III. CC MODULE IU KHIN TRONG ATMEGA 16 ------------------------------- 17

1. Input & Output ----------------------------------------------------------------------------- 17

2. Cu to chn -------------------------------------------------------------------------------- 18

3. Thit lp truy xut I/O: -------------------------------------------------------------------- 18

4. INTERRUPTNgt ---------------------------------------------------------------------- 19

5. TIMERCOUNTER --------------------------------------------------------------------- 21

IV. NG C DC SERVO ------------------------------------------------------------------- 33

1. Khi qut vng c DC servo ---------------------------------------------------------- 33

2. Encoder -------------------------------------------------------------------------------------- 343. Mch cu H --------------------------------------------------------------------------------- 36

4. Chip driver LMD18200 ------------------------------------------------------------------- 38

PHN 2: THI CNG PHN CNG ----------------------------------------------------------- 41

I. KHI VI IU KHIN --------------------------------------------------------------------- 41

II. KHI NT NHNBUTTON ----------------------------------------------------------- 41

III. KHI ENCODER -------------------------------------------------------------------------- 42


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IV. KHI CNG SUT ----------------------------------------------------------------------- 43

PHN 3 - TNG KT ---------------------------------------------------------------------------- 44

I. KT QUT C --------------------------------------------------------------------- 44

II. HN CH ------------------------------------------------------------------------------------ 44III. HNG PHT TRIN TI --------------------------------------------------------- 44

IV. KT LUN --------------------------------------------------------------------------------- 44

TI LIU THAM KHO ------------------------------------------------------------------------ 45


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LI MUT khi cng ngh ch to loi vi mch lp trnh ra i em n cc k thut iu

khin hin i c nhiu u im hn so vi vic s dng cc mch iu khin lp rp

bng cc linh kin ri nh kch thc nh, gi thnh r, khnng lm vic tin cy, cngsut tiu th nh. Hng lot nh sn xut MCU ra i nh Atmel, Philip, Motorola vi

hng lot chip vi nhiu tnh nng v cng phong ph v a dng. Ngy nay, lnh vc

iu khin c ng dng rng ri trong cc thit b, sn phm phc v cho nhu cu

sinh hot hng ngy ca con ngi nh my git, ng h bo gi.. gip cho i

sng ca chng ta ngy cng hin i v tin nghi hn. Bn cnh , ng c servo vi

nhiu kiu dng v kch thc cng ngy cng c ng dng trong nhng thit b yucu c chnh xc cao v tc v s vng quay, hot ng linh hot vi nhiu chc

nng khc nhau nh trong nhng cnh tay rbt trong cng nghip, rbt d ph bom

mn trong qun i, cc ng c trong m hnh xe hi, my bay, my CNC

Trong s nhng nh sn xut MCU 8 bit th Atmel trnn qu quen thuc vi

gii sinh vin, k thut Vit Nam. Nhm chng em tm hiu ti v MCU AVRmt

trong nhng MCU c s dng rt rng ri trong k thut iu khin v vy nhm emxin chn ti: IU KHIN TC NG C DC S DNG VI IU

KHIN AVR. V thi gian v kin thc c hn nn trong ni dung ti chng em ch

dng li n vic iu khin tc ng c ch khng ti bng cch tng gim thi

gian TON ca xung PWM, o chiu quay, hm ng c v hin th cc thng sny trn

LCD


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LI CM N

Trong qu trnh thc hin n chng em nhn c shng dn v gip

tn tnh ca thy HONG NH KHI. Chng em xin chn thnh cm n thy cng

ton th thy c trong Khoa in.

ng thi ti cng xin chn thnh cm n cc bn trong lp HI5B ng gp

kin v cung cp mt s ti liu gip chng em.

D c gng rt nhiu, nhng do y l ln u tin lm n v vy trong qu

trnh lm cn c nhng thiu st. Nn nhm chng em rt mong nhn c s gp ca

qu thy c v ton th cc bn.


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Nhn xt

(Ca gio vin hng dn)

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TPHCM, ngy thng nm 2012

Gio vin hng dn


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Nhn xt

(Ca gio vin phn bin)

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TPHCM, ngy thng nm 2012

Gio vin phn bin


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PHN 1. VI IU KHIN AVR

I. GII THIU AVR MCU ATMEL

1. Gii thiu:

AVR l mt hvi iu khin do hng Atmel sn xut. Atmel cung cp cc vi iu

khin ph bin nh 8051, AT91, ARM7, Atmel AVR 8-bit RISC, v mi y l DSP

dual-CPU AT57. Atmel AVR32 l mt vi iu khin lai DSP vi 7 tng pipeline v kh

nng thc thi song song. AVR l chip vi iu khin 8 bits vi cu trc tp lnh n gin

haRISC (Reduced Instruction Set Computer), mt kiu cu trc ang th hin u th

trong cc b x l.

Atmel ATMEGA162. u th ca MCU AVR

Kt ni phn cng cho AVR n gin vi nhng linh kin thng dngnh in

tr, tin, thch anh. Dng ra iu khin Port ln v khng cn dng in trko.

Thit k mch np cho AVR kh n gin giao tip qua cng LPT, COM, USB.

H trISP lp trnh trc tip trn mch. H trlp trnh trn nn ngn ng ASM, C vi

nhiu cng c h trnh CodeVision, AVR Studio.

Hu ht cc chip AVR c nhng tnh nng sau:

- Xung External OSC ln n 16Mhz v Internal OSC 8Mhz.

- B nhchng trnh Flash c th lp trnh li rt nhiu ln v dung lng ln c

th ghi v xa trn 1000 ln. Bn cnh b nhEEPROM c th lp trnh c.

- 32 Port xut nhp.

- 8 bits, 16 bits timer/counter tch hp PWM.

- Cc b chuyn i AnalogDigital phn gii 10 bits


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- Analog comparator.

- Giao din ni tip USART (tng thch chun ni tip RS-232).

- Giao din ni tip Two -Wire -Serial (tng thch chun I2C) Master v Slaver.

- Giao din ni tip Serial Peripheral Interface (SPI).

3. Mt s dng AVR ph bin

- AT90S1200; AT90S2313

- AT90S2323; AT90S2343; AT90S2333; AT90S4433

- AT90S4414; AT90S8515; AT90S4434; AT90S8535

- ATtiny10; ATtiny11; ATtiny12; ATtiny15; ATtiny22; ATtiny26

- ATmega8/8515/8535; ATmega16; ATmega161; ATmega162; ATmega163;ATmega169; ATmega32; ATmega323; ATmega103; ATmega64/128/2560/2561

II. ATMEGA16KIN TRC TNG QUAN

1. u im:

- Tc x l cao, tiu thin nng thp

- Kin trc 131 tp lnh thc thi hu ht trong mi chu k xung clock

- 32x8 thanh ghi a dng- t tc ti a 16MIPS 16Mhz xung clock

- Dung lng b nh: 16Kb Flash, 512 EEPROM, 1kb Internal SRAm

- Khnng ghi v xa c tht n 10000 ln, lu tr trong thi gian di trn 20

nm/85oC-100 nm 25oC.

- Giao tip chun JTAG h trdebug, Lock, Fuse bit

-

2 b Timer 16 bit, 1 b timer 16 bit, 4 knh PWM- 8 knh ADC 10 bit, 32 port xut nhp

- H trgioa tip I2C, USART, SPI

- Hot ng tt hiu in th 4.5V - 5.5 V


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2. Cu trc Atmega16

2.1 S chn


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2.3 Cc PORT xut nhp:

PORT A: L PORT xut nhp thng thng 8 bit cn c thit k cho b ADC

chuyn i tng t s. PORT A thit k vi in trni treo ln mc cao.

PORT B: L PORT xut nhp thng thng 8 bit.

PORT C: L PORT xut nhp thng thng 8 bit. Bn cnh PORT C cn c

mt s chn giao tip JTAG PC5-TDI, PC3-TMS, PC2TCK.

PORT D: L PORT xut nhp thng thng 8 bit.

Cc chn khc: VCC, AVCC, AREF, XTAL1, XTAL2, RESET

3. Cc khi chnh:

3.1 CPU:


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AVR c cu trc Harvard, trong ng truyn cho b nhd liu (data memory

bus) v ng truyn cho b nhchng trnh (program memory bus) c tch ring.

Data memory bus ch c 8 bit v c kt ni vi hu ht cc thit b ngoi vi, vi

register file. Trong khi program memory bus c rng 16 bits v ch phc v cho

instruction registers.

3.2 ALU

ALU lm vic trc tip vi cc thanh ghi chc nng chung. Cc php ton c

thc hin trong mt chu k xung clock. Hot ng ca ALU c chia lm 3 loi: i s,

logic v theo bit.

3.3 Thanh ghi trng thi SREGy l thanh ghi 8 bit lu tr trng thi ca ALU sau cc php tnh s hc v logic.

- C: Carry Flag cnh.

- Z: Zero Flag Czero.

- N: Negative Flag kt qu php ton m.

- V: Twos complement overflow cb 2.

- S: Sign bit (S=N XOR V) kim tra 2 cN v V.

- H: Half Carry Flag c s dng trong BCD cho mt s ton hng.

- T: Transfer bit used by BLD and BST instructions c s dng lm ni trung

gian trong cc lnh BLD, BST.

- I: Global Interrupt Enable/Disable Flag y l bit cho php ton cc ngt. Nu

bit ny trng thi logic 0 th khng c mt ngt no c phc v.


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3.4 Thanh ghi chc nng chung

- Lin quan trc tip n hot ng thc hin lnh ca CPU

- c t 32 vtr u tin trong b nhd liu ta ch00H n 31H v khng

nm trong vng a ch dnh cho b nhSRAM.

- Cc thanh ghi R26 n R31 ngoi chc nng thng thng cn c thm chc nng

dng lm con tr 16 bt trong ch truy cp a ch gin tip vo b nhd liu.

3.5 Con trngn xp Stack Pointer:


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L mt thanh ghi 16 bit nhng cng c thc xem nh hai thanh ghi chc nng

c bit 8 bit dng lu tr bin trong qu trnh tnh ton. Stack c hiu nh l 1

thp d liu, d liu c cha vo stacknh thp v d liu cng c ly ra t

nh. Kiu truy cp d liu ca stack gi l LIFO.

Khai bo SP ti mt vng nhtrong SRAM vi a ch ca SP thit lp >$60. Con

tr gim a ch xung 1 khi d liu c a vo Stack vi lnh PUSH v hai khi c

Subroutine hoc Interrupt c gi. Con trtng a ch ln 1 khi c lnh POP d liu

thc hin v ln hai khi tr d liu vcho chng trnh con.

4. B nh- Memory:

4.1 B nhchng trnh Flash

B nhFlash 16KB ca ATmega16 dng lu trchng trnh vi rng 16 bit.

Do cc lnh ca AVR c di 16 hoc 32 bit nn b nhFlash c sp xp theo kiu

8K x 16.


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B nhchng trnh ch gm 1 phn l Application Flash Section nhng trong cc

chip AVR mi chng ta c thm phn Boot Flash section. Thc cht, application section

bao gm 2 phn: phn cha cc instruction v phn cha interrupt vectors. Cc vector

ngt nm phn u ca application section ta ch 0x0000 v di n bao nhiu ty

thuc vo loi chip v phn cha instruction nm lin sau . Cc chng trnh c vit

sau a ch.

4.2 B nhdliu SRAM:

y l phn cha cc thanh ghi quan trng nht ca chip, vic lp trnh cho chip

phn ln l truy cp b nhny v b nhny gm cc phn sau:

Phn 1: l phn u tin trong b nhd liu bao gm 32 thanh General Purpose

RgegisterGPR. Tt ccc thanh ghi ny u l cc thanh ghi 8 bits. Tt c cc chip

trong hAVR u bao gm 32 thanh ghi Register File c a ch tuyt i t0x0000 n

0x001F. Mi thanh ghi c th cha gi trdng t0 n 255 hoc cc gi tr c du t -128 n 127 hoc m ASCII ca mt k tno Cc thanh ghiny c t tn theo


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th tl R0 n R31. Chng c chia thnh 2 phn, phn 1 bao gm cc thanh ghi t

R0 n R15 v phn 2 l cc thanh ghi R16 n R31.

Phn 2: l phn nm ngay sau SFR bao gm 64 thanh ghi I/O hay cn gi l vng

nhI/O. Vng nhI/O l ca ng giao tip gia CPU v thit b ngoi vi. Vng nhI/O

c thc truy cp nh SRAM hay nh cc thanh ghi I/O. Nu s dng instruction truy

xut SRAM truy xut vng nhny th a ch ca chng c tnh t0x0020 n

0x005F. Nhng nu truy xut nh cc thanh ghi I/O tha ch ca chng c tnh t

0x0000 n 0x003F.

Phn 3: Internal SRAM l vng khng gian cho cha cc bin trong lc thc thi

chng trnh.4.3 B nhdliu EEPROM

ATmega16 cha b nhd liu EEPROM dung lng 512 byte, v c sp xp

theo tng byte, cho php cc thao tc c/ghi tng byte mt. EEPROM c tch ring

v c a ch tnh t 0x0000H.

5. Qu trnh thc thi lnh:

Gin xung:

Cc instruction c cha trong b nhchng trnh Flash memorydi dng cc

thanh ghi 16 bit. B nhchng trnh c truy cp trong mi chu k xung clock v 1

instruction cha trong program memory s c load vo trong instruction register,

instruction registertc ng v la chn register file cng nh RAM cho ALU thc thi.

Trong lc thc thi chng trnh, a ch ca dng lnh ang thc thi c quyt nh bi


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mt bm chng trnh PC (Program counter). Hu ht cc instruction u c thc

thi trong 1 chu k xung clock.

III. CC MODULE IU KHIN TRONG ATMEGA 16

1. Input & Output

1.1 Gii thiu

Vi iu khin ATmega16 c 32 ng vo ra chia lm bn PORT: PORTA

PORTBPORTCPORTD mi PORT 8bit c thtng tc iu khin tng bit mt.

Cc cng ra c in trni ko ln nn khi dng chc nng Input ta khng cn dng in

trko ln bn ngoi. Cc PORT c iu khin bi cc b thanh ghi sau: thanh ghi

d liu cng PORT, thanh ghi d liu iu khin cng DDR v cui cng l a ch chnvo ca cng PIN.

1.2 Thanh ghi DDR

y l thanh ghi 8 bit (ta c thc v ghi cc bit thanh ghi ny) v c tc dng

iu khin hng cng PORT (tc l cng ra hay cng vo). Nu nh mt bit trong thanh

ghi ny c set th bit tng ng trn PORT c nh ngha nh mt cng ra.

Ngc li nu nh bit khng c set th bit tng ng trn PORT c nh ngha lcng vo.

1.3 Thanh ghi PORT

y cng l thanh ghi 8 bit (cc bit c thc v ghi c) n l thanh ghi d liu

ca cng PORT v trong trng hp nu cng c nh ngha l cng ra th khi ta ghi

mt bit ln thanh ghi ny th chn tng ng trn PORT cng c cng mc logic.

Trong trng hp m cng c nh ngha l cng vo th thanh ghi ny li mang dliu iu khin cng. C th nu bit no ca thanh ghi ny c set (a ln mc 1)

th in trko ln (pull-up) ca chn tng ng ca port sc kch hot. Ngc

li n strng thi hi-Z. Thanh ghi ny sau khi khi ng Vi iu khin s c gi tr l

000.

1.4 Thanh ghi PIN

y l thanh ghi 8 bit cha d liu vo ca PORT (trong trng hp PORT c

thit lp l cng vo) v n ch c thc m khng thghi vo c.


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2. Cu to chnCu trc chn ca AVR c th phn bit r chc nng (vo ra) trng thi (0 1) t

ta c 4 kiu vo ra cho mt chn ca AVR. Khc vi 89 l ch c 2 trng thi duy nht

(0 1) . c bit ngun t chn ca AVR khoiu khin Led trc tip (mA) cn 89

chl vi A .

Bng trng thi truy xut I/O:

3. Thit lp truy xut I/O:

3.1 Read

- a d liu ra thanh ghi iu khin DDRxn t cho PORTx (hoc bit n trong

port) l u vo (xa thanh ghi DDRx hoc bit).

- Kch hot in trpull-up bng cch set thanh ghi PORTx (bit).

- Cui cng c d liu ta chPINxn (trong x: l cng v n l bit).

3.2 Write


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- a d liu ra thanh ghi iu khin DDRxn t cho PORTx (hoc bit n trong

port) l u ra (xa thanh ghi DDRx hoc bit).

- Xut gi tr ra Port.

4. INTERRUPTNgt

4.1 Gii thiu

Ngt l mt c ch cho php thit b ngoi vi bo cho CPU bit v tnh trng sn

sng cho i d liu ca mnh.V d: Khi b truyn nhn UART nhn c mt byte n

s bo cho CPU bit thng qua cRXC, hoc khi n truyn c mt byte th cTX

c thit lp

Khi c tn hiu bo ngt CPU s tm dng cng vic ng thc hin li v lu vtr ang thc hin chng trnh (con trPC) vo ngn xp sau tr ti vector phuc v

ngt v thc hin chng trnh phc v ngt cho ti khi gp lnh RETI (Return from

Interrupt) th CPU li ly PC tngn xp ra v tip tc thc hin chng trnh m trc

khi c ngt n ang thc hin. Trong trng hp m c nhiu ngt yu cu cng mt lc

th CPU slu cc cbo ngt li v thc hin ln lt cc ngt theo mc u tin.

Atmega 16 c cc ngt sau:


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4.2 Ngt ngoiExternal Interrupts

Atmega16 c 3 ngt ngoi INT0 (PORTD.2), INT1 (PORTD.3) v INT2 (PORTB.2).

Khi xy ra mt trong cc s kin i vi cc chn ny:

- Low level - in p chn ngt xung mc logic 0 V

- Any change - Bt k sthay i in p t chn ngt

- Falling Edge - Khi c 1 sn in p xung (5V 0V)

- Rising Edge - Khi c 1 sn in p ln (0V 5V)

Sau 1 cngt sc a ln 1 v bo cho bit c ngt, nhy n chng trnh

con thc hin ngt.

4.3 Cc thanh ghi phc v ngt4.3.1 MCUCRMCU Control Register.

Thanh ghi MCUCR cha cc bit cho php chng ta chn 1 trong 4 MODE trn cho

cc ngt ngoi. MCUCR l mt thanh ghi 8 bit nhng i vi hot ng ngt ngoi,

chng ta chquan tm n 4 bit thp ca n (4 bit cao dng cho Power manager v Sleep

Mode). Bn bit thp l cc bit Interrupt Sense Control (ISC) trong 2 bit ISC11: ISC10

dng cho INT1 v 2 bit ISC01: ISC00 dng cho INT0. Bng chn tr cho cc bit ISC01,

ISC00 hon ton tng t.


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4.3.2 MCUCSRMCU Control and Status Register

Bit 6ISC2: Interrupt Sense Control 2: l bit quan trng nht trong thanh ghi ny

dng ghi v xa cngt INT2.

4.3.3 GICRGeneral Interrup Control Register

GICR cng l 1 thanh ghi 8 bit nhng ch c 3 bit cao (bit 5, 6 v bit 7) l c s

dng cho iu khin ngt. Bit 7INT1 gi l bit cho php ngt (Interrupt Enable), set

bit ny bng 1 ngha bn cho php ngt INT1 hot ng, tng t, bit INT0 v INT2 iu

khin ngt INT0 v INT2.

4.3.4 GIFRGeneral Interrupt Flag Register

Thanh ghi cngt chungGIFR (General Interrupt Flag Register) c 2 bit INTF1

v INTF0 l cc bit trng thi (hay bit c- Flag) ca 2 ngt INT v INT0. Nu c 1 s

kin ngt ph hp xy ra trn chn INT1, bit INTF1 c tng set bng 1 (tng t

cho trng hp ca INTF0), chng ta c th s dng cc bit ny nhn ra cc ngt, tuy

nhin iu ny l khng cn thit nu chng ta cho php ngt tng, v vy thanh ghi

ny thng khng c quan tm khi lp trnh ngt ngoi.

5. TIMERCOUNTER

TimerCounter (T/C) l cc module c lp vi CPU. Chc nng chnh ca cc

b T/C, nh tn gi ca chng, l nh th (to ra mt khong thi gian, m thi gian)

v m s kin. Trn cc chip AVR, cc b T/C cn c thm chc nng to ra cc xung


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iu rng PWM (Pulse Width Modulation), mt s dng AVR, mt s T/C cn c

dng nh cc b canh chnh thi gian (calibration) trong cc ng dng thi gian thc.

C th trn chip Atmega16 c 2 b Timer 8 bit (T/C0 v T/C2) v 1 b 16 bit

(T/C1) c cc chc nng sau:- Bm mt knh

- Xa bnh thi khi trong mode so snh (tng np)

- PWM

- To tn s

- Bm s kin ngoi

- B chia tn 10 bit- Ngun ngt trn bm v so snh

Trc khi s dng cc b T/C ca AVR, c mt snh ngha quan trng cn

c cp n:

- BOTTOM: l gi tr thp nht m mt T/C c tht c, gi tr ny lun l 0.

- MAX: l gi tr ln nht m mt T/C c tht c, gi trny c quy nh

bi bi gi tr ln nht m thanh ghi m ca T/C c th cha c. V d vi mt bT/C 8 bit th gi tr MAX lun l 0xFF (255), vi b T/C 16 bit th MAX bng 0xFFFF

(65535). Nh th MAX l gi trkhng i trong mi T/C.

- TOP: l gi trm khi T/C t n n sthay i trng thi, gi tr ny khng

nht thit l s ln nht 8 bit hay 16 bit nh MAX, gi tr ca TOP c ththay i bng

cch iu khin cc bit iu khin tng ng hoc c th nhp tr tip thng qua mt s

thanh ghi.


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5.1 TimerCounter 0

5.1.1 S khi

5.1.2 Cc thanh ghi ca TimerCounter 0

TCNT0 (Timer/Counter Register): L 1 thanh ghi 8 bit cha gi tr vn hnh ca

T/C0. Thanh ghi ny cho php c v ghi gi tr mt cch trc tip.

TCCR0 (Timer/Counter Control Register):L thanh ghi 8 bit iu khin hot

ng ca TimerCounter 0


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- FOC0: Bit ny ch tch cc khi bit WGM00 ch nh ch lm vic

khng c PWM

- WGM00 v WGM01:Cc bit ny cho php la chn 1 trong 4 ch hot

ng ca T/C0 theo bng sau:

- COM01 v COM00: Ch bo hiu so snh ng ra. Cc bit ny iu

khin hot ng ca chn OC0. Nu mt hoc chai bit COM01:0 c t ln 1, ng ra

OC0 s hot ng.

- CS02, CS01 v CS00: Cc bit ny quy nh ngun xung nhp cp cho T/C0

nh bng sau:

OCR0 (Output Compare Register): Thanh ghi d liu so snh cha mt gi tr 8

bt. Gi tr ny sc so snh lin tip vi gi trm trong thanh ghi TCNT0. Mt s

kin so snh c th gy ra mt ngt hoc sinh ra xung u ra OC0


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TIMSK (Timer/Counter Interrupt Mask Register): L thanh ghi mt n cho

ngt ca tt c cc T/C trong Atmega 16, trong ch c bit TOIE0 v OCIE0 trong

thanh ghi ny l lin quan n T/C0

- OCIE0: Cho php ngt bo hiu so snh

- TOIE0: Cho php ngt trn bm

TIFR (Timer/Counter Interrupt Flag Register): L thanh ghi cnhcho tt c

cc b T/C. Trong thanh ghi ny bit TOV0 v OCF0 c lin quan n T/C0

- OCF0: Cso snh ng ra 0

- TOV0: Ctrn bm

5.1.3 Cc ch lm vic ca TimerCounter 0

5.1.3.1 Normal modey l ch hot ng n gin nht ca Timer. Bm s lin tc m tng ln

cho n khi vt qu gi trTOP v sau sc khi ng li ti gi tr BOTTOM.

Trong cc hot ng thng thng th ctrn sc thit lp khi gi trtrong Timer t

gi tr khng v khng bxo i. Tuy nhin nu m ngt trn c chp nhn th cngt

s tng b xo khi ngt c thc hin.

5.1.3.2 Ch so snh (CTC)Trong ch CTC, thanh ghi OCR0 c s dng iu khin (iu khin bng

taydo ngi lp trnh thc hin) phn gii ca bm. Trong ch CTC bm

b xa bng 0 mi khi gi trm trong thanh ghi TCNT0 bng vi gi tr ca thanh ghi

OCR0. OCR0 nh ngha gi tr TOP ca bm cng c ngha l phn gii ca

n. Chny cho php iu khin tt hn tn s ca u ra so snh khp. N cng n

gin ha hot ng m s kin ngoi.


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Ngoi ra, TimerCounter 0 cn c 2 ch hot ng na l Fast PWM v Phase

Correct PWM

5.2 TimerCounter 2:

ATmega 16 cn c b TimerCounter 2 hot ng ging nh b TimerCounter

0. Ngoi ra, T/C2 cn c khnng hot ng khng ng b vi chip thng qua vic

thit lp thanh ghi ASSR (Asynchronous Status Register)

AS2: Khi AS2 = 0, T/C2 c cp xung nhp t ngun xung nhp ca h thng.Khi AS2 = 1, T/C2 c cp xung nhp t bdao ng bn ngoi thng qua chn TOSC1

TCN2UB: Khi T/C2 hot ng chkhng ng b, bt ny s bng 1. Khi

TCNT2 c cp nht t thanh ghi d liu tm thi, bt ny s tng xa bi phn

cng. TCR2UB = 0 ngha l thanh ghi TCNT2 ang sn sng c th cp nht mt gi

tr mi.

OCR2UB: Tng tnh bit TCN2UB nhng i vi OCR2TCR2UB: Khi T/C2 hot ng chkhng ng b, bt ny s bng 1. Khi

TCCR2 c cp nht t thanh ghi d liu tm thi, bt ny s tng xa bi phn

cng. TCR2UB = 0 ngha l thanh ghi TCCR2 ang sn sng c th cp nht mt gi

tr mi.

5.3 TimerCounter 1

TimerCounter 1 l b T/C 16 bit v c 5 ch hot ng. Ngoi cc chc nngnh th thng thng, T/C 1 rt l tng trong vic lp trnh v o lng v c phn

gii cao (16 bit) v cn c khnng to xung PWM dng iu khin ng c


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5.3.1 S khi

5.3.2 Cc thanh ghi ca TimerCounter 1

TCCR1A & TCCR1B (Timer/Counter Control Register): l hai thanh ghi 8 bit

c lp vi nhau dng iu khin hot ng ca T/C1. Cc bit trong 2 thanh ghi ny

gm cc bit chn mode hay dng sng (WGM), cc bit quy nh ng ra (COM), cc bit

chn gi tr chia cho xung nhp (CS),


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TCNT1H & TCNT1L (Timer/Counter 1 High and Low Register): l 2 thanh

ghi 8 bit to thnh thanh ghi 16 bit (TCNT1) cha cc gi tr vn hnh ca T/C1

OCR1AH & OCR1AL (Output Compare Register 1A)

OCR1BH & OCR1BL (Output Compare Register 1B)

OCR1A & OCR1B l 2 thanh ghi 16 bit cha gi tr so snh, gi trny c lin

tip so snh vi gi tr ca thanh ghi TCNT1. Khi gi tr so snh bng nhau, mt ngt

hoc sinh ra xung trn chn OC1x (y l cch to PWM bng T/C1)ICR1H & ICR1L(Input Capture Register 1): L 1 thanh ghi 16 bit cp nht gi

tr ca thanh ghi TCNT1 mi khi c s kin xy ra chn ICP1 ri t gi tr vo

thanh ghi ICR1. Ngoi ra thanh ghi ICR1 cn dng nh ngha gi tr TOP trong mt

s ch hot ng ca T/C1

TIMSK (Timer/Counter Interrupt Mask Register): L thanh ghi dng quy

nh ngt cho cc bT/C trn AVR cng nh quy nh ngt cho T/C1 (y ch quan

tm n cc bit t2 n 5 ca thanh ghi TIMSK)


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- TOIE1: quy nh ngt trn cho T/C 1

- OCIE1A & OCIE1B: bit cho php ngt khi c 1 s kin trong vic so snh

gia thanh ghi TCNT1 vi OCR1A & OCR1B

- TICIE1: bit cho php ngt trong trng hp Input Capture c dng

Cng vi vic set cc bit trn, bit I trong thanh ghi SREG cng phi c set nu

mun s dng ngt

TIFR (Timer/Counter Interrupt Flag Register): L thanh ghi cnhcho tt c

cc T/C trn AVR, cc bit ICF1, OCF1A, OCF1B v TOV1 l cc ctrng thi ca T/C1

5.3.3 Cc ch hot ng ca TimerCounter 1

C 5 ch hot ng chnh trn T/C1 c quy nh bi 4 bit WGM cha trong 2

thanh ghi TCCR1A & TCCR1B. Cc ch ca T/C1 c tm tt trong bng sau:


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5.3.3.1 Normal mode (chthng)

Trong chny, thanh ghi TCNT1 tng t gi trBOTTOM (0x0000) n gi tr

TOP (0xFFFF) v quay v gi tr BOTTOM v cTOV1 sc set.

5.3.3.2 Ch CTC (Clear Timer on Compare Match)

Trong ch CTC (WGM13:0 = 4 hoc 12), thanh ghi OCR1A hoc thanh ghi

ICR1 c s dng nh ngha phn gii ca bm. Trong ch CTC, bm

b xa v 0 khi gi trm bng gi trmt trong hai thanh ghi OCR1A (WGM13:0 =

4) hoc ICR1 (WGM13:0 = 12). Cc thanh ghi OCR1A hoc ICR1 nh ngha gi tr

TOP ca bm ng thi cng l phn gii ca bm. Ch ny cho php

iu khin tt hn tn su ra so snh. N cng n gin ha hot ng m s kinbn ngoi. Gin thi gian ca chny nh sau:

5.3.3.3 Ch Fast PWM

Ch Fast PWM cung cp xung PWM tn s cao qua cc chn OC1A v

OC1B. Trong ch Fast PWM, mt chu k c tnh trong mt ln m t BOTTOM

ln TOP (single-slope). C tt c 5 mode trong ch Fast PWM thng qua vic thit lpcc bit WGM v COM trong 2 thanh ghi TCCR1A & TCCR1B.

Trong ch Fast PWM, bm m tng cho n khi gi trm bng vi mt

trong cc gi tr 0x00FF, 0x01FF, 0x03FF (WGM13:0 = 5,6, hoc 7), hoc gi tr trong

thanh ghi ICR1 (WGM13:0 = 14) hoc gi tr trong thanh ghi OCR1A (WGM13:0 = 15)

(y l cc gi trnhkhng phi gi tr so snh khp). Bm khi b xa cc

chu k clock tip theo. Gin thi gian ca ch Fast PWM nh sau:


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Gin trn minh ha cho ch Fast PWM mode 14 hoc 15. V d trong

mode 14, gi tr TOP (chu k ca xung PWM) c cha trong thanh ghi ICR1, thanh ghi

TCNT1 tng t gi tr 0, lc ny chn OC1A mc H (gi s COM1A1 =1 & COM1A0

= 0); khi TCNT1 tng n gi tr ca thang ghi OCR1A th chn OC1A c xa v mc

L; thanh ghi TCNT1 tip tc tng ti gi tr TOP cha trong thanh ghi ICR1 th TCNT1

reset v 0 v chn OC1A trv mc H. Hot ng Fast PWM ca knh B hon tontng tnh ca knh A

5.3.3.4 Ch Phase Correct PWMCh Phase Correct PWM (WGM13:0 = 1, 2, 3, 10 hoc 11) cung cp khnng

to xung Phase Correct PWM vi phn gii cao. V cch iu khin ca ch

Phase Correct PWM hu nh ging nh chFast PWM. Khc nhau c bn l ch

Phase Correct PWM hot ng dual-slope (2 sn dc). V d trong mode 10 (tng

ng vi mode 14 ca Fast PWM), thanh ghi TCNT1 tng t0 n khi bng vi OCR1A

th chn OC1A xa xung mc L; TCNT1 tip tc tng n khi TCNT1 = TOP th


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TCNT1 bt u gim dn gi tr; khi TCNT1 = OCR1A ln th 2 th chn OC1A c

set ln H, TCNT1 gim n gi tr 0 th hon tt 1 chu k.

5.3.3.5 Phase Correct & Frequency Correct PWM

Trong ch Phase Correct & Frequency Correct PWM bm m tin cho n

khi gi trm bng vi gi tr trong thanh ghi ICR1 (WGM13:0 = 8) hoc bng vi gi

tr trong thanh ghi OCR1A (WGM13:0 = 9). Bm sau st n gi trTOP v i

chiu m. Gi trm TCNT1 s bng TOP trong 1 chu k clock ca timer.

Gin thi gian ca ch Phase Correct & Frequency Correct PWM nh sau:

Ngoi ra, trn AVR cn c mt smodule iu khin khc nh: giao tip UART,

SPI, ADC, I2C, Tuy nhin do gii hn ca ti nn chng em chtm hiu ti phn

ny, cc phn cn li chng em spht trin cc n ktip.


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IV. NG C DC SERVO

1. Khi qut vng c DC servo

ng c servo c nhiu kiu dng v kch thc, c s dng trong nhiu my

khc nhau, t my tin iu khin bng my tnh cho n cc m hnh my bay v xe hi.ng dng mi nht ca ng c servo l trong cc robot, cng loi vi cc ng c dng

trong m hnh my bay v xe hi.

Mt ng c DC servo tiu biu gm c cc thnh phn chnh sau:

- Stator: c gn lin vi vng c

- Rotor: l thnh phn to chuyn ng quay

- Chi than v vnh gp: gip a in vo Rotor

- Encoder:l b m ha vng quay, phn hi xung, n v (xung/vng).

- Phanh in t:gip hm ng c trong trng hp cn thit.

- Tachometer: l thnh phn phn hi tng t, thc cht l mt mypht in nh,

vi in p phn hi c tnh bng (vol/vng quay).


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ng c servo DC da trn nn tng ng c DC, l thit bc iu khin bng

chu trnh kn. T tn hiu hi tip vn tc/v tr, h thng iu khin s siu khin hot

ng ca mt ng c servo. Vi l do nu trn nn sensor o v tr hoc tc l cc b

phn cn thit phi tch hp cho mt ng c servo.ng c Servo l mt ng c inc thit kcho nhng h thng iu khin c hi tip vng kn. Tn hiu ra ca ng

c c ni vi mch iu khin. Khi ng c quay, vn tc v v tr sc hi tip v

mch iu khin. Vic thit lp mt h thng iu khin xc nh nhng g ngn cn

chuyn ng quay ca ng c hoc lm ng c khng quay cng d dng. Nu c bt

k l do no ngn cn chuyn ng quay ca ng c, c cu hi tip s nhn thy tn

hiu ra cha t c v tr mong mun. Mch iu khin tip tc chnh sai lch cho

ng c t c im chnh xc.

2. Encoder

iu khin s vng quay hay vn tc ng c th chng ta nht thit phi c

c gc quay ca motor.

Mt sphng php c thc dng xc nh gc quay ca motor bao gm

tachometer (tht ra tachometer o vn tc quay), dng bin trxoay, hoc dng encoder.


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Trong 2 phng php u tin l phng php analog v dng optiacal encoder

(encoder quang) thuc nhm phng php digital.

H thng optical encoder bao gm mt ngun pht quang (thng l hng ngoi

infrared), mt cm bin quang v mt a c chia rnh. Optical encoder li c chia

thnh 2 loi: encoder tuyt i (absolute optical encoder) v encoder tng i

(incremental optical encoder). y ta dng incremental optical encoder, gi tt l

encoder.

Cu to encoder quang

Encoder thng c 3 knh (3 ng ra) bao gm knh A, knh B v knh I (Index).

Trong hnh 2 bn thy hy ch mt l nh bn pha trong ca a quay v mt cp thu

pht dnh ring cho l nhny. l knh I ca encoder. C mi ln motor quay c

mt vng, l nh xut hin ti v tr ca cp pht - thu, hng ngoi t ngun pht sxuyn qua l nhn cm bin quang, mt tn hiu xut hin trn cm bin. Nh th

knh I xut hin mt xung mi vng quay ca motor. Bn ngoi a quay c chia

thnh cc rnh nh v mt cp thupht khc dnh cho cc rnh ny. y l knh A

ca encoder, hot ng ca knh A cng tng tknh I, im khc nhau l trong 1 vng

quay ca motor, c N xung xut hin trn knh A. N l srnh trn a v c gi l

phn gii (resolution) ca encoder. Mi loi encoder c phn gii khc nhau, c khi

trn mi a ch c vi rnh nhng cng c trng hp n hng nghn rnh c chia.


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iu khin ng c, bn phi bit phn gii ca encoder ang dng. phn gii

nh hng n chnh xc iu khin v cphng php iu khin.

Hot ng ca encoder quang

Khi 2 cm bin knh A v B lch pha nhau. Khi cm bin A bt u b che th cm

bin B hon ton nhn c hng ngoi xuyn qua, v ngc li. Hnh thp l dng xung

ng ra trn 2 knh. Xt trng hp motor quay cng chiu kim ng h, tn hiu i t

tri sang phi. Bn hy quan st lc tn hiu A chuyn t mc cao xung thp (cnh

xung) th knh B ang mc thp. Ngc li, nu ng c quay ngc chiu kim ng

h, tn hiu i t phi qua tri. Lc ny, ti cnh xung ca knh A th knh B ang

mc cao. Nh vy, bng cch phi hp 2 knh A v B chng ta khng nhng xc nh

c gc quay (thng qua s xung) m cn bit c chiu quay ca ng c (thng qua

mc ca knh B cnh xung ca knh A).

3. Mch cu H


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ng c Dc servoc iu khin bi tn hiu tvi iu khin theo nguyn l iu

khin rng xung (Pulse width modulationPWM), s dng mch cu H.

Hy xem 2 u V v GND l 2 u (+) v (-) ca c qui, i tng l ng c DCm chng ta cn iu khin, i tng ny c 2 u A v B, mc chiu khin l

chophp dng in qua i tng theo chiu A n B hoc B n A. Thnh phn chnh

to nn mch cu H ca chng ta chnh l 4 kha L1, L2, R1 v R2 (L: Left, R: Right).

iu kin bnh thng 4 kha ny m, mch cu H khng hot ng. Gi s bng

cch no m 2kha L1 v R2 c ng li (L2 v R1 vn m), c mt dng in

chy tV qua kha L1 n u A v xuyn qua i tng n u B ca n trc khiqua kha R2 v v GND (hnh a).Nh th, vi gi s ny sc dng in chy qua i

tng theo chiu tA n B. By gihy gi skhc i rng R1 v L2 ng trong khi

L1 v R2 m, dng in li xut hinv ln ny n s chy qua i tng theo chiu t B

n A nh trong hnh b (V R1 B A L2 GND). Vy l chng ta c th

dng mch cu H o chiu dng in qua mt i tng (o chiu quay ng c).

Nu ng ng thi 2 kha cng mt bn (L1 v L2 hoc R1 v R2) hoc thm ch


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ng c 4 kha? Hin tng ngn mch (short circuit), V v GND gn nh ni trc tip

vi nhau v hin nhin c qui s b hng hoc nguy him hn l chy n mch xy ra.

Cch ng cc kha nh th ny s lm hng mch cu H. trnh vic ny xy ra,

ngi ta thng dng thm cc mch logic kch cu H. Gi thit cui cng l 2 trng

hp cc kha phn di hoc phn trn cng ng (v dL1 v R1 cng ng, L2 v

R2 cng m). Vi trng hp ny, c2 u A, B ca i tng cng ni vi mt mc

in p v skhng c dng in no chy qua, mch cu H khng hot ng. y c th

coi l mt cch thng ng c(nhng khng phi lc no cng c tc dng). l

nguyn l c bn ca mch cu H. Nh vy thnh phn chnh ca mch cu H chnh l

cc kha, vic chn linh kin lm cc kha ny ph thuc vo mc ch s dngmch cu, loi i tng cn iu khin, cng sut tiu th ca i tng v c hiu bit,

iu kin ca ngi thit k. Nhn chung, cc kha ca mch cu H thng c ch to

bng rle, BJT hay MOSFET.

4. Chip driver LMD18200

LMD18200 l IC cu H chuyn dng dng iu khin ng c DC v Step

motor ca hng National Semiconductor, dng in lin tc ln n 3A4.1 S khi


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4.2 S chn

M t chc nng mt s chn ca LMD18200

- Direction Input:Chn iu khin chiu quay ca ng c, nhn tn hiu H hoc L

tAVR thc hin o chiu ng c

- Brake Input: Chn thng ng c, nhn tn hiu H hoc L tAVR cho php

ng c chy hoc hm

- PWM Input: Kt ni vi knh pht xung PWM ca AVR iu khin tc

- Thermal Flag Output: Chn cnh bo qu nhit

- Current Sense Output: Chn dng in ng ra

- Output 1 & Output 2: Kt ni vo ng c

- Vs & GND: Cp ngun cho LMD18200


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Bng logic ca LMD18200

Theo bng logic trn th:

- ng c chy khi chn Brake treo mc L, PWM mc H, DIR c thmc H

hoc L.- ng c dng trng thi khng b hm khi PWM mc L, DIR (X- bt chp gi

tr H hoc L), Brake mc L.

- ng c dng trng thi b hm khi PWM, DIR v BRA mc H hoc PWM v

Brake mc H, DIRmc L, hoc PWM mc L, DIR (X), Brake mc H.


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PHN 2: THI CNG PHN CNG

I. KHI VI IU KHIN

Khi vi iu khin gm c:

- Vi iu khin ATmega16 vi thch anh 8MHz

- Cc jack cm kt ni vi cc khi LCD, khi cng sut, khi encoder v khi

nt nhn

II. KHI NT NHNBUTTON


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Khi nt nhn gm c 6 nt nhn, mi nt nhn c mc song song vi 1 tin

103 v c kt ni vi khi vi iu khin bng jack cm J2

III. KHI ENCODER

Khi encoder c dng lc nhiu tn hiu encoder tng c, sau a xung

encoder vo khi vi xl hin th ra tc v chiu ca ng c. Khi ny gm:- IC TL082 gm 2 knh OP-AMP lm mch so snh

- Cc jack cm J3 nhn tn hiu tng c, J2 a tn hiu encoder vo khi vi iu

khin


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IV. KHI CNG SUT

Khi cng sut dng iu khin ng c t cc tn hiu ca khi vi iu khin

a ti. Khi cng sut gm:

- IC LMD18200: l IC tch hp cu H v cc chn nh PWM, DIR v BRK dng

iu khin tc , chiu ca ng c

- Jack J1 nhn tn hiu iu khin t khi vi iu khin, J8 ni vi ng c


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PHN 3 - TNG KT

I. KT QUT C

- Tm hiu c cu trc cng nh mt s chc nng ca vi iu khin AVR v ng

dng cc chc nng vo mc ch iu khin tc ng c DC

- Bc u thc hin c m hnh thc t v hot ng ng vi khi lp trnh

II. HN CH

- Cha tm hiu c ht cc chc nng ca vi iu khin AVR

- M hnh cn cng knh, cha gn, tnh thm m cha caoi khi phn hin th b nhiu

do phn cch li gia khi cng sut v khi vi iu khin cha c thc hin tt

III. HNG PHT TRIN TI- Tip tc nghin cu tt c cc chc nng ca vi iu khin AVR v ng dng

- n gin ha m hnh, hn ch nhiu cho khi vi iu khin v LCD

- p dng thut ton PID iu khin ng c, giao tip gia khi vi iu khin vi

my tnh vic iu khin ng c c ddng hn

IV. KT LUN

Qua ti tm hiu viu khin tc ng c DC s dng vi iu khinAVRnhm chng em hc thm c rt nhiu kin thc. Qu trnh tm hiu, nhmchng em thc hin mch thc tv t c nhng kt qu nht nh. Tuy nhin v

kin thc v thi gian cn nhiu hn chnn ti cha c mrng vi nhng ng

dng thc t. Trong thi gian ti nhm s c gng tm hiu nhiu ng dng c thhn

na qua cc n k tipCui cng chng em xin chn thnh cm n tt c cc thy c cng cc bn sinh

vin, nhng ngi ng gp rt nhiu kin, cng sc rt qu bu gip nhm hon

thnh tt n ny. c bit, nhm chng em rt bit n thy Hong nh Khi

nhit tnh hng dn, ch bo em nhng kinh nghim cng kin thc thc t ti

c hon thnh mt cch nhanh chng.


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TI LIU THAM KHO

1. in t cng sut, Nguyn Bnh, NXB Khoa hcK thut nm 2000

2. Datasheet AtmelATmega16L8PU

3. http://www.hocavr.com

4. .http://www.dientuvietnam.net

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