DIGITAL MULTIPLEXING BASED LIGHTING CONTROL (DMX BASED LIGHTING CONTROL)B.TECH mini project report in Electronics and communication engineering By

R. SRAVANTHI (ROLL NO. 08241A04B5)

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING GOKARAJU RANGARAJU INSTITUTE OF ENGINEERING AND TECHNOLOGY(Affiliated to Jawaharlal Nehru Technological University)

HYDERABAD 500090 2011

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AbstractDMX stands for "Digital Multiplexing. The DMX based lighting control is designed to create, control and distribute information to DMX-compatible lighting fixtures. Microcontrollers are used in automatically controlled products and devices, such as automobile engine control systems, implantable medical devices, remote controls, office machines, appliances, power tools, and toys. By reducing the size and cost compared to a design that uses a separate microprocessor, memory, and input/output devices, microcontrollers make it economical to digitally control even more devices and processes. Mixed signal microcontrollers are common, integrating analog components needed to control non-digital electronic systems. Three color (RGB-Red, Green, Blue) LEDs are used where each zone is assigned to all three colours. The DMX controller adjusts the intensity of each of these colors so that any possible color can be produced. One or more LED drivers are addressed to a unique DMX channel, and those drivers, in response to the DMX channel commands, set the intensity level of the LEDs they operate.

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CONTENTS

Abstract List of figures I.dmx based lighting control1.1 introduction 1.2 aim of the project 1.3 methodology 1.4 block diagram

2 4 5

II. principle of operation2.1 serial UART an introduction 2.2 USART registers 2.3 hyper terminal 2.4 conclusion

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III. Hardware requirements of DMX3.1 usb-rs485 board 3.2 rs485-atmega8 board IV. software implementation 4.1 introduction to AVR 4.2 flow chart V.applications of dmx based lighting control 5.1 conclusion

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23

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LIST OF FIGURES

Fig.a: USB-RS 485 BOARD Fig.b: RS 485-ATMEGA8 BOARD Fig.c: PIN DIAGRAM OF ATMEGA8 Fig.d: Z44 MOSFET Fig.e: RED LED GLOWING Fig.f: GREEN GLOWING Fig.g: BLUE LED GLOWING Fig.h: ALL LEDS GLOWING Fig.i: NO LEDS GLOWING

LIST OF TABLESTABLE1- SPECIFICATIONS OF RS485 TABLE2-ELECTRICAL CHARACTERISTICS OF LED

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CHAPTER -IDMX BASED LIGHTING CONTROL

1.1 Introduction:DMX means digital multiplexing.DMX is a standard for digital communication networks that are commonly used to control stage lighting and effects. It was originally intended as a standardized method for controlling light dimmers, which, prior to DMX512, had employed various incompatible, proprietary protocols. However, it soon became the primary method for linking not only controllers and dimmers, but also more advanced fixtures and special effects devices such as fog machines and moving lights. In short, it's a system of controlling "intelligent" lighting fixtures and dimmers.Technically, DMX is an abbreviation for DMX512-A, the ESTA (Entertainment Services Technology Association) Standard for controlling lighting equipment and related accessories. A wide variety of lighting control consoles, controllers and other devices that output DMX signals can be used to connect to an even greater variety of lighting fixtures and accessories that can be controlled by DMX. DMX controlled lighting systems are used in many professional settings, including concert lighting, stage lighting, studio lighting, theme park attractions, and much more. In recent years, the DMX standard is being used more frequently in Architectural lighting projects, including illumination of building exteriors, accent lighting, general purpose building management and high-end residential lighting. This is due primarily to the high popularity of LED based lighting fixtures, which are frequently controlled via DMX signals.

1.2 Aim of the project:The main aim of our project is to control the colour of LED glow through a DMX controller. Our DMX controller is fully programmable through a laptop.

1.3 Methodology:DMX is divided into four zones in which each zone consists of RS485, microcontroller and LEDs. We have only considered one zone in which it consists of a microcontroller board, mosfet and leds. Here a DMX Controller is placed in which the zones are connected serially to the controller and that is terminated my connecting a resistor at the end. Here the DMX works by assigning an address to each lighting fixture. The controller sends the information to each address, including on/off signals as well as power levels. They are easily expandable and require only additional fixtures and wires to add to the system.-5-

The message is sent through Hyperterminal. As we type the color name, the corresponding colour of the RGB LED glows.

1.4 Block diagram:

PC CARD PC USB-RS 485

RS485-MEGA8

RS 485-MEGA 8

RS 485-MEGA 8

R11

LEDs

R11 some resistance-6-

CHAPTER-IIPRINCIPLE OF OPERATIONwe use asynchronous serial communication in DMX based lighting control.

2.1 Serial UART, an introduction:An UART, universal asynchronous receiver / transmitter is responsible for performing the main task in serial communications with computers. The device changes incoming parallel information to serial data which can be sent on a communication line. A second UART can be used to receive the information. The UART performs all the tasks, timing, parity checking, etc. needed for the communication. The only extra devices attached are line driver chips capable of transforming the TTL level signals to line voltages and vice versa. To use the UART in different environments, registers are accessible to set or review the communication parameters. Settable parameters are for example the communication speed, the type of parity check, and the way incoming information is signaled to the running software. Character framing:

Each character is sent as a logic low start bit, a configurable number of data bits (usually 7 or 8, sometimes 5), an optional parity bit, and one or more logic high stop bits. The start bit signals the receiver that a new character is coming. The next five to eight bits, depending on the code set employed, represent the character. Following the data bits may be a parity bit. The next one or two bits are always in the mark (logic high, i.e., '1') condition and called the stop bit(s). They signal the receiver that the character is completed. Since the start bit is logic low (0) and the stop bit is logic high (1) then there is always a clear demarcation between the previous character and the next one. application of universal baud rate register: Transmitting and receiving UARTs must be set for the same bit speed, character length, parity, and stop bits for proper operation. The receiving UART may detect some mismatched settings and set a "framing error" flag bit for the host system; in exceptional cases the receiving UART will produce an erratic stream of mutilated characters and transfer them to the host system. Typical serial ports used with personal computers connected to modems use eight data bits, no parity, and one stop bit; for this configuration the number of ASCII characters per second equals the bit rate divided by 10. Some very low-cost home computers or embedded systems dispensed with a UART and used the CPU to sample the state of an input port or directly manipulate an output port for data transmission. While very CPU-intensive, since the CPU timing was critical, these schemes

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avoided the purchase of a costly UART chip. The technique was known as a bitbanging serial port.

2.2 USART Registers:a) USART I/O Data Register UDR7 6 5 4 RXB[7:0] 3 2 1 0

TXB[7:0]R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0

The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers share the same I/O address referred to as USART Data Register or UDR. The Transmit Data Buffer Register (TXB) will be the destination for data written to the UDR Register location. Reading the UDR Register location will return the contents of the Receive Data Buffer Register (RXB).For 5-bit, 6-bit, or 7-bit characters the upper unused bits will be ignored by the Transmitter and set to zero by the Receiver. The transmit buffer can only be written when the UDRE Flag in the UCSRA Register is set. Data written to UDR when the UDRE Flag is not set, will be ignored by the USART Transmitter. When data is written to the transmit buffer, and the Transmitter is enabled, the Transmitter will load the data into the Transmit Shift Register when the Shift Register is empty. Then the data will be serially transmitted on the TxD pin. The receive buffer consists of a two level FIFO. The FIFO will change its state whenever the receive buffer is accessed. Due to this behavior of the receive buffer, do not use ReadModify-Write instructions (SBI and CBI) on this location. Be careful when using bit test instructions (SBIC and SBIS), since these also will change the state of the FIFO. b) USART Control and Status Register A UCSRA: 7 6 5 4 3 2 RXC TXC UDRE FE DOR PE

1 U2X

0 MPCM

Bit 7 RXC: USART Receive Complete This flag bit is set when there are unread data in the receive buffer and cleared when the receive buffer is empty.If the Receiver is disabled, the receive buffer will be flushed and consequently the RXC bit will become zero. Bit 6 TXC: USART Transmit Complete This flag bit is set when the entire frame in the Transmit Shift Register has been shifted out

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And there are no new data currently present in the transmit buffer (UDR). The TXC Flag bit is automatically cleared when a transmit complete interrupt is executed, or it can be cleared by writing a one to its bit location. Bit 5 UDRE: USART Data Register Empty The UDRE Flag indicates if the transmit buffer (UDR) is ready to receive new data. If UDRE is one, the buffer is empty, and therefore ready to be written. Bit 4 FE: Frame Error This bit is set if the next character in the receive buffer had a Frame Error when received (that is,when the first stop bit of the next character in the receive buffer is zero). This bit is valid until the receive buffer (UDR) is read. The FE bit is zero when the stop bit of received data is one. Always set this bit to zero when writing to UCSRA. Bit 3 DOR: Data OverRun This bit is set if a Data OverRun condition is detected. A Data OverRun occurs when the receivebuffer is full (two characters), it is a new character waiting in the Receive Shift Register, and a new start bit is detected. This bit is valid until the receive buffer (UDR) is read. Always set this bit to zero when writing to UCSRA. Bit 2 PE: Parity Error This bit is set if the next character in the receive buffer had a Parity Error when received and the parity checking was enabled at that point (UPM1 = 1). This bit is valid until the receive buffer (UDR) is read. Always set this bit to zero when writing to UCSRA. Bit 1 U2X: Double the USART transmission speed This bit only has effect for the asynchronous operation. Write this bit to zero when using synchronous operation. Writing this bit to one will reduce the divisor of the baud rate divider from 16 to 8 effectively doubling the transfer rate for asynchronous communication. Bit 0 MPCM: Multi-processor Communication Mode This bit enables the Multi-processor Communication mode. When the MPCM bit is written to one, all the incoming frames received by the USART Receiver that do not contain address information will be ignored. The Transmitter is unaffected by the MPCM setting. c) USART Control and Status Register B UCSRB: 7 RXCIE 6 TXCIE 5 UDRIE 4 RXEN 3 TXEN 2 UCSZ2 1 RXB8 0 TXB8

Bit 7 RXCIE: RX Complete Interrupt Enable Writing this bit to one enables interrupt on the RXC Flag. A USART Receive Complete interrupt will be generated only if the RXCIE bit is written to one, the Global Interrupt Flag in SREG is written to one and the RXC bit in UCSRA is set. Bit 6 TXCIE: TX Complete Interrupt Enable

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Writing this bit to one enables interrupt on the TXC Flag. A USART Transmit Complete interrupt will be generated only if the TXCIE bit is written to one, the Global Interrupt Flag in SREG is written to one and the TXC bit in UCSRA is set. Bit 5 UDRIE: USART Data Register Empty Interrupt Enable Writing this bit to one enables interrupt on the UDRE Flag. A Data Register Empty interrupt will be generated only if the UDRIE bit is written to one, the Global Interrupt Flag in SREG is written to one and the UDRE bit in UCSRA is set. Bit 4 RXEN: Receiver Enable Writing this bit to one enables the USART Receiver. The Receiver will override normal port operation for the RxD pin when enabled. Disabling the Receiver will flush the receive buffer invalidating the FE, DOR and PE Flags. Bit 3 TXEN: Transmitter Enable Writing this bit to one enables the USART Transmitter. The Transmitter will override normal port operation for the TxD pin when enabled. The disabling of the Transmitter (writing TXEN to zero) will not become effective until ongoing and pending transmissions are completed (that is, when the Transmit Shift Register and Transmit Buffer Register do not contain data to be transmitted).When disabled, the Transmitter will no longer override the TxD port. Bit 2 UCSZ2: Character Size The UCSZ2 bits combined with the UCSZ1:0 bit in UCSRC sets the number of data bits (Character Size) in a frame the Receiver and Transmitter use. Bit 1 RXB8: Receive Data Bit 8 RXB8 is the ninth data bit of the received character when operating with serial frames with nine data bits. Must be read before reading the low bits from UDR. Bit 0 TXB8: Transmit Data Bit 8 TXB8 is the ninth data bit in the character to be transmitted when operating with serial frames with nine data bits. Must be written before writing the low bits to UDR. d) USART Control and Status Register C UCSRC:

Bit 7 URSEL: Register Select Bit 6 UMSEL: USART Mode Select Bit 5:4 UPM1:0: Parity Mode: e) USART Baud Rate Registers UBRRL and UBRRHs:

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15 URSEL

14 -----------

13 ----------

12 ----------

11

10

9

8

UBRR[11:8]

UBRR[7:0]

7

6

5

4

3

2

1

0

Bit 15 URSEL: Register Select This bit selects between accessing the UBRRH or the UCSRC Register. It is read as zero When reading UBRRH. The URSEL must be zero when writing the UBRRH. Bit 14:12 Reserved Bits These bits are reserved for future use. For compatibility with future devices, these bit must be written to zero when UBRRH is written. Bit 11:0 UBRR11:0: USART Baud Rate Register This is a 12-bit register which contains the USART baud rate. The UBRRH contains the four most significant bits, and the UBRRL contains the eight least significant bits of the USART baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud rate is changed. Writing UBRRL will trigger an immediate update of the baud rate prescaler.

2.3 HyperTerminal:HyperTerminal is a terminal emulator program that runs in Windows. What this means is that it offers you a text-based command prompt on a remote device. That device could be either a serial device, like a Cisco router, connected directly to your PCs serial port OR a network device. HyperTerminal can either use the local serial interface for communications or the network. In the case of the network, HyperTerminal is simply using the telnet protocol. Benefits and Purposes of HyperTerminal: HyperTerminal is a program that you can use to connect to other computers, Telnet sites, bulletin board systems (BBSs), online services, and host computers. HyperTerminal connections are made using a modem, a null modem cable (used to emulate modem communication), or an Ethernet connection. HyperTerminal has capabilities beyond making connections to other computers. It can, for example, transfer large files from a computer onto your portable computer using a serial port rather than requiring you to set up your portable computer on a network. It can help debug source code from a remote terminal. It can also communicate with many older, characterbased computers.

2.4 Conclusion: Through hyper terminal we send characters as programmed like R,G,B toglow red,green,blue leds respectively by using serial communication.

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CHAPTER-IIIHARDWARE REQUIREMENTS OF DMX 3.1 USB-RS 485 board:

Figure a:usb-rs 485 board

3.1.1 FT232R:The FT232R is the latest device to be added to FTDIs range of USB UART interface Integrated Circuit Devices. The FT232R is a USB to serial UART interface with optional clock generator output, and the new FTDIChip-ID security dongle feature. In addition, asynchronous and synchronous bit bang interface modes are available. USB to serial designs using the FT232R have been further simplified by fully integrating the external EEPROM, clock circuit and USB resistors onto the device. The FT232R adds two new functions compared with its predecessors, effectively making it a 3-in-1 chip for some application areas. The internally generated clock (6MHz, 12MHz, 24MHz, and 48MHz) can be brought out of the device and used to drive a microcontroller or external logic. A unique number (the FTDIChip-ID) is burnt into the device during manufacture and is readable over USB, thus forming the basis of a security dongle which can be used to protect customer application software from being copied.

3.1.2 RS485:RS485 - is a specialized interface that would not be considered standard equipment on today's home PC but is very common in the data acquisition world. RS232 is the most common interface used to communicate serially but it has it's limitations. Standards have been developed to insure compatibility between units provided by different manufacturers, and to allow for reasonable success in transferring data over specified distances and/or data rates. The Electronics Industry Association (EIA) has produced standards for RS485, RS422, RS232, and RS423 that deal with data communications. Suggestions are often made to deal with practical problems that might be encountered in a typical network. EIA standards where previously marked with the prefix "RS" to indicate recommended standard; however, the standards are now generally indicated as "EIA" standards to identify the standards organization. While the standards bring uniformity to data communications, many areas are not specifically covered and remain as "gray areas" for the used to discover (usually during installation) on his own RS485 will- 12 -

support 32 drivers and 32 receivers (we are talking about bi-directional - half duplex - multidrop communications over a single or dual twisted pair cable !!). An RS-485 network can be connected in a 2 or 4 wire mode. Maximum cable length can be as much as 4000 feet because of the differential voltage transmission system used. The typical use for RS485 is a single PC connected to several addressable devices that share the same cable. You can think of RS485 as a "party-lined" communications system (the addressing is handled by the Remote Computer unit). The RS232 may be converted to RS485 with a simple interface converter - it can have optical isolation and surge suppression. Electronic data communications between elements will generally fall into two broad categories: single-ended and differential. RS485 meets the requirements for a truly multi-point communications network, and the standard specifies up to 32 drivers and 32 receivers on a single (2-wire) bus. With the introduction of "automatic" repeaters and high-impedance drivers / receivers this "limitation" can be extended to hundreds (or even thousands) of nodes on a network. RS485 extends the common mode range for both drivers and receivers in the "tri-state" mode and with power off. Also, RS485 drivers are able to withstand "data collisions" (bus contention) problems and bus fault conditions.

specifications:Table 1:SPECIFICATIONS OF RS 485

Mode of Operation - differential Total Number of Drivers and Receivers on One Line -1 driver 32 receiver Maximum Cable Length 4000 FT. Maximum Data Rate 10Mb/s The PIC micro-controller is the heart of the system running at 20Mhz driven from a crystal clock module IC4.

3.1.3 SP481 DRIVER:The driver outputs of the SP481, SP483, and SP485 are differential outputs meeting the RS485 and RS-422 standards. The typical voltage output swing with no load will be 0 volts to +5volts. With worst case loading of 54W across the differential outputs, the drivers can maintain greater than 1.5V voltage levels. The drivers of the SP481, SP483 and SP485 have

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an enable control line which is active HIGH. A logic HIGH on DE (pin 5) will enable the differential driver outputs. A logic LOW on DE (pin 5) will tri-state the driver outputs. The transmitters of the SP481 and SP485 will operate up to at least 5Mbps.

3.2 RS485-ATMEGA8 BOARD:

Figure b:rs485-atmega8 board

3.2.1 SPI Protocol:The Serial Peripheral Interface (SPI) is one of the widely accepted communication interfaces implemented in Intersils Digitally Controlled Potentiometers (DCP) portfolio. The SPI is used for a synchronous serial communication of host micro controller and peripherals. SPI requires two control lines (CS and SCK) and two data lines (SDI and SDO) SCK CS MOSI MISO SCK CS SDI SDO

The SPI bus specifies four logic signals:- 14 -

SCK Serial Clock, provided by master CS Chip Select, allow master to select peripheral (slave) device MOSI/SDI Master Output Slave Input/Serial Data In MISO/SDO Master Input Slave Output/Serial Data Out With CS active low, the corresponding peripheral device is selected. A master, usually the host microcontroller, always provides clock signal to all devices on a bus whether it is selected or not. Only one master must be active on a bus at a time. The SPI protocol operates in full duplex mode, when input and output data transfers on both lines simultaneously. The unselected devices keep the SDO lines in hi-Z state and therefore inactive.

3.2.2 Receiver SP481:The SP481, SP483, and SP485 receivers have differential inputs with an input sensitivity as low as 200mV. Input impedance of the receivers is typically 15kW (12kW minimum). A wide common mode range of -7V to +12V allows for large ground potential differences between systems. The receivers of the SP481, SP483 and SP485 have a tri-state enable control pin. A logic LOW on RE (pin 4) will enable the receiver, a logic HIGH on RE (pin 4) will disable the receiver. The receiver for the SP481 and SP485 will operate up to at least 5Mbps. The SP483 receiver is rated for data rates up to 250kbps. The receiver for each of the three devices is equipped with the fail-safe feature. Fail-safe guarantees that the receiver output will be in a HIGH state when the input is left unconnected.

3.2.3 ATMEGA8:Features: High-performance, Low-power AtmelAVR 8-bit Microcontroller Advanced RISC Architecture 130 Powerful Instructions Most Single-clock Cycle Execution 32 8 General Purpose Working Registers Fully Static Operation Up to 16MIPS Throughput at 16MHz On-chip 2-cycle Multiplier High Endurance Non-volatile Memory segments 8Kbytes of In-System Self-programmable Flash program memory 512Bytes EEPROM 1Kbyte Internal SRAM Write/Erase Cycles: 10,000 Flash/100,000 EEPROM Data retention: 20 years at 85C/100 years at 25C Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation Programming Lock for Software Security- 15 -

Peripheral Features Two 8-bit Timer/Counters with Separate Prescalar, one Compare mode One 16-bit Timer/Counter with Separate Prescalar, Compare mode, and Capture mode Real Time Counter with Separate Oscillator Three PWM Channels 8-channel ADC in TQFP and QFN/MLF package Eight Channels 10-bit Accuracy 6-channel ADC in PDIP package Six Channels 10-bit accuracy Byte-oriented Two-wire Serial Interface Programmable Serial USART Master/Slave SPI Serial Interface Programmable Watchdog Timer with Separate On-chip Oscillator On-chip Analog Comparator Special Microcontroller Features Power-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and Standby modes I/O and Packages 23 Programmable I/O Lines 28-lead PDIP, 32-lead TQFP, and 32-pad QFN/MLF Operating Voltages 2.7V - 5.5V (ATmega8L) 4.5V - 5.5V (ATmega8) Speed Grades 0 - 8MHz (ATmega8L) 0 - 16MHz (ATmega8)

Figure c:pin diagram of atmega8

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3.2.4 LEDS: Function: LEDs emit light when an electric current passes through them. Colours of LEDs: Tri-colour LEDs: Tri-colour LED The most popular type of tri-colour LED has a red and a green LED combined in one package with three leads. They are called tri-colour because mixed red and green light appears to be yellow and this is produced when both the red and green LEDs are on. Bi-colour LEDs: A bi-colour LED has two LEDs wired in 'inverse parallel' (one forwards, one backwards) combined in one package with two leads. Only one of the LEDs can be lit at one time and they are less useful than the tri-colour LEDs described above. Sizes, Shapes and Viewing angles of LEDs: LEDs are available in a wide variety of sizes and shapes. The 'standard' LED has a round cross-section of 5mm diameter and this is probably the best type for general use, but 3mm round LEDs are also popular. Round cross-section LEDs are frequently used and they are very easy to install on boxes by drilling a hole of the LED diameter, adding a spot of glue will help to hold the LED if necessary. LED clips are also available to secure LEDs in holes. Other cross-section shapes include square, rectangular and triangular. As well as a variety of colours, sizes and shapes, LEDs also vary in their viewing angle. This tells you how much the beam of light spreads out. Standard LEDs have a viewing angle of 60 but others have a narrow beam of 30 or less. Calculating an LED resistor value: LED resistor circuit An LED must have a resistor connected in series to limit the current through the LED, otherwise it will burn out almost instantly. The resistor value, R is given by: R = (VS - VL) / I VS = supply voltage VL = LED voltage (usually 2V, but 4V for blue and white LEDs) I = LED current (e.g. 10mA = 0.01A, or 20mA = 0.02A) Make sure the LED current you choose is less than the maximum permitted and convert the current to amps (A) so the calculation will give the resistor value in ohms (ohm). To convert mA to A divide the current in mA by 1000 because 1mA = 0.001A. If the calculated value is not available choose the nearest standard resistor value which is greater, so that the current will be a little less than you chose. In fact you may wish to choose a greater resistor value to reduce the current (to increase battery life for example) but this will make the LED less bright. All the LEDs connected in series pass the same current so it is best if they are all the same type. The power supply must have sufficient voltage to provide about 2V for each LED (4V for blue and white) plus at least another 2V for the resistor. To work out a value for the resistor you must add up all the LED voltages and use this for VL. Do not connect LEDs in parallel! Connecting several LEDs in parallel with just one resistor shared between them is generally not a good idea. If the LEDs require slightly different voltages only the lowest voltage LED will light and it may be destroyed by the larger current flowing through it. Although identical LEDs can be successfully connected in parallel with one resistor this rarely offers any useful benefit because resistors are very cheap and the current used is the same as connecting the LEDs individually. If LEDs are in parallel each one should have its own resistor.- 17 -

Table 2: electrical characteristics of leds

Z44 mosfet:

Figure d:Z44 mosfet

Features: 55v,60A,Rds(on)=20m when Vgs=10V Rds(on)=25m when Vgs=5V High power and current handling capability Super high dense cell design for extremely low Rds(on)

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RED LED ON:

Figure e:red led glowing

GREEN LED ON:

Figure f:green led glowing

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BLUE LED ON:

FIGURE g:BLUE LED GLOWING

ALL LEDS ON:

Figure h:all leds glowing

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NONE OF THE LEDS ON:

Figure i:no led glowing

Components and PackagesResistors-1206 FT232-SSOP28

Capacitors-1206- 21 -

IC SP481-NSOIC8

Leds-1206

Z44 Mosfet-TO220

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CHAPTER-IV Software implementation

4.1 Introduction to AVR Avr studio: An Integrated Development Environment (IDE) for developing Atmel 8-bit AVR applications in Windows NT, Windows 2000, Windows XP, Windows Vista, and Windows 7 environments. The IDE supports all Atmel tools that support the 8-bit AVR architecture. AVR Studio 4 includes a debugger that supports run control with source and instruction-level stepping and breakpoints; registers, memory, and I/O views; target configuration and management. AVR Solutions Atmel AVR 8- and 32-bit microcontrollers deliver a unique combination of performance, power efficiency, and design flexibility. Optimized to speed time to market, and easily adapt to new ones, they are based on the industrys most codeefficient architecture for C and assembly programming. The extensive AVR portfolio makes it easy to reuse knowledge when improving your products and expanding to new markets. They are Flexible and highly integrated, solutions are designed to optimize system control, wired and wireless connectivity, user interface management, low power, and ease of use.

Program:#include #include #define sbi(PORT,BIT) PORT = PORT | (1