Upload
others
View
2
Download
0
Embed Size (px)
Citation preview
4/27/2019
1
Digital Logic and Design (Course Code: EE222)
Lecture 35‐36: ALU, Data Path
Indian Institute of Technology Jodhpur, Year 2018‐2019
Course Instructor: Shree Prakash TiwariEmail: [email protected]
Office: 210, Phone: 0291‐244‐1356
Webpage: http://home.iitj.ac.in/~sptiwari/
Course related documents will be uploaded on http://home.iitj.ac.in/~sptiwari/DLD/
1
Note: The information provided in the slides are taken form text books Digital Electronics (including Mano & Ciletti), and various other resources from internet, for teaching/academic use only
ALU Overview
° Main computation unit in most computer systems
° ALUs perform a variety of different functions• Add, subtract, OR, AND…
° Example: ALU chip (74LS382)• Has data and control inputs
° Individual chips can be chained together to make larger ALUs
° ALUs are important parts of datapaths• ROMs often are used in the control path• ROMs often are used in the control path
4/27/2019
2
Arithmetic Logic Unit
° Arithmetic logic unit functions
• Two multi-bit data inputs
• Function indicates action ALUFunctionC
DataA DataB
• Function indicates action (e.g. add, subtract, OR…)
° DataOut is same bit width as multi-bit inputs (DataA and DataB)
° ALU is combinational
° Conditions indicate
ALU Conditions
DataOut
Think of ALU as a number of other arithmetic and logic blocks in a single box! Function selects the block
Conditions indicate special conditions of arithmetic activity (e.g. overflow).
Adder Subtract
AND…
ALU Integrated Circuit
° Integrated circuit – off-the-shelf components
° Examine the functionality of this ALU chip
Performs 8 functions
4/27/2019
3
Example
° Determine the 74HC382 ALU outputs for the following inputs: S2S1S0=010, A3A2A1A0=0100, B3B2B1B0=0001, and CN=1.
• Function code indicates subtract
• 0100 – 0001 = 0011
° Change the select code to 101 and repeat.• Function code indicates OR
• 0100 OR 0001 = 0101
Synchronize ALUi h l k
ALUFunctionConditions
DataA DataB
DataOut
with a clock
Expanding the ALU
° Multi-bit ALU created by connecting carry output of low-order chip to carry in of high order
Eight-bit ALU formed from 2 four-bit ALUs
4/27/2019
4
Major Components of a Computer
Processor Devices
Control
Datapath
Memory Input
Output
Datapath components
° Tri-state buffer
In Out If Enable asserted,
° Loadable register
Enable
Out = InOtherwise
Out open-circuit
LoadClk
Data stored on rising edge if Load is asserted (e.g. Load = 1)
4/27/2019
5
Computation in a Typical Computer
° Control logic often implemented as a finite state machine (including ROMs)
° Datapath contains blocks such as ALUs, registers, tri-state buffers, and RAMs
° In a processor chip often a 5 to 1 ratio of datapath to control logic
Using a Datapath
° Consider the following computation steps1. ADD A, B and put result in A
2. Subtract A, B and put result in B
3. OR A, B put result in A Determine valuesfor Function, LoadA, LoadB
• Repeat starting from step 1for Function, LoadA, LoadB
A B LoadBLoadA
Function ALU
4/27/2019
6
Modeling Control as a State Machine
° Consider the following computation steps1. ADD A, B and put result in A
2. Subtract A, B and put result in B
3. OR A, B put result in A Determine valuesfor Function, LoadA, LoadB
• Repeat starting from step 1for Function, LoadA, LoadB
S0 S1 S2
Model control as a state machine.Determine control outputs for each state
Modeling Control as a State Machine
° Consider the following computation steps1. ADD A, B and put result in A
2. Subtract A, B and put result in B
3. OR A, B put result in A
StatesS0 = 00S1 = 01
• Repeat starting from step 1 S2 = 10
Present State Next State Function LoadA LoadB
00 01 011 1 001 10 010 0 110 00 101 1 0
We know how to implement this using an SOP.Can we use a ROM?
4/27/2019
7
ROM Implementation of State Machine
Present State Next State Function LoadA LoadB
00 01 011 1 001 10 010 0 110 00 101 1 0
StatesS0 = 00S1 = 01S2 = 10
PS
01011101001001
0010110
000110
ROM
Note: No minimization!One line in ROM for each state
NS
Function, LoadA, LoadB
Putting the Control and Datapath Together
01011101001001
0010110
000110
ROM
PS
NS
0010110 10
LoadAA B LoadB
Function ALU3
4/27/2019
8
What if we replaced the ROM with RAM?
01011101001001
0010110
000110
RAM
Looks like software!
PS
NS
0010110 10
LoadAA B LoadB
Function ALU3
Possible to implement different functions!Program the RAM to perform different sequences
Summary
° ALU circuit can perform many functions• Combinational circuit
° ALU chips can be combined together to form larger ALU chipsALU chips
• Remember to connect carry out to carry in
° ALUs form the basis of datapaths
° ROMs can form the basis of control paths
° Combine the two together to build a computing circuit
° Next: more data and control paths
4/27/2019
9
Next
° Datapath
Datapath Overview
° Datapaths must deal with input and output data values• Implement with tri-state buffers
° Necessary to control external interfaces• Perform repetitive operations
° Some datapaths require decision making• Control outputs implemented in ROM
° Moving towards software• Control implemented as a series of instructions
° Understanding the data and control path° Understanding the data and control path
4/27/2019
10
Using a Datapath
° Consider the following computation steps1. ADD A, B and put result in A
2. Subtract A, B and put result in B
3. OR A, B put result in A Determine valuesfor Function, LoadA, LoadB
• Repeat starting from step 1for Function, LoadA, LoadB
A B LoadBLoadA
Function ALU
Datapath I/O
° A wire can be driven by only one tri-state at a time• If InPass is active, AluPass must be inactive
• If AluPass is active, InPass must be inactive
InPass OutPass
X Y LoadYLoadX
Function ALU AluPass
4/27/2019
11
Datapath I/O
° Two values enter from the left (A and B)• Need to perform (A+B)+A
• In -> X (Load A)
• In -> Y (Load B) Four steps and then repeat
• A+B -> Y
• (A+B)+A -> Out
X Y LoadYLoadX
InPass OutPass
In Out
Function ALU AluPass
Implementing the Control ROM
° Two values enter from the left (A and B)• Need to perform (A+B)+A
• In -> X (Load A) - State 00
• In -> Y (Load B) - State 0101000101001000001100
0001
ROM
Addr
• A+B -> Y - State 10
• (A+B)+A -> Out - State 11PS
NS
1101101010 10
Control outputs
0001100011 11
PS NS Function LoadX LoadY InPass AluPass OutPass
00 01 000 1 0 1 0 001 10 000 0 1 1 0 010 11 011 0 1 0 1 011 00 011 0 0 0 1 1
4/27/2019
12
More Complicated Example
° Can we compute (A+B) . (A-B)?
° Currently, no place for intermediate storage
° Solution: Add RAM to datapath.
X Y LoadYLoadX
InPass OutPass
Function ALU AluPass
More Complicated Example
° Can we compute (A+B) . (A-B)?• Need to add intermediate storage.
° Typical sizes (1MB – 2GB)Add RAM to the Datapath
X Y LoadYLoadX
InPass OutPass
RAMAddr
ReadWrite
Function ALU AluPass
4/27/2019
13
Implementing the Control ROM
° Two values enter from the left (A and B)• Need to perform (A+B) . (A-B)
• In -> X (Load A) - State 000
• In -> Y (Load B) - State 001
• A+B -> RAM[4] - State 010
• A-B -> X - State 011
• RAM[4] ->Y - State 100
• (A+B) . (A-B) ->Out - State 101
PS NS Function LoadX LoadY InPass AluPass OutPass Addr Read Write
000 001 000 1 0 1 0 0 000 0 0001 010 000 0 1 1 0 0 000 0 0010 011 011 0 0 0 1 0 100 0 1 011 100 010 1 0 0 1 0 000 0 0100 101 000 0 1 0 0 0 100 1 0101 000 110 0 0 0 1 1 000 0 0
Does the Value of the Data Matter?
° Problem: Add A to itself until overflow occurs• Amount of steps depends on A
X Y LoadYLoadX
InPass OutPass
RAMAddr
ReadWrite
Function ALU AluPass
How can we determine if overflow occurred?
OF
4/27/2019
14
Implementing the Control ROM using Conditions
° One value enters from the leftAdd A to itself until overflow occurs
• In -> X, Y (Load A, B) - State 0 - Next state 1
• X+Y -> Out, X - State 1 - Next state (1 if no overflow, 0 if overflow)
Include overflow (OF) bit as a ROM inputNote that it doubles the size of the ROM
PS OF NS Function LoadX LoadY InPass AluPass OutPass Addr Read Write
0 0 1 000 1 1 1 0 0 000 0 00 1 1 000 1 1 1 0 0 000 0 01 0 1 011 1 0 0 1 1 000 0 01 1 0 011 1 0 0 1 1 000 0 0
Bits in the ROMEach row indicates a ROM word
Implementing the Control ROM with Conditionals
° Control path may have many inputs• Overflow, carry out, zero
° U d f
10001110000000
10001110000000
0001
ROM
2
° Used to perform conditional operations
° If statements and loops in programming languages
Addr
NS
10111001100000 10
Control outputs
00110101100000 11
OF
PS OF NS Function LoadX LoadY InPass AluPass OutPass Addr Read Write
0 0 1 000 1 1 1 0 0 000 0 00 1 1 000 1 1 1 0 0 000 0 01 0 1 011 1 0 0 1 1 000 0 01 1 0 011 1 0 0 1 1 000 0 0
4/27/2019
15
One More Example
° Read two values from RAM (locations 0 and 1) and store to location 2.• Very common operation for microprocessor
X Y LoadYLoadX
InPass OutPass
RAMAddr
ReadWrite
Function ALU AluPass
Implementing the Control ROM
° Perform memory reads and writes• RAM[0] -> X - State 00
• RAM[1] -> Y - State 01
• X+Y -> RAM[2] - State 10
PS NS Function LoadX LoadY InPass AluPass OutPass Addr Read Write
No interaction with outside interfaces (In, Out) is required
00 01 000 1 0 0 0 0 000 1 001 10 000 0 1 0 0 0 001 1 010 00 011 0 0 0 1 0 010 0 1
4/27/2019
16
Processor Compilation
° Software engineer writes C program
° Compiler software converts C to assembly code
° Assembler converts assembly code to binary format
main () {int A, B, C;
C = A + B;}
C program
Compile LD R1, A ; load A to Reg R1LD R2, B ; load B to Reg R2ADD R3, R1, R2 ; Add R1, R2 -> R3ST R3, C ; Store result in C
Assembly program
}
A, B, and C are storage locations inmain memory (DRAM)
System Design
•Components•Spec•Implementation
Data Subsystem
Conditions ControlSignals
64 64DataInputs
Data Outputs
Control Subsystem
ControlInputs
ControlOutputs
go done (ready)
32
4/27/2019
17
DataS
Components
Storage Modules
Functions
Data storagef
System Design
Subsystem
ControlSubsystem
OperatorsInterconnections
Sequential machines
Data transformation
Control of data transfersControl ofSubsystem Control of transformationsControl of the sequential system
33
Components: Storage Modules, Register
D
LDCLR
Q
CLK
Q(t+1) = (0 0 0) if CLR = 1Q(t+1) = (0, 0, .. , 0) if CLR = 1= D if LD = 1 and CLR = 0= Q(t) if LD = 0 and CLR = 0
34
4/27/2019
18
Storage Component: Registers, Array of Registers
LDc
D
Registers: If c then R D
RArray of Registers: Sharing connections
and controls
D
c
R
Decoderaddress
35
Decoder RAMAddress
Storage Components: RAM, FIFO, LIFO
RAM
Size of RAM largerthan registers
FIFO (First in first out)
LIFO (Stack)
36
4/27/2019
19
Functional Modules
A B
Operation CASE Op-Sel Is
Z
Operationselection
CASE Op Sel IsWhen F1, Z <= A op1 BWhen F2, Z <= A op2 B
.
.End CASE
37
Interconnect Modules (Wires and Switches)
•Single Lines•Band of Wires•Shared Buses
1. Single line (shifting, time sharing)
Shared Buses•Crossbar
38
4/27/2019
20
2. Band of Wires (BUS)
3. Shared Bus
Interconnect Modules (Wires and Switches)
R1 R2 R3 Rm
…..
Switches
switch switch switch switch
c
y
xx
y
c d1 2 3 .. N 1 2 3 .. N
MUXDEMUX
39
Switches
4. Crossbar (Multiple buses running horizontally)m simultaneous transfers are possible, but more expensive.
Bus 164
Interconnect Modules (Wires and Switches)
Bus m
R1
R
40
MUX MUX MUX
…
Bus mRm
4/27/2019
21
Program:1. Objects (Registers, Outputs of combinational logic)2. Operation3. Assignment
Programming
g4. Sequencing
Example: Signal R1, R2, Bit Vector V (15 down to 0);Z A + B ( A, B, Z need to be defined)R1 R2BeginEndif ( ) then ( ), ENDIF;
41
Ex. If C then R1 S1Else R2 S2Endif;
R1LD
S2
S1
C
Programming
R2
If C1 then X AElse X B + CEndif Adder
B CA
If C2 then G XEndif
MUX1 0
G
C1
C2 CLK
42
4/27/2019
22
Summary
° Datapaths are important components of computer systems
° Interaction between control and data path determines execution timeexecution time
° Each sequence of operations can be represented with a ROM program
• Each row in the state table corresponds to a word in the ROM
° Multiple rows for each state if the ROM has a control input (e.g. ALU overflow)