Digital Electronics Tutorial.doc

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Digital ElectronicsTutorialDec-30-2007

This Digital tutorial was started a long time ago; every time Iupdate my web page, I mae sure to add something new inDigital tutorial section! I" you have been a "re#uent visitor, youmust have noticed how this tutorial page has improved! $urrentlythis website is getting more than 1 million hitsevery month!

% special thans to Paolo Franchetti "or "i&ing grammar andspelling mistaes in Digital tutorial!

Important :This tutorial is best seen using "ire"o& web browserand may not loo well on Internet '&plorer!
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Introduction

Digital Number System

Boolean Algebra and ogic !ircuits

Digital ogic "ates

Simpli#ication $# Boolean Functions

Digital !ombinational ogic

!ombinational Arithmetic !ircuits
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Se%uential !ircuits

Digital ogic Families

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Deepa- .umar Tala ) All rights reser/ed

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Introduction
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Dec-30-2007

Introduction

Numerical Presentation

Analog 4epresentationDiagram o" analog voltage vs time

Digital 4epresentation Diagram o" Digital voltage vs time

Ad/antages o# Digital Techni%ues

imitations o# Digital Techni%ues
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IntroductionDec-30-2007
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Introduction

I started studying digital electronics in the "irst months o" year *++; at thattime I wanted to build digitally controlled volume and tuning "or an %.%DI/! I was a *00137; analog engineer and digital electronic conceptswere new to me! It is an entirely di""erent story so I "ailed miserably the "irst,second, third, !!!!!! n*4th time to design a woring model o" the above!)hen I started, I was "ascinated by the binary system and by the way

microprocessors wor! It too me nearly one year to "ully understand theconcepts o" digital! Digital means anything which has to do with digits, but intoday5s world digital means $/(, TT6 gates, "lip-"lops, processors,computers! In the ne&t "ew pages I will be sharing my nowledge, e&perienceand also some tidbits "rom my "riends and "rom the net! ou are alwayswelcome to suggest and help me mae this page really use"ul "or the wholedigital world!

Numerical Presentation

The #uantities that are to be measured, monitored, recorded, processed andcontrolled are analog and digital, depending on the type o" system used! It isimportant when dealing with various #uantities that we be able to representtheir values e""iciently and accurately! There are basically two ways o"representing the numerical value o" #uantities8 analog and digital!

Analog 4epresentation


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Digital NumberSystem

Dec-30-2007
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Numbering System

Decimal (ystem Decimal '&amples

9inary (ystem

9inary $ounting.epresenting 9inary :uantities

Typical oltage %ssignment/ctal (ystem

/ctal to Decimal $onversion


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/ctal-To-2* $ode?2** $ode.e"lective $ode(e#uential $odes

@on )eighted $odes

'&cess-3 $odeAray $ode

Error Detecting and !orrection !odes

'rror Detecting $odes

Barity$hec (ums

'rror-$orrecting $odes


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Part)I
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Dec-30-2007

Numbering System

any number systems are in use in digital technology! The most commonare the decimal, binary, octal, and he&adecimal systems! The decimal systemis clearly the most "amiliar to us because it is a tool that we use every day!'&amining some o" its characteristics will help us to better understand the

other systems! In the ne&t "ew pages we shall introduce "our numericalrepresentation systems that are used in the digital system! There are othersystems, which we will loo at brie"ly!

Decimal 9inary /ctal


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1+5 1+* 1+1 1++ 1+)1 1+)* 1+)5

F*000 F*00 F*0 F* ! F0!* F0!0* F0!00*

ost (igni"icantDigit

Decimal point6east(igni"icantDigit

'ven though the decimal system has only *0 symbols, any number o" anymagnitude can be e&pressed by using our system o" positional weighting!

Decimal E6amples

3!*>*0 ?2*0 *02>*0

>000*0

Binary System

In the binary system, there are only two symbols or possible digit values, 0
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and *! This base-2 system can be used to represent any #uantity that can berepresented in decimal or other base system!

*5 ** *1 *+ *)1 *)* *)5

F F> F2 F* ! F0!? F0!2? F0!*2?


9inary point6east(igni"icantDigit

Binary !ounting

The 9inary counting se#uence is shown in the table8

*5 ** *1 *+ Decimal

0 0 0 0 0

0 0 0 * *

0 0 * 0 2

0 0 * * 3


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0 * 0 0 >

0 * 0 * ?

0 * * 0

0 * * * 7

* 0 0 0

* 0 0 * +

* 0 * 0 *0

* 0 * * **

* * 0 0 *2

* * 0 * *3

* * * 0 *>

* * * * *?


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4epresenting Binary 7uantities

In digital systems the in"ormation that is being processed is usually presented

in binary "orm! 9inary #uantities can be represented by any device that hasonly two operating states or possible conditions! '!g!! a switch is only open orclosed! )e arbitrarily as we de"ine them4 let an open switch represent binary0 and a closed switch represent binary *! Thus we can represent any binarynumber by using series o" switches!

Typical 8oltage Assignment

Binary 1:%ny voltage between 2 to ?

Binary +:%ny voltage between 0 to 0!

Not used:oltage between 0! to 2 in ? olt $/( and TT6 6ogic, thismay cause error in a digital circuit! Today5s digital circuits wors at *! volts,so this statement may not hold true "or all logic circuits!


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)e can see another signi"icant di""erence between digital and analogsystems! In digital systems, the e&act voltage value is not important; eg, avoltage o" 3! means the same as a voltage o" >!3! In analog systems, thee&act voltage value is important!

The binary number system is the most important one in digital systems, butseveral others are also important! The decimal system is important becauseit is universally used to represent #uantities outside a digital system! Thismeans that there will be situations where decimal values have to beconverted to binary values be"ore they are entered into the digital system!


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In additional to binary and decimal, two other number systems "ind wide-spread applications in digital systems! The octal base-4 and he&adecimal

base-*4 number systems are both used "or the same purpose- to providean e""icient means "or representing large binary system!

$ctal System

The octal number system has a base o" eight, meaning that it has eightpossible digits8 0,*,2,3,>,?,,7!

(5 (* (1 (+ ()1 ()* ()5

F?*2 F> F F* ! F*= F*=> F*=?*2


/ctal point6east(igni"icantDigit

$ctal to Decimal !on/ersion

237F 2 & 24 3 & *4 7 & 04 F *?+*0

2>!F 2 & *4 > & 04 & -*4 F 20!7?*0

**!*F * & *4 * & 04 * & -*4 F +!*2?*0


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*2!3F * & *4 2 & 04 3 & -*4 F *0!37?*0

9e6adecimal System

The he&adecimal system uses base *! Thus, it has * possible digitsymbols! It uses the digits 0 through + plus the letters %, 9, $, D, ', and C asthe * digit symbols!

15 1* 11 1+ 1)1 1)* 1)5

F>0+ F2? F* F* ! F*=* F*=2? F*=>0+



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Digital Number

System

Part)II
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!ode !on/ersion

$onverting "rom one code "orm to another code "orm is called codeconversion, lie converting "rom binary to decimal or converting "romhe&adecimal to decimal!

Binary)To)Decimal !on/ersion

%ny binary number can be converted to its decimal e#uivalent simply bysumming together the weights o" the various positions in the binary numberwhich contain a *!

Binary Decimal

**0**2

2>230*2*20 F*02*

.esult 27*0
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and

Binary Decimal

*0**0*0*2

2702?2>03220*20 F*2032*0>0*

.esult ***0

ou should have noticed that the method is to "ind the weights i!e!, powerso" 24 "or each bit position that contains a *, and then to add them up!

Decimal)To)Binary !on/ersion

There are 2 methods8

.everse o" 9inary-To-Decimal ethod
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.epeat Division

4e/erse o# Binary)To)Decimal ;ethod

Decimal Binary

>?*0 F32 0 > 0 *

F2?02322020

.esult F*0**0*2

4epeat Di/ision)!on/ert decimal to binary

This method uses repeated division by 2!

$onvert 2?*0to binary

Di/ision 4emainder Binary


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2?=2 F *2 remainder o" * * 6east (igni"icant 9it4

*2=2 F remainder o" 0 0

=2 F 3 remainder o" 0 0

3=2 F * remainder o" * *

*=2 F 0 remainder o" * * ost (igni"icant 9it4

.esult 2?*0 F **00*2

The Clow chart "or repeated-division method is as "ollows8


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Binary)To)$ctal < $ctal)To)Binary !on/ersion


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$ctal Digit + 1 * 5 = > ,

9inary'#uivalent

000 00* 0*0 0** *00 *0* **0 ***

'ach /ctal digit is represented by three binary digits!

E6ample:

*00 *** 0*02F *004 ***4 0*042F > 7 2

4epeat Di/ision)!on/ert decimal to octal

This method uses repeated division by !

E6ample8 $onvert *77*0to octal and binary


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Di/ision 4esult Binary

*77= F 22 remainder o" * * 6east (igni"icant 9it4

22= F 2 remainder o"

2 = F 0 remainder o" 2 2 ost (igni"icant 9it4

.esult *77*0 F 2*

9inary F 0*0**000*2

9e6adecimal to Decimal


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Di/ision 4esult 9e6adecimal

37=* F 23 remainder o" *0 % 6east (igni"icant 9it423

23=* F * remainder o" 7 7

*=* F 0 remainder o" * * ost (igni"icant 9it4

.esult 37*0 F *7%*

9inary F 000* 0*** *0*02

Binary)To)9e6adecimal ,

9inary '#uivalent 0000 000* 00*0 00** 0*00 0*0* 0**0 0***

9e6adecimal Digit ( ' A B ! D E F

9inary '#uivalent *000 *00* *0*0 *0** **00 **0* ***0 ****


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'ach


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$onvert ?%*to /ctal!

9e6adecimal Binary


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Part)IIIDec-30-2007

Binary !odes

9inary codes are codes which are represented in binary system with

modi"ication "rom the original ones! 9elow we will be seeing the "ollowing8

)eighted 9inary (ystems

@on )eighted $odes
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?eighted Binary Systems

)eighted binary codes are those which obey the positional weightingprinciples, each position o" the number represents a speci"ic weight! Thebinary counting se#uence is an e&ample!

Decimal (=*1 *=*1 >*11 E6cess)5

0 0000 0000 0000 00**

* 000* 000* 000* 0*00

2 00*0 00*0 00** 0*0*

3 00** 00** 0*0* 0**0

> 0*00 0*00 0*** 0***

? 0*0* *0** *000 *000

0**0 **00 *0*0 *00*

7 0*** **0* **00 *0*0

*000 ***0 ***0 *0**
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+ *00* **** **** **00

(=*1 !ode*11 !ode

This is a weighted code, its weights are ?, 2, * and *! % decimal number is


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represented in >-bit "orm and the total "our bits weight is ? 2 * * F +!! $odes 2>2*, ?2**,and e&cess-3 are re"lective, whereas the >2* code is not!

Se%uential !odes

% code is said to be se#uential when two subse#uent codes, seen asnumbers in binary representation, di""er by one! This greatly aidsmathematical manipulation o" data! The >2* and '&cess-3 codes arese#uential, whereas the 2>2* and ?2** codes are not!

Non ?eighted !odes

@on weighted codes are codes that are not positionally weighted! That is,each position within the binary number is not assigned a "i&ed value!

E6cess)5 !ode


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'&cess-3 is a non weighted code used to e&press decimal numbers! Thecode derives its name "rom the "act that each binary code is the

corresponding >2* code plus 00**34!

E6ample: *000 o" >2* F *0** in '&cess-3

"ray !ode

The gray code belongs to a class o" codes called minimum change codes, in

which only one bit in the code changes when moving "rom one code to thene&t! The Aray code is non-weighted code, as the position o" bit does notcontain any weight! The gray code is a re"lective digital code which has thespecial property that any two subse#uent numbers codes di""er by only onebit! This is also called a unit-distance code! In digital Aray code has got aspecial place!

Decimal Number Binary !ode "ray !ode

0 0000 0000

* 000* 000*

2 00*0 00**


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3 00** 00*0

> 0*00 0**0

? 0*0* 0***

0**0 0*0*

7 0*** 0*00

*000 **00

+ *00* **0*

*0 *0*0 ****

** *0** ***0

*2 **00 *0*0

*3 **0* *0**

*> ***0 *00*

*? **** *000

Binary to "ray !on/ersion


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Aray $ode (9 is binary code (9!

Aray $ode (9-* is the G/. o" binary code (9 and (9-*! (9-2 bit o" gray code is G/. o" (9-* and (9-2 bit o" binary

code!

(9-@ bit o" gray code is G/. o" (9-@-* and (9-@ bit o" binarycode!

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Part)I8Dec-30-2007


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Error Detecting and !orrection !odes

Cor reliable transmission and storage o" digital data, error detection andcorrection is re#uired! 9elow are a "ew e&amples o" codes which permit errordetection and error correction a"ter detection!

Error Detecting !odes

)hen data is transmitted "rom one point to another, lie in wirelesstransmission, or it is Hust stored, lie in hard diss and memories, there arechances that data may get corrupted! To detect these data errors, we usespecial codes, which are error detection codes!

Parity

In parity codes, every data byte, or nibble according to how user wants to

use it4 is checed i" they have even number o" ones or even number o" eros!9ased on this in"ormation an additional bit is appended to the original data!Thus i" we consider -bit data, adding the parity bit will mae it + bit long!

%t the receiver side, once again parity is calculated and matched with thereceived parity bit +4, and i" they match, data is o, otherwise data is corrupt!


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Part)8Dec-30-2007


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Floating Point Numbers

% real number or "loating point number is a number which has both an integerand a "ractional part! '&amples "or real real decimal numbers are *23!>?,0!*23>, -0!*23>?, etc! '&amples "or real binary numbers are **00!**00,0!*00*, -*!00*, etc! In general, "loating point numbers are e&pressed ine&ponential notation!

Cor e&ample the decimal number 30000!0 can be written as 3 & *0>!

3*2!>? can be written as 3!*2>? & *02!

(imilarly, the binary number *0*0!00* can be written as *!0*000* & *03!

The general "orm o" a number @ can be e&pressed as

N @ m 6 be3


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Boolean Algebra andogic !ircuits

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Symbolic ogic

BrecedenceCunction De"initions

Truth Tables

Boolean S2itching Algebras %&ioms

$losureIdentity$ommutative 6awsDistributive 6aws$omplement

Theorems Idempotent 6aw

Deorgan5s 6aw

9oundedness 6aw%bsorption 6aw'limination 6awEni#ue $omplement theoremInvolution theorem%ssociative BropertiesDuality Brinciple
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$onsensus theorem(hannon '&pansion Theorem

(ummary o" 6aws %nd Theorms

Algebraic ;anipulation

interms and a&terms

(um /" Broducts (/B4Broduct /" (um B/(4'&ercise

$onversion between B/( and (/B (impli"ication

ogic !ircuits

Ci&ed 6ogic (ystems

Bositive 6ogic@egative 6ogic

(witching $ircuits

Two variable %@D circuit G!Two variable /. circuit G Cour variable circuit E!!G 4

Truth Table

(earch

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Symbolic ogic

9oolean algebra derives its name "rom the mathematician Aeorge 9oole!(ymbolic 6ogic uses values, variables and operations 8

Trueis represented by the value 1!

Falseis represented by the value +!

ariables are represented by letters and can have one o" two values, either 0or *! /perations are "unctions o" one or more variables!

ANDis represented by G! $4is represented by G

N$Tis represented by G5 ! Throughout this tutorial the G5 "orm will beused and sometime JG will be used!

These basic operations can be combined to give e&pressions!

E6ample :
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0 /therwise

#HCG @ C * i" G F * or F *

0 /therwise

#G @ * i" G F 0

0 /therwise

Truth Tables

Truth tables are a means o" representing the results o" a logic "unction usinga table! They are constructed by de"ining all possible combinations o" the

inputs to a "unction, and then calculating the output "or each combination inturn! Cor the three "unctions we have Hust de"ined, the truth tables are as"ollows!

AND


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C FHCG

0 0 0

0 * 0

* 0 0

* * *

$4

C FHCG

0 0 0

0 * *

* 0 *

* * *

N$T

FG


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0 *

* 0

Truth tables may contain as many input variables as desired

FHCHG @ 3C

C FHCHG

0 0 0 0

0 0 * *

0 * 0 0

0 * * *

* 0 0 0

* 0 * *

* * 0 *


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* * * *

Boolean S2itching Algebras

% 9oolean (witching %lgebra is one which deals only with two-valuedvariables! 9oole5s general theory covers algebras which deal with variableswhich can hold n values!

A6ioms

$onsider a set S @ J +3 1K

$onsider two binary operations, and ! , and one unary operation, -- , thatact on these elements! LSH 3H H ))H +H 1Mis called a switching algebra thatsatis"ies the "ollowing a&ioms (

!losure

I" G ( and ( then G! (

I" G ( and ( then G (

Identity


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an identity 0 "or such that G 0 F G

an identity * "or ! such that G ! * F G

!ommutati/e a2s

G F G

G ! F ! G

Distributi/e a2s

G! K 4 F G! G!K

G !K F G 4 ! G K4

!omplement


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G ( a complement G5such that

G G5 F *

G ! G5 F 0

The complement G5 is uni#ue!

Theorems

% number o" theorems may be proved "or switching algebras

Idempotent a2

G G F G

G ! G F G

De;organs a2


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G 45 F G5 ! 5, These can be proved by the use o" truth tables!

Broo" o" G 45 F G5 ! 5

C C CG

0 0 0 *

0 * * 0

* 0 * 0

* * * 0

C C 3C

0 0 * * *

0 * * 0 0


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* 0 0 * 0

* * 0 0 0

The two truth tables are identical, and so the two e&pressions are identical!

G!4 F G5 5, These can be proved by the use o" truth tables!

Broo" o" G!4 F G5 5

C 3C 3CG

0 0 0 *

0 * 0 *

* 0 0 *

* * * 0


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C C C

0 0 * * *

0 * * 0 *

* 0 0 * *

* * 0 0 0

Note :Deorgans 6aws are applicable "or any number o" variables!

Boundedness a2

G * F *

G ! 0 F 0

Absorption a2

G G ! 4 F G


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G ! G 4 F G

Elimination a2

G G5 ! 4 F G

G!G5 4 F G!

ni%ue !omplement theorem

I" G F * and G! F 0 then G F 5

In/olution theorem

G55 F G

05 F *

Associati/e Properties


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G K4 F G 4 K

G ! ! K 4 F G ! 4 ! K

Duality Principle

In 9oolean algebras the duality Brinciple can be is obtained by interchanging%@D and /. operators and replacing 05s by *5s and *5s by 05s! $ompare theidentities on the le"t side with the identities on the right!

E6ample

G!K5 F G554!K

!onsensus theorem

G! G5!K !K F G! G5!K

or dual "orm as below


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G 4!G5 K4! K4 F G 4!G5 K4

Broo" o" G! G5!K !K F G! G5!K8

3C 3 C3 @ 3C 3

G! G5!K GG54!!K F G! G5!K

G!!*K4 G5!K!*4 F G! G5!K

G! G5!K F G! G5!K

G!5K4!G4!K F G!K!K instead o" G!K5!K

G!5KG!K!K

G!5G4!K

G4!K

G!K!K


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The term which is le"t out is called the consensus term!

Aiven a pair o" terms "or which a variable appears in one term, and itscomplement in the other, then the consensus term is "ormed by %@Ding theoriginal terms together, leaving out the selected variable and its complement!

'&ample 8

The consensus o" G! and G5!K is !K

The consensus o" G!!K and 5!K5!)5 is G!K4!K!)54

Shannon E6pansion Theorem

The (hannon '&pansion Theorem is used to e&pand a 9oolean logic "unctionC4 in terms o" or with respect to4 a 9oolean variable G4, as in the "ollowing

"orms!

C F G ! C G F *4 G5 ! C G F 04


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where C G F *4 represents the "unction C evaluated with G set e#ual to *; C

G F 04 represents the "unction C evaluated with G set e#ual to 0!

%lso the "ollowing "unction C can be e&panded with respect to G,

C F G5 ! G ! ! K5 G5 ! 5 ! K

F G ! ! K54 G5 ! 5 ! K4

Thus, the "unction C can be split into two smaller "unctions!

C G F 5*54 F ! K5

This is nown as the co"actor o" C with respect to G in the previous logice#uation! The co"actor o" C with respect to G may also be represented as C G


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the co"actor o" C with respect to G5 is C G5 4! Esing the (hannon '&pansionTheorem, a 9oolean "unction may be e&panded with respect to any o" itsvariables! Cor e&ample, i" we e&pand C with respect to instead o" G,

C F G5 ! G ! ! K5 G5 ! 5 ! K

F ! G5 G ! K54 5 ! G5 ! K4

% "unction may be e&panded as many times as the number o" variables itcontains until the canonical "orm is reached! The canonical "orm is a uni#uerepresentation "or any 9oolean "unction that uses only minterms! % mintermis a product term that contains all the variables o" CLsuch as G ! 5 ! K4!

%ny 9oolean "unction can be implemented using multiple&er blocs byrepresenting it as a series o" terms derived using the (hannon '&pansion

Theorem!

Summary o# a2s And Theorms


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Identity Dual

$perations 2ith + and 1

G 0 F G identity4 G!* F G

G * F * null element4 G!0 F 0

Idempotency theorem

G G F G G!G F G

!omplementarity

G G5 F * G!G5 F 0

In/olution theorem

G545 F G

!ummutati/e la2

G F G G! F G

Associati/e la2

G 4 K F G K4 F G K G4K F GK4 F GK


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Distributi/e la2

G K4 F G GK G K4 F G 4G K4

De;organs theorem

G K !!!45 F G55K5!!! or M " G*,G2,!!!,Gn,0,*,,! 4 N F M " G*5,G25,!!!,Gn5,*,0,!, 4 N

GK!!!45 F G5 5 K5 !!!

Simpli#ication theorems

G G5 F G uniting4 G 4G 54 F G

G G F G absorption4 GG 4 F G

G 54 F G adsorption4 G5 F G

!onsensus theorem

G G5K K F G G5KG 4G5 K4 K4 F G 4G5 K4

Duality

G K ! ! ! 4D F GK!!! orM"G*,G2,!!!,Gn,0,*,,!4ND F"G*,G2,!!!,Gn,*,0,!,4

GK !!!4DF G K !!!


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Shannon E6pansion Theorem

"G*,!!!,G,!!!Gn4G O "G*,!!!, * ,!!!Gn4 G5 O "G*,!!!,0 ,!!!Gn4

"G*,!!!,G,!!!Gn4PG "G*,!!!, 0 ,!!!Gn4Q O PG5 "G*,!!!, *,!!!Gn4Q

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Algebraic ;anipulation

;interms and ;a6terms

%ny boolean e&pression may be e&pressed in terms o" either minterms orma&terms! To do this we must "irst de"ine the concept o" a literal! % literal is asingle variable within a term which may or may not be complemented! Cor an
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e&pression with @ variables, minterms and ma&terms are de"ined as "ollows 8 % minterm is the product o" @ distinct literals where each literal occurs

e&actly once!

% ma&term is the sum o" @ distinct literals where each literal occurse&actly once!

Cor a two-variable e&pression, the minterms and ma&terms are as "ollows

C ;interm ;a6term

0 0 G5!5 G

0 * G5! G5

* 0 G!5 G5

* * G! G55

Cor a three-variable e&pression, the minterms and ma&terms are as "ollows

C ;interm ;a6term
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0 0 0 G5!5!K5 GK

0 0 * G5!5!K GK5

0 * 0 G5!!K5 G5K

0 * * G5!!K G5K5

* 0 0 G!5!K5 G5K

* 0 * G!5!K G5K5

* * 0 G!!K5 G55K

* * * G!!K G55K5

This allows us to represent e&pressions in either (um o" Broducts or Broducto" (ums "orms

Sum $# Products S$PG

The (um o" Broducts "orm represents an e&pression as a sum o" minterms!


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FH CH 333G @ Sum a-3m-G

where ais 0 or * and mis a minterm!

To derive the (um o" Broducts "orm "rom a truth table, /. together all o" theminterms which give a value o" *!

E6ample ) S$P

$onsider the truth table

C F ;interm

0 0 0 G5!5

0 * 0 G5

* 0 * G!5

* * * G!


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C F ;a6term

0 0 * G

0 * 0 G5

* 0 * G5

* * * G55


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0 * 0 0

0 * * *

* 0 0 0

* 0 * *

* * 0 *

* * * 0

!on/ersion bet2een P$S and S$P

$onversion between the two "orms is done by application o" Deorgans6aws!

Simpli#ication

%s with any other "orm o" algebra you have encountered, simpli"ication o"e&pressions can be per"ormed with 9oolean algebra!

E6ample


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(how that G!!K5 G5!!K5 !K F

G!!K5 G5!!K5 !K F !K5 !K F

E6ample

(how that G!5 K4!G 4!K F G!K !K

G!5 K4!G 4!K

F G!5 K!G 5!K4!K

F G!5K K!G 5!K

F K!G!5 G 54

F K!G54


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ogic !ircuitsPart)III
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Dec-30-2007


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ogic !ircuits

9oolean algebra is ideal "or e&pressing the behavior o" logic circuits!

% circuit can be e&pressed as a logic design and implemented as a collection

o" individual connected logic gates!

Fi6ed ogic Systems

% "i&ed logic system has two possible choices "or representing true and "alse!

Positi/e ogic

In a positive logic system, a high voltage is used to represent logical true *4,and a low voltage "or a logical "alse 04!

Negati/e ogic

In a negative logic system, a low voltage is used to represent logical true *4,


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ogic "ates
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Inversionultiple Input Aates

Aates Types%@D Aate

(witch .epresentation o" %@D AateThree Input %@D gate

/. Aate

(witch .epresentation o" /. AateThree Input /. gate

@/T Aate9EC Aate@%@D Aate@/. AateG/. Aate

G@/. Aate

ni/ersal "ates

.ealiation o" logic "unction using @%@D gates

.ealiation o" logic gates using @%@D gates

Implementing an inverter using @%@D gateImplementing %@D using @%@D gatesImplementing /. using @%@D gatesImplementing @/. using @%@D gates

.ealiation o" logic "unction using @/. gates

.ealiation o" logic gates using @/. gates

Implementing an inverter using @/. gateImplementing %@D using @/. gatesImplementing /. using @/. gatesImplementing @%@D using @/. gates
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ogic "ates

% logic gate is an electronic circuit=device which maes the logical decisions!To arrive at this decisions, the most common logic gates used are /., %@D,@/T, @%@D, and @/. gates! The @%@D and @/. gates are calleduniversal gates! The e&clusive-/. gate is another logic gate which can beconstructed using %@D, /. and @/T gate!

6ogic gates have one or more inputs and only one output! The output isactive only "or certain input combinations! 6ogic gates are the building blocso" any digital circuit! 6ogic gates are also called switches! )ith the advent o"integrated circuits, switches have been replaced by TT6 TransistorTransistor 6ogic4 circuits and $/( circuits!


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% small circle on an input or an output indicates inversion! (ee the @/T,@%@D and @/. gates given below "or e&amples!

;ultiple Input "ates

Aiven commutative and associative laws, many logic gates can beimplemented with more than two inputs, and "or reasons o" space in circuits,usually multiple input, comple& gates are made! ou will encounter suchgates in real world maybe you could analye an %(I$ lib to "ind this4!

"ates Types

%@D

/. @/T
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9EC @%@D @/. G/.

G@/.

AND "ate

The %@D gate per"orms logical multiplication, commonly nown as %@D"unction! The %@D gate has two or more inputs and single output! The outputo" %@D gate is


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Truth Table

C F@3CG

0 0 0

0 * 0

* 0 0

* * *

Two input %@D gate using Rdiode-resistorR logic is shown in "igure below,where G, are inputs and C is the output!


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!ircuit

I" G F 0 and F 0, then both diodes D* and D2 are "orward biased and thusboth diodes conduct and pull C low!

I" G F 0 and F *, D2 is reverse biased, thus does not conduct! 9ut D* is"orward biased, thus conducts and thus pulls C low!

I" G F * and F 0, D* is reverse biased, thus does not conduct! 9ut D2 is"orward biased, thus conducts and thus pulls C low!

I" G F * and F *, then both diodes D* and D2 are reverse biased and thusboth the diodes are in cut-o"" and thus there is no drop in voltage at C! Thus C

is S2itch 4epresentation o# AND "ate


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In the "igure below, G and are two switches which have been connected inseries or Hust cascaded4 with the load 6'D and source battery! )hen bothswitches are closed, current "lows to 6'D!

Three Input AND gate

(ince we have already seen how a %@D gate wors and I will Hust list thetruth table o" a 3 input %@D gate! The "igure below shows its symbol and truth

table!

!ircuit

Truth Table

C F@3C3


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0 0 0 0

0 0 * 0

0 * 0 0

0 * * 0

* 0 0 0

* 0 * 0

* * 0 0

* * * *

$4 "ate

The /. gate per"orms logical addition, commonly nown as /. "unction!The /. gate has two or more inputs and single output! The output o" /.gate is


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symbol o" the /. gate is shown in the "igure below!

Symbol

Truth Table

C F@CG

0 0 0

0 * *

* 0 *


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* * *

Two input /. gate using Rdiode-resistorR logic is shown in "igure below,where G, are inputs and C is the output!

!ircuit

I" G F 0 and F 0, then both diodes D* and D2 are reverse biased and thusboth the diodes are in cut-o"" and thus C is low!

I" G F 0 and F *, D* is reverse biased, thus does not conduct! 9ut D2 is


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"orward biased, thus conducts and thus pulling C to

I" G F * and F 0, D2 is reverse biased, thus does not conduct! 9ut D* is"orward biased, thus conducts and thus pulling C to

I" G F * and F *, then both diodes D* and D2 are "orward biased and thusboth the diodes conduct and thus C is

S2itch 4epresentation o# $4 "ate

In the "igure, G and are two switches which have been connected inparallel, and this is connected in series with the load 6'D and source battery!)hen both switches are open, current does not "low to 6'D, but when anyswitch is closed then current "lows!


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Three Input $4 gate

(ince we have already seen how an /. gate wors, I will Hust list the truthtable o" a 3-input /. gate! The "igure below shows its circuit and truth table!

!ircuit

Truth Table

C F@C

0 0 0 0

0 0 * *

0 * 0 *

0 * * *

* 0 0 *

* 0 * *


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* * 0 *

* * * *

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Digital ogic "atesPart)II

Dec-30-2007

N$T "ate

The @/T gate per"orms the basic logical "unction called inversion orcomplementation! @/T gate is also called inverter! The purpose o" this gateis to convert one logic level into the opposite logic level! It has one input andone output! )hen a


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inversion! Truth table and @/T gate symbol is shown in the "igure below!

Symbol

Truth Table

C@

0 *

* 0

@/T gate using Rtransistor-resistorR logic is shown in the "igure below, where
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G is the input and C is the output!

!ircuit

)hen G F *, The transistor input pin * is


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)hen G F 0, the transistor input pin 2 is 6/)8 this produces no bias voltage

across the transistor base emitter Hunction! Thus oltage at C is BF "ate

9u""er or 9EC is also a gate with the e&ception that it does not per"orm anylogical operation on its input! 9u""ers Hust pass input to output! 9u""ers areused to increase the drive strength or sometime Hust to introduce delay! )ewill loo at this in detail later!

I" G is the input, then output C can be represented mathematically as C F G!Truth table and symbol o" the 9u""er gate is shown in the "igure below!

Symbol


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Truth Table

C@

0 0

* *

NAND "ate

@%@D gate is a cascade o" %@D gate and @/T gate, as shown in the "igurebelow! It has two or more inputs and only one output! The output o" @%@Dgate is


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I" G and are two inputs, then output C can be represented mathematicallyas C F G!45,


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Truth Table

C F@3CG

0 0 *

0 * *

* 0 *

* * 0

N$4 "ate

@/. gate is a cascade o" /. gate and @/T gate, as shown in the "igurebelow! It has two or more inputs and only one output! The output o" @/.gate is


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I" G and are two inputs, then output C can be represented mathematicallyas C F G45; here plus 4 denotes the /. operation and 54 denotesinversion! Truth table and symbol o" the @/. gate is shown in the "igurebelow!

Truth Table

C F@CG

0 0 *

0 * 0

* 0 0

* * 0


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$4 "ate

%n '&clusive-/. G/.4 gate is gate with two or three or more inputs andone output! The output o" a two-input G/. gate assumes a


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Symbol

Truth Table

C F@ CG


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0 0 0

0 * *

* 0 *

* * 0

N$4 "ate

%n '&clusive-@/. G@/.4 gate is gate with two or three or more inputs andone output! The output o" a two-input G@/. gate assumes a


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Truth Table

C F@ CG

0 0 *

0 * 0

* 0 0

* * *


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ni/ersal "ates

Eniversal gates are the ones which can be used "or implementing any gatelie %@D, /. and @/T, or any combination o" these basic gates; @%@D and

@/. gates are universal gates! 9ut there are some rules that need to be"ollowed when implementing @%@D or @/. based gates!

To "acilitate the conversion to @%@D and @/. logic, we have two newgraphic symbols "or these gates!

NAND "ate

N$4 "ate
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4ealiOation o# logic #unction using NAND gates

%ny logic "unction can be implemented using @%@D gates! To achieve this,"irst the logic "unction has to be written in (um o" Broduct (/B4 "orm! /ncelogic "unction is converted to (/B, then is very easy to implement using@%@D gate! In other words any logic circuit with %@D gates in "irst level and

/. gates in second level can be converted into a @%@D-@%@D gate circuit!

$onsider the "ollowing (/B e&pression

C F )!G! G!!K !K!)

The above e&pression can be implemented with three %@D gates in "irststage and one /. gate in second stage as shown in "igure!
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I" bubbles are introduced at %@D gates output and /. gates inputs thesame "or @/. gates4, the above circuit becomes as shown in "igure!


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@ow replace /. gate with input bubble with the @%@D gate! @ow we have

circuit which is "ully implemented with Hust @%@D gates!

4ealiOation o# logic gates using NAND gates

Implementing an in/erter using NAND gate

Input $utput 4ule


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G!G45 F G5 Idempotent

Implementing AND using NAND gates

Input $utput 4ule

G45G4545 F G4545 Idempotent

F G4 Involution

Implementing $4 using NAND gates


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Input $utput 4ule

GG454545 F G5545 Idempotent

F G5555 Deorgan

F G Involution

Implementing N$4 using NAND gates

Input $utput 4ule


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GG454545 FG5545 Idempotent

FG5555 Deorgan

FG Involution

FG45 Idempotent

4ealiOation o# logic #unction using N$4 gates

%ny logic "unction can be implemented using @/. gates! To achieve this,"irst the logic "unction has to be written in Broduct o" (um B/(4 "orm! /nceit is converted to B/(, then it5s very easy to implement using @/. gate! Inother words any logic circuit with /. gates in "irst level and %@D gates insecond level can be converted into a @/.-@/. gate circuit!

$onsider the "ollowing B/( e&pression


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C F G4 ! K4

The above e&pression can be implemented with three /. gates in "irst stageand one %@D gate in second stage as shown in "igure!

I" bubble are introduced at the output o" the /. gates and the inputs o" %@Dgate, the above circuit becomes as shown in "igure!


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@ow replace %@D gate with input bubble with the @/. gate! @ow we havecircuit which is "ully implemented with Hust @/. gates!

4ealiOation o# logic gates using N$4 gates


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Implementing an in/erter using N$4 gate

Input $utput 4ule

GG45 F G5 Idempotent

Implementing AND using N$4 gates

Input $utput 4ule

GG454545 FG5545 Idempotent

F G55!55 Deorgan


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F G!4 Involution

Implementing $4 using N$4 gates

Input $utput 4ule


F G Involution


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Implementing NAND using N$4 gates

Input $utput 4ule


F G Involution

F G45 Idempotent


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Introduction

.arnaugh ;aps

inimiation Techni#ue2-ariable S-ap

'#uivalent labeling

'&ample- $arry and (um o" a hal" adderArouping=$ircling S-maps

'&ample o" invalid groups'&ample - G5G'&ample - G5GG5

3-ariable S-ap

'&ample'&ample

>-ariable S-ap

'&ample

'&ample?-ariable S-ap

Inverse Cunction

7INE);c!S.EC ;INI;IATI$N
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inimiation Techni#ue

'&ample

(earch


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Introduction

(impli"ication o" 9oolean "unctions is mainly used to reduce the gate count o"a design! 6ess number o" gates means less power consumption, sometimesthe circuit wors "aster and also when number o" gates is reduced, cost alsocomes down!

There are many ways to simpli"y a logic design, some o" them are givenbelow! )e will be looing at each o" these in detail in the ne&t "ew pages!

%lgebraic (impli"ication! -(impli"y symbolically using theorems=postulates! -.e#uires good sills Sarnaugh aps! -Diagrammatic techni#ue using 5enn-lie diagram5!

-6imited to no more than variables!

)e have already seen how %lgebraic (impli"ication wors, so letsconcentrate on Sarnaugh aps or simply -maps!


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*)8ariable .);ap

In any S-ap, each s#uare represents a minterm! %dHacent s#uares alwaysdi""er by Hust one literal (o that the uni"ying theorem may apply8 G G5 F *4!Cor the 2-variable case e!g!8 variables G, 4, the map can be drawn asbelow! Two variable map is the one which has got only two variables as input!

E%ui/alent labeling

S-map needs not "ollow the ordering as shown in the "igure above! )hat thismeans is that we can change the position o" m0, m*, m2, m3 o" the above"igure as shown in the two "igures below!

Bosition assignment is the same as the de"ault -maps positions! This is theone which we will be using throughout this tutorial!


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=)8ariable .);ap

There are * cells in a >-variable ), G, , K4; S-map as shown in the "igurebelow!

There are 2 wrap-around8 a horiontal wrap-around and a vertical wrap-around! 'very cell thus has > neighbours! Cor e&ample, the cellcorresponding to minterm m0 has neighbours m*, m2, m> and m!


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7INE);c!S.EC ;INI;IATI$N

:uine-c$lusey minimiation method uses the same theorem to producethe solution as the S-map method, namely G54FG

;inimiOation Techni%ue

The e&pression is represented in the canonical (/B "orm i" notalready in that "orm!

The "unction is converted into numeric notation! The numbers are converted into binary "orm! The minterms are arranged in a column divided into groups! 9egin with the minimiation procedure!

- 'ach minterm o" one group is compared with each minterm in the

group immediately below! - 'ach time a number is "ound in one group which is the same as a

number in the group below e&cept "or one digit, the numbers pair isticed and a new composite is created!

- This composite number has the same number o" digits as thenumbers in the pair e&cept the digit di""erent which is replaced by an

R&R!
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& ! The above procedure is repeated on the second column to generate a

third column! The ne&t step is to identi"y the essential prime implicants, which can

be done using a prime implicant chart! - )here a prime implicant covers a minterm, the intersection o" the

corresponding row and column is mared with a cross! - Those columns with only one cross identi"y the essential prime

implicants! - These prime implicants must be in the "inal answer! - The single crosses on a column are circled and all the crosses on

the same row are also circled, indicating that these crosses arecovered by the prime implicants selected!

- /nce one cross on a column is circled, all the crosses on thatcolumn can be circled since the minterm is now covered!

- I" any non-essential prime implicant has all its crosses circled, theprime implicant is redundant and need not be considered "urther!

@e&t, a selection must be made "rom the remaining nonessentialprime implicants, by considering how the non-circled crosses can becovered best!

- /ne generally would tae those prime implicants which cover thegreatest number o" crosses on their row!

- I" all the crosses in one row also occur on another row whichincludes "urther crosses, then the latter is said to dominate the "ormerand can be selected!

- The dominated prime implicant can then be deleted!

E6ample


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Cind the minimal sum o" products "or the 9oolean e&pression, "F*,2,3,7,,+,*0,**,*>,*?4, using :uine-c$lusey method!

Cirstly these minterms are represented in the binary "orm as shown in thetable below! The above binary representations are grouped into a number o"sections in terms o" the number o" *5s as shown in the table below!

9inary representation o" minterms

;interms 8 ?

* 0 0 0 *

2 0 0 * 0

3 0 0 * *

7 0 * * *

* 0 0 0

+ * 0 0 *


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*0 * 0 * 0

** * 0 * *

*> * * * 0

*? * * * *

Aroup o" minterms "or di""erent number o" *5s

No o# 1s ;interms 8 ?

* * 0 0 0 *

* 2 0 0 * 0

* * 0 0 0

2 3 0 0 * *

2 + * 0 0 *

2 *0 * 0 * 0


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3 7 0 * * *

3 ** * 0 * *

3 *> * * * 0

> *? * * * *

%ny two numbers in these groups which di""er "rom each other by only onevariable can be chosen and combined, to get 2-cell combination, as shown inthe table below!

*)!ell combinations

!ombinations 8 ?

*,34 0 0 - *

*,+4 - 0 0 *

2,34 0 0 * -


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2,*04 - 0 * 0

,+4 * 0 0 -

,*04 * 0 - 0

3,74 0 - * *

3,**4 - 0 * *

+,**4 * 0 - *

*0,**4 * 0 * -

*0,*>4 * - * 0

7,*?4 - * * *

**,*?4 * - * *

*>,*?4 * * * -

Crom the 2-cell combinations, one variable and dash in the same positioncan be combined to "orm >-cell combinations as shown in the "igure below!


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=)!ell combinations

!ombinations 8 ?

*,3,+,**4 - 0 - *

2,3,*0,**4 - 0 * -

,+,*0,**4 * 0 - -

3,7,**,*?4 - - * *

*0,**,*>,*?4 * - * -

The cells *,34 and +,**4 "orm the same >-cell combination as the cells *,+4and 3,**4! The order in which the cells are placed in a combination does nothave any e""ect! Thus the *,3,+,**4 combination could be written as*,+,3,**4!

Crom above >-cell combination table, the prime implicants table can beplotted as shown in table below!


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Prime Implicants Table

PrimeImplicants

1 * 5 , ( ' 1+ 11 1= 1>

*,3,+,**4 G - G - - G - G - -

2,3,*0,**4 - G G - - - G G - -

,+,*0,**4 - - - - G G G G - -

3,7,**,*?4 - - - - - - G G G G

- G G - G G - - - G -

The columns having only one cross mar correspond to essential primeimplicants! % yellow cross is used against every essential prime implicant!The prime implicants sum gives the "unction in its minimal (/B "orm!

C @ 8 8? 8 ? ?


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ogicDec-30-2007
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Introduction

Decoders

9asic 9inary Decoder9inary n-to-2nDecoders

'&ample - 2-to-> 9inary Decoder'&ample - 3-to- 9inary Decoder

Implementing Cunctions Esing Decoders '&ample - Cull adder

Encoders

'&ample - /ctal-to-9inary 'ncoder'&ample - Decimal-to-9inary 'ncoder

Priority Encoder'&ample - >to3 Briority 'ncoder

;ultiple6er

echanical '#uivalent o" a ultiple&er' l 2 * EG
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'&ample - 2&* EG Design o" a 28* u&

'&ample 8 >8* EG

6arger ultiple&ers

'&ample - -to-* multiple&er "rom (maller EG'&ample - *-to-* multiple&er "rom >8* mu&

De)multiple6ers

echanical '#uivalent o" a De-ultiple&er

'&ample8 *-to-> De-multiple&er

Boolean Function Implementation

Implementing Cunctions ultiple&ers

'&ample8 3-variable Cunction Esing -to-* mu&'&ample8 3-variable Cunction Esing >-to-* mu&

'&ample8 2 to > Decoder using Demu&

;u6)Demu6 Application E6ample

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