1

Digital Control System

ADC MicroProcessor DAC Correction

Element Process

Clock

Measurement

+-

A D D A

A: AnalogD: Digital

2

Continuous Controller and Digital Control

Gc(s) PlantR(t) y(t)

Continuous Controller

+-

A/D DigitalController

D/A and Hold Plant

D/A

+-

r(t)

Digital Controller

y(t)r(kT) p(t)

m(t)m(kT)

3

Applications of Automatic ComputerControlled Systems

• Machine Tools• Metal Working Processes• Chemical Processes• Aircraft Control• Automobile Traffic Control• Automobile Air-Fuel Ratio• Digital Control Improves Sensitivity to Signal

Noise.

4

Digital Control System• A digital computer may serve as a compensator or controller in a

feedback control system. Since the computer receives data only at specific intervals, it is necessary to develop a method for describing and analyzing the performance of computer control systems.

• The computer system uses data sampled at prescribed intervals, resulting in a series of signals. These time series, called sampled data, can be transformed to the s-domain, and then to the z-domain by the relation z = ezt.

• Assume that all numbers that enter or leave the computer has thesame fixed period T, called the sampling period.

• A sampler is basically a switch that closes every T seconds for one instant of time.

5

r(t) r*(t)Continuous Sampled

Sampler

r(T)r(2T)

r(3T)

r(kT)

r(4T)

0 T 2T 3T

T 2T 3T

4T

4T

Zero-orderHoldGo(s)

P(t)

( )see

sssG

sTsT

−− −

=−=111)(0

6

Analog to Digital Conversion: SamplingAn input signal is converted from continuos-varying physical

value (e.g. pressure in air, or frequency or wavelength of light), by some electro-mechanical device into a

continuously varying electrical signal. This signal has a range of amplitude, and a range of frequencies that can present. This continuously varying electrical signal may then be converted to a sequence of digital values, called

samples, by some analog to digital conversion circuit.

• There are two factors which determine the accuracy with which the digital sequence of values captures the original continuous signal: the

maximum rate at which we sample, and the number of bits used in each sample. This latter value is known as the quantization level

7

Zero-Order Hold• The Zero-Order Hold block samples and holds

its input for the specified sample period. The block accepts one input and generates one output, both of which can be scalar or vector. If the input is a vector, all elements of the vector are held for the same sample period.

• This device provides a mechanism for discretizing one or more signals in time, or resampling the signal at a different rate. The sample rate of the Zero-Order Hold must be set to that of the slower block. For slow-to-fast transitions, use the Unit Delay block.

8

The z-TransformThe z-Transform is used to take discrete time domain signals into a complex-

variable frequency domain. It plays a similar role to the one the Laplacetransform does in the continuous time domain. The z-transform opens up new ways of solving problems and designing discrete domain applications. The z-transform converts a discrete time domain signal, which is a sequence of real

numbers, into a complex frequency domain representation.

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9

Transfer Function of Open-Loop System

Zero-orderHold Go(s) Processr(t) T=1 r*(t)

( )

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10

Closed-Loop Feedback Sampled-Data Systems

G(z)r(t) R(z) E(z) Y(z)

Y(z)

)()(1)()(

)(1)()(

)()(

zDzGzDzG

zGzGzT

zRzY

+=

+==

G(z)R(z) E(z) Y(z)

Y(z)

D(z)

11

Now Let us Continue with the Closed-Loop System for the Same Problem

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12

Stability Analysis in the z-PlaneA linear continuous feedback control system is stable if all poles of the

closed-loop transfer function T(s) lie in the left half of the s-plane.

In the left-hand s-plane, σ < 0; therefore, the related magnitude of zvaries between 0 and 1. Accordingly the imaginary axis of the s-plane corresponds to the unit circle in the z-plane, and the inside of the unit

circle corresponds to the left half of the s-plane.

A sampled system is stable if all the poles of the closed-loop transfer function T(z) lie within the unit circle of the z-plane.

Tzez

eezT

TjsT

ω

σ

ωσ

=∠

=

== + )(

13

Example 13.5: Stability of a closed-loop system

Gp(s)r(t) Y(t)

Go(s)

gain. of valuesallfor stableis continuous thegain where increasedfor unstable is system sampledorder -Second

39.2 0 :for stable is system Thisunstable)( )295.1115.1( )295.1115.1(012.3310.22

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0)1(2 :0G(z)][1

equation theof roots theare (z)function t transfer loop-losed theof poles The)1(2

)(

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14

Design Procedure• Start with continuous system.

• Add sampled-data system elements.

• Chose sample period, usually small but not too small. Use sampling period T = 1 / 10 fB, where fB = ωB / 2πwhere ωB is the bandwidth of the closed-loop system.

• Digitize control law.

• Check performance using discrete model or SIMULINK.

15

Start with a Continuous Design; D(s) may be given as an existing design or by using root locus or bode design.

G(z)r(t) R(z)

E(z)

Y(z)

Y(z)

D(z)

16

Add Samples Necessary for Digital Control• Transform D(s) to D(z): We will obtain a discrete system

with a similar behavior to the continuous one.

• Include D/A converter, usually a zero-order-device.

• Include A/D converter modeled as an ideal sampler.

• And an antialiasing filter, a low pass filter, unity gain filter with a sharp cutoff frequency.

• Chose a sample frequency ωB based on the closed-loop bandwidth of the continuous system.

17

Closed-Loop System with Digital Computer Compensation

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18

Compensation Networks (10.3; page 557)The compensation network, Gc(s) is cascaded with the unalterable process

G(s) in order to provide a suitable loop transfer function Gc(s)G(s)H(s).

G(s)R(s)

Gc(s)+-

H(s)

Y(s)

Compensation

( )

network lead-phase a called isnetwork thep,zWhen

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19

Closed-Loop System with Digital Computer CompensationThere are two methods of compensator design: (1) the Gc(s)-to-D(z)

conversion method, and (2) the root locus z-plane method.

The Gc(s)-to-D(z) conversion method

( )( ) 0 when 11 ;;

transform)-(z )()}({

)Controller (Digital )(

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=

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=

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20

Example 13.7: Design to meet a phase margin specification

( )

)73.0()95.0(85.4)(4.85; and 0.73,0.312-e ,95.005.0

have Wesecond. 0.001 Set ).(by realized be tois )(r compensato theNow5.6. Then rad/s. 125 when 1)( yield order toin select We

)312()50()(;312 and 50 ,587) page (see 2

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21

The Root Locus of Digital Control Systems

D(z)ZeroOrderhold

KGp(s)R(s)

+-

Y(s)

okozDzKGzDzKGzDzKG

zDzKGzDzKGzDzKG

zRzY

360180)()( and 1)()(or 0)()(1 4.

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equation) istic(Character 0)()(1 ;)()(1

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22

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Im {z}

2 poles at z = 1

0-1

One zeroAt z = -1

-3 -2

Root locus

1;3;0)(

)()1()1(

for solve and Let

0)1(

)1(1)(1

21

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2

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=

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ddF

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K increasingUnstable

SystemOrder Second a of LocusRoot

23

Design of a Digital Controller

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axis real positive on the lies that G(z)at pole one cancel toa)-(z Use)()()( controller aselect willwe

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24

Example 13.9: Design of a digital compensator

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-2.56.z aspoint entry obtain the we),(for equation theUsing)2.0)(1(

)1()()( have we

0.2, and 1 select weIf)()1())(1()()(

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2

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=−−+

=

==−−−+

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zzzkzDzKG

babzzazzKzDzKG

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σ

25

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=

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26

+10.2-1

Unit circle

K=0.8

Im{z}

Re{z}

K increasing

Entry point atz = -2.56

Root locus

27

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2

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28

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