Digital Circuits (2)

Embed Size (px)

Citation preview

  • 8/22/2019 Digital Circuits (2)

    1/49

    Representation of Boolean Expressions

    x y min term

    0 0 x . y m00 1 x . y m11 0 x . y m21 1 x . y m3

    0 0 00 1 11 0 11 1 0

    x y f1

    1f = . .x y x y 1 1 2f = m m 1f = (1,2)

    2f = (0,2,3) ? 2f = . . .x y x y x y

    A minterm is a product that contains all the variables used in a function

  • 8/22/2019 Digital Circuits (2)

    2/49

    Three variable functions

    y z min terms

    0 0 0 x . y . z0 0 1 x . y . z0 1 0 x . y . z0 1 1 x . y . z1 0 0 x . y . z

    1 0 1 x . y . z1 1 0 x . y . z1 1 1 x . y . z

    x

    m0m1m2m3m4m5m6m7

    2f = (1,4,7) ?

    2f = . . . . . .x y z x y z x y z

  • 8/22/2019 Digital Circuits (2)

    3/49

    Product of Sum Terms Representation

    0 0 00 1 11 0 11 1 0

    x y f1

    1f =(x ).( )y x y

    x y

    0 0 x + y M00 1 x + y M11 0 x + y M21 1 x + y M3

    Max term

    1 1 2f = .M M 1f = (1,2)

    2f = (0,3) ?

    2f =(x ).( )y x y

  • 8/22/2019 Digital Circuits (2)

    4/49

    y zx Max. terms

    M0M1M2M3M4M5M6M7

    0 0 0 x + y + z0 0 1 x + y + z0 1 0 x + y + z0 1 1 x + y + z1 0 0 x + y + z

    1 0 1 x + y + z1 1 0 x + y + z1 1 1 x + y + z

    1f = (1,5,7) ?

    2f =(x ).( ).( )y z x y z x y z

  • 8/22/2019 Digital Circuits (2)

    5/49

    Simplification

    yx1 x2 x3

    0 0 0 00 0 1 10 1 0 00 1 1 1

    1 0 0 01 0 1 11 1 0 01 1 1 1

    1 2 3 1 2 3 1 2 3 1 2 3y= . . . . . . . .x x x x x x x x x x x x

    y= (1,3,5,7)

    y

    x1

    x2

    x3

    x1

    x2

    x3

    x2

    x3

    x1

    x2

    x3

    x1

    Simplification of Boolean expression yields : y = x3 !! which does not require any

    gates at all !

  • 8/22/2019 Digital Circuits (2)

    6/49

    Goal of Simplification

    1 2 3 1 2 3 1 2 3 1 2 3y= . . . . . . . .x x x x x x x x x x x x

    y

    x1

    x2

    x3

    x1

    x2

    x3

    x2

    x3

    x1

    x2

    x3

    x1

    Goal of simplification is to reduce the complexity of gate circuit. This requires that we

    minimize the number of gates. Since number of gates depends on number of minterms,

    one of the goals of simplification is to minimize the number of minterms in SOP

    expression

  • 8/22/2019 Digital Circuits (2)

    7/49

    1 2 3 1 2 3 1 2 3 1 2 3y= . . . . . . . .x x x x x x x x x x x x

    y

    x1

    x2

    x3

    x1

    x2

    x3

    x2

    x3

    x1

    x2

    x3

    x1

    1 3 1 2 3 1 2 3y= . . . . .x x x x x x x x

    y

    x1

    x2

    x3

    x2

    x3

    x1

    x1

    x3

    This circuit is simpler not just because it uses 4 gates instead of 5 but also because

    circuit-2 uses one 2-input and three 3-input gates as compared to five 3-input gates

    used in circuit-1

    SN

    SPx1

    SN

    x1

    x2

    SPx2

    VDD = 5V

    SN

    SPx1

    SN

    x1

    SP

    VDD = 5V

    x2

    SN

    SPx2

    x3

    x3

    yy

    2-input NAND3-input NAND

  • 8/22/2019 Digital Circuits (2)

    8/49

    Goal of Simplification

    1. Minimize number of product terms

    2. Minimize number of literals in each term

    In the SOP expression:

    Simplification Minimization

  • 8/22/2019 Digital Circuits (2)

    9/49

    Minimization

    1 2 3 1 2 3 1 2 3 1 2 3y= . . . . . . . .x x x x x x x x x x x x

    1 3 2 2 1 3 2 2y= . .( ) . .( )x x x x x x x x

    1 3 1 3y= . .x x x x

    1 1 3y=( ).x x x

    3y= x

    Principle used: x + x = 1

  • 8/22/2019 Digital Circuits (2)

    10/49

    f = . . .x y x y x y

    Apply the Principle: x + x = 1 to simplify

    f = .( ) .x y y x y

    f = .x x y

    How do we simplify further?

    f = . . . . . . .x y x y x y x y x y x y x y

    Principle used : x + x = x

    f = . . . .

    . ( ) ( ).

    x y x y x y x y

    x y y x x y x y

  • 8/22/2019 Digital Circuits (2)

    11/49

    Simplify1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

    1 2 3 4 1 2 3 4

    . . . . . . . . . . . .

    . . . . . .

    f x x x x x x x x x x x x x x x x

    x x x x x x x x

    Principle: x + x = 1 and x + x = x

    Need a systematic and simpler method for applying these two principles

    Karnaugh Map (K map) is a popular technique for carrying out simplification

    It represents the information in problem in such a way that the twoprinciples become easy to apply

  • 8/22/2019 Digital Circuits (2)

    12/49

    K-map representation of truth table

    x y min term

    0 0 x . y m00 1 x . y m11 0 x . y m21 1 x . y m3

    0

    1

    1

    0

    m0

    m3

    xy

    m2

    m1

    0 0 0

    0 1 11 0 11 1 0

    x y f1

    0

    1

    1

    0xy

    0 1

    1 0

  • 8/22/2019 Digital Circuits (2)

    13/49

    2f = (0,2,3) 01

    1

    0xy

    0 1

    1 1

    0

    1

    1

    0xy

    1

    1 0

    0

    f = . .x y x y

  • 8/22/2019 Digital Circuits (2)

    14/49

    3-variable K-map representation

    y z min terms

    0 0 0 x . y . z

    0 0 1 x . y . z0 1 0 x . y . z0 1 1 x . y . z1 0 0 x . y . z1 0 1 x . y . z1 1 0 x . y . z

    1 1 1 x . y . z

    x

    m0

    m1m2m3m4m5m6

    m7

    yz

    x 00 01 11

    0

    1

    10m0 m1 m3 m2

    m4 m5 m6m7

    0 0 0 00 0 1 10 1 0 00 1 1 11 0 0 01 0 1 11 1 0 0

    1 1 1 1

    x y z f yz

    x 00 01 11

    0

    1

    10

    0 1 1 0

    0 1 1 0

  • 8/22/2019 Digital Circuits (2)

    15/49

    yz

    x 00 01 110

    1

    101 0

    0 1 1 0

    01

    f = . . . . . . . .x y z x y z x y z x y z

    4 i bl K t ti

  • 8/22/2019 Digital Circuits (2)

    16/49

    w x y z

    0 0 00 0 0 1

    0

    min terms

    m0m1

    0 0 1 0 m2

    0 0 11 m3

    1 1 1 0 m14

    1 1 1 1 m15

    4-variable K-map representation

    yzwx 01 11

    11

    01

    00

    00 10

    10

    0 1 3 2

    4 5 7 6

    12 13 15 14

    8 9 1011

    yz

    1 01wx 01 11

    11

    01

    00 0

    00 10

    0 1 1 0

    1 0 10

    1 0 0010

    f =w. . . w. . . . . . . . .

    . . . . . . . . .

    x y z x y z w x y z w x y z

    w x y z w x y z w x y z

    Minimization using Kmap

  • 8/22/2019 Digital Circuits (2)

    17/49

    Minimization using Kmap

    2f = (2,3)0

    1

    1

    0xy

    0

    1 1

    0

    f = . .x y x y

    f = .( )x y y

    f = x

    Combine terms which differ in only one bit position. As a result, whatever is

    common remains.

  • 8/22/2019 Digital Circuits (2)

    18/49

    0

    1

    1

    0xy

    10

    0 1

    f = . .x y x y

    f = ( . ).x x y f = y

    0

    1

    1

    0xy

    1 0

    1 0

    f = y

    0

    1

    1

    0xy

    1

    00

    1

    f =x

  • 8/22/2019 Digital Circuits (2)

    19/49

    2f = (0,2,3) 01

    1

    0xy

    0 1

    1 1

    f = . . .x y x y x y

    f = .( ) .

    .

    x y y x y

    x x y

    f = . .

    ( ).

    x x y x y

    x x x y

    x y

    The idea is to cover all the 1s with as few and as simple terms as possible

    3 i bl i i i ti

  • 8/22/2019 Digital Circuits (2)

    20/49

    yz

    x 00 01 11

    0

    1

    101 0

    0 1 1 0

    01

    3-variable minimization

    f = . . . . . . . .x y z x y z x y z x y z

    .x z

    .y z

    f = . . . .x y z y z x z

    3 i bl i i i ti

  • 8/22/2019 Digital Circuits (2)

    21/49

    yz

    x 00 01 11

    0

    1

    10

    0 1 1 0

    1 00 1

    3-variable minimization

    f = . . . . . . . .x y z x y z x y z x y z

    .x z

    .x z

    f = . .x z x z

    3 i bl i i i ti

  • 8/22/2019 Digital Circuits (2)

    22/49

    yz

    x 00 01 11

    0

    1

    10

    1 1

    00

    1 1

    0 0

    3-variable minimization

    f = . . . . . . . .x y z x y z x y z x y z

    .x y.x y

    f = . .x y x y

    f = .( )x y y x

    yzx 00 01 11

    0

    1

    10

    1 1

    00

    1 1

    0 0

    x

  • 8/22/2019 Digital Circuits (2)

    23/49

    yzx 00 01 11

    0

    1

    10

    1 1 1 1

    0 0 0 0 x

    yzx 00 01 11

    0

    1

    10

    1 1

    0 01 1

    0 0

    z

    yzx 00 01 11

    0

    1

    10

    1

    1

    0 0

    0 0

    1

    1

    z

    yzx 00 01 11

    0

    1

    10

    1

    1

    0 01

    1 1 1z

    x

    f =x z

  • 8/22/2019 Digital Circuits (2)

    24/49

    yz

    x 00 01 11

    0

    1

    100 0

    1 1 1

    0

    0

    0

    Can we do this ?

    Note that each encirclement should represent a single product term. In this case it

    does not.

    f = . . . . . .

    . .

    x y z x y z x y z

    x y x z

    We do not get a single product term. In general we cannot make groups of 3 terms.

  • 8/22/2019 Digital Circuits (2)

    25/49

    yz

    x 00 01

    0

    1

    0 0

    1 1

    0

    0

    010 11

    0

    Can we use kmap with the following ordering of variables?

    Can we combine these two terms into a single term ?

    f = . . . .

    .( . . )

    x y z x y z

    x y z y z

    Note that no simplification is possible. Kmap requires information to be represented

  • 8/22/2019 Digital Circuits (2)

    26/49

    yz

    x 00 01

    0

    1

    00

    0

    10 11

    0

    1 1

    0 0

    These two terms can be combined into a single term but it is not easy to show

    that on the diagram.

    f = . . . .

    .( ). .

    x y z x y z

    x y y z x z

    Kmap requires information to be represented in such a way that it is easy to apply

    the principle 1x x

    variable minimization

  • 8/22/2019 Digital Circuits (2)

    27/49

    yz

    1 01wx 01 11

    11

    01

    00 000 10

    0 1 1 0

    1 0 10

    1 0 0010. .w x z

    -variable minimization

    . .w y z

    . .w y z

    f = . . . . . . . . . . . .w y z w x z w y z w x y z w x y z

    But is this the simplest expression ?

  • 8/22/2019 Digital Circuits (2)

    28/49

    yz

    1 01wx 01 11

    11

    01

    00 0

    00 10

    0 1 1 0

    1 0 10

    1 0 0010

    . . . . . . . .w x y z w x y z w x z

    yz

    1 01wx 01 11

    11

    01

    00 0

    00 10

    0 1 1 0

    1 0 10

    1 0 0010

    . . . . . . . .w x y z w x y z x y z

    -variable minimization

  • 8/22/2019 Digital Circuits (2)

    29/49

    yz

    1 01wx 01 11

    11

    01

    00 000 10

    0 1 1 0

    1 0 10

    1 0 0010. .w x z

    -variable minimization

    . .w y z

    . .w y z

    f = . . . . . . . . . .w y z w x z w y z w x z x y z

    . .w x z

    . .x y z

    Is this the best that we can do ?

    Cover the 1s with minimum number of terms

  • 8/22/2019 Digital Circuits (2)

    30/49

    yz

    1 01wx

    01 11

    11

    01

    00 0

    00 10

    0 1 1 0

    1 0 10

    1 0 0010

    f = . . . .

    . . . . . .

    w y z w x z

    w y z w x z x y z

    yz

    1 01wx

    01 11

    11

    01

    00 0

    00 10

    0 1 1 0

    1 0 10

    1 0 0010

    Cover the 1 s with minimum number of terms

    f = . . . .

    . . . .

    w y z w x z

    w x z x y z

    -variable minimization

  • 8/22/2019 Digital Circuits (2)

    31/49

    yz

    01wx 01 11

    11

    01

    00 0

    00 10

    1 0

    0 0

    1 0 010

    1

    0

    0

    0 0

    1

    -variable minimization

    yz

    01wx 01 11

    11

    01

    00 0

    00 10

    1 0

    0 0

    1 0 010

    1

    0

    0

    0 0

    1

    f = . . . . . .w x y w x z w y z

    f = . . . . . .w x y w x z x y z

    Groups of 4

  • 8/22/2019 Digital Circuits (2)

    32/49

    Groups of 4yz

    0wx 01 11

    11

    01

    00

    00 10

    1

    0

    010

    1

    0

    0 0

    0

    1 1

    0 0

    1

    1

    1

    .w x

    .y z

    yz

    0wx 01 11

    11

    01

    00

    00 10

    1

    10

    0

    0 0

    0

    1

    0 0

    1

    1

    0 0

    1

    1

    0

    .x z

    .w z

  • 8/22/2019 Digital Circuits (2)

    33/49

    yz

    0wx 01 11

    11

    01

    00

    00 10

    10

    00

    0 0

    0

    1 0 0 1

    1 0 0 1

    0 0

    yzwx 01 11

    11

    01

    00

    00 10

    10

    0

    0 0

    0 0

    01 1

    1 1

    0 0

    0 0

    0 0

    yz

    0wx 01 11

    11

    01

    00

    00 10

    10

    0 0

    0

    0 01

    0 0

    1

    1 1

    0 0

    0 0

    yz

    0wx 01 11

    11

    01

    00

    00 10

    10

    0 0

    0

    0 0

    1

    01 1

    1

    0

    0

    0

    00

    .x z .x z

    .x z??

    Groups of 8

  • 8/22/2019 Digital Circuits (2)

    34/49

    Groups of 8

    yz

    0wx 01 11

    11

    01

    00

    00 10

    1

    10

    0

    0

    1

    0 0

    1

    1

    1

    1

    1

    1

    0

    00 z

    yz

    0wx 01 11

    11

    01

    00

    00 10

    1

    10

    0

    1

    0 0

    1 1

    1 1

    1 1

    0 0

    0 0

    x

    yzwx 01 11

    11

    01

    00

    00 10

    10

    1 1

    1 1

    0 0

    0 0

    1

    1

    1

    1

    0 0

    0 0

    z

    yzwx 01 11

    11

    01

    00

    00 10

    10

    1

    1

    1

    1

    0 0

    0 0

    1 1

    1 1

    0 0

    0 0

    x

    Examples

  • 8/22/2019 Digital Circuits (2)

    35/49

    Examples

    yz

    wx01 11

    11

    01

    00

    00 10

    1

    10

    0

    1

    0

    1 1

    1 1

    1 1

    0

    0 0

    1 1

    1

    yz

    wx01 11

    11

    01

    00

    00 10

    1

    10

    0

    0

    1 1

    1 1

    1 1

    0

    0 0

    1 1

    1

    0

    Dont care termsb d

  • 8/22/2019 Digital Circuits (2)

    36/49

    Don t care terms

    0 0 0

    0 0 0 1

    0

    0 0 1 0

    0 0 11

    a b c d

    1 1

    0

    0 1

    0 1

    1 0 0

    1 0

    1 0

    10

    1 0 0 0

    0 0 1

    0 1 0

    0 11

    1 1

    1

    1

    1 0 01 0

    1 0

    1

    1

    1

    1

    11

    1

    1

    0 1 0 0 0 0 0 0 0 0

    0 0 1 0 0 0 0 0 0 0

    0 0 0 1 0 0 0 0 0 0

    0 0 0 0 1 0 0 0 0 0

    y0y1y2y3y4y5y6y7y8y9

    0 0 0 0 0 1 0 0 0 0

    0 0 0 0 0 0 1 0 0 0

    0 0 0 0 0 0 0 1 0 0

    0 0 0 0 0 0 0 0 1 0

    0 0 0 0 0 0 0 0 0 1

    1 0 0 0 0 0 0 0 0 0

    x x x x x x x x x x

    x x x x x x x x x x

    x x x x x x x x x x

    x x x x x x x x x x

    x x x x x x x x x x

    x x x x x x x x x x

    a

    b

    c

    d

    y0y1y2y3

    y9

    Decimal

    Decoder

    01 11

    11

    01

    0000 10

    10 0

    ab

    cd

    0 0

    0 0 0 0

    x x x x

    x x

    10

    0

    Y3

    3 . . .y a b c d

  • 8/22/2019 Digital Circuits (2)

    37/49

    01 11

    11

    01

    00

    00 10

    10 0

    abcd

    0 0

    0 0 0 0

    x x x x

    x x

    10

    0

    Y3

    Dont care terms can be chosen as 0 or 1. Depending on the problem, we can

    choose the dont care term as 1 and use it to obtain a simpler Boolean expression

    3 . .y b c d

    Dont care terms should only be included in encirclements if it helps in obtaining a

    larger grouping or smaller number of groups.

    Minimization of Product of Sum Terms using Kmap

  • 8/22/2019 Digital Circuits (2)

    38/49

    Minimization of Product of Sum Terms using Kmap

    0

    1

    1

    0xy

    0 1

    1 1

    f = . .

    ( ).

    x x y x y

    x x x y

    x y

    01

    1

    0x

    y

    0 1

    1 1

    f = x y

    0

    1

    1

    0xy

    10

    0 1

    f = y

  • 8/22/2019 Digital Circuits (2)

    39/49

    0

    1

    1

    0xy

    1 0

    1 0

    f = y

    0

    1

    1

    0xy

    1

    00

    1

    f =x

    yzx 00 01 11

    0

    1

    10

    0 1 1 0

    1 00 1

    .x zx z

    f =( . ).( )x z x z f = . .x z x z

  • 8/22/2019 Digital Circuits (2)

    40/49

    yzwx 01 11

    11

    01

    00

    00 10

    1

    10

    0

    1

    0

    1

    1 1

    1 1

    0 0

    1 1

    0

    0

    0

    x y z x y z

    w y z

    w x

    f =( ).( ).( ).( )x y z x y z w y z w x

    Example

  • 8/22/2019 Digital Circuits (2)

    41/49

    yzwx 01 11

    11

    01

    00

    00 10

    10

    1

    1

    1 1

    1

    10

    0 x

    x

    0

    x

    x1

    1

    1

    p

    Obtain the minimized PoS by suitably using dont care terms

    f =( ).( ).( )x w z x w y y z

    Design Flow x

  • 8/22/2019 Digital Circuits (2)

    42/49

    Design Flow

    System Description

    Truth Table

    Boolean Expression

    MinimizedBoolean Expression

    Gate Netlist

    y

    zfsystem

    0 0 0 00 0 1 10 1 0 00 1 1 11 0 0 01 0 1 11 1 0 0

    1 1 1 1

    x y z f

    f = . . . . . . . .x y z x y z x y z x y z

    f = . .x z x z

    x

    y

    y

    z

    z

    x

    C

    Mapping of Boolean expression to a Network of gates available in the

  • 8/22/2019 Digital Circuits (2)

    43/49

    Library of available Gates Cost

    Inverter 1

    Two input NAND 2

    Three input NAND 3

    AND-OR-Invert 3CABY

    y

    x1

    x2

    x3

    x1

    x2

    x3

    x2

    x3

    x1

    x2

    x3

    x1

    library

    1 2 3 1 2 3 1 2 3 1 2 3y= . . . . . . . .x x x x x x x x x x x x

    Implementation using only NAND gates

  • 8/22/2019 Digital Circuits (2)

    44/49

    .x x x .x y.x y

    x

    yf = .x y x y

    A SoP expression is easily implemented with NAND gates. f = . . .a b c d g h

    a

    b

    c

    d

    g

    h

    f

    a

    b

    c

    d

    g

    h

    f

  • 8/22/2019 Digital Circuits (2)

    45/49

    a

    b

    c

    d

    g

    h

    f

    a

    b

    c

    d

    g

    h

    f

    a

    b

    c

    d

    g

    h

    f

    There is a one-to-one mapping between AND-OR network and NAND network

    Often there is lot of further optimization that can be done

  • 8/22/2019 Digital Circuits (2)

    46/49

    Consider implementation of XOR gate . .f A B A B

    . . . .

    ( ) ( )

    f A B B B A B A A

    B A B A A B

    Implementation using only NOR gates

  • 8/22/2019 Digital Circuits (2)

    47/49

    x x x x y x y

    x

    yf = .x y x y

    To implement using NOR gates, it is easiest to start with minimized Boolean expression

    in POS form

    f =( ).( ).( )a b c d g h

    f =( ).( ).( )a b c d g h

  • 8/22/2019 Digital Circuits (2)

    48/49

    a

    b

    cd

    g

    h

    f

    a

    b

    c

    d

    g

    h

    f

    a

    b

    c

    d

    g

    h

    f

    There is a one-to-one mapping between OR-AND network and NOR network

    To implement SoP expression using NOR gates, determine first the corresponding PoS

  • 8/22/2019 Digital Circuits (2)

    49/49

    expression and then follow the procedure outlined earlier

    Implement f(x,y,z)= . . using NOR gatesx z x z

    yzx 00 01 11

    0

    1

    10

    0 1 1 0

    1 00 1 f =( . ).( )x z x z

    x

    x

    z

    zf

    x

    zf

    z

    x