Differentiation in Flexible Data Center Interconnect

© Copyright 2016 Xilinx .

Industry Leadership Momentum

$2.38B FY15 revenue 3,500 employees world wide

>55% Market segment share

3500+ Patents 60 industry first

Leading Process technology 28nm, 20nm, 16nm 7nm

Founded 1984 20,000 customers

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© Copyright 2016 Xilinx .

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Momentum in Multi-Market Growth Drivers

Smarter. Connected. Differentiated.

Cloud Computing Embedded Vision Industrial IoT 5G Wireless

© Copyright 2016 Xilinx .

On Demand, Scalable, Efficient, SDN

Differentiation in Data Center Interconnect (DCI)

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© Copyright 2016 Xilinx .

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Why is Data Center Interconnect Needed?

Site limitations force DCs to be diversely located within

the metro

– Multiple DCs few kms away power from different sub-stations

Economically driven locations for data centers

– Reasons can be Subsidies, Power Cost, Environmental & Scale

Transactional magnification process

Large distances between user and data

Optimization of IT infrastructure spend

*:Source: Rise of High-Capacity Data Center Interconnect in Hyper-Scale Service Provider Systems by ACG Research Infinera Cloud Express Infograhic

© Copyright 2016 Xilinx .

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Why is Data Center Interconnect Needed?*

100G DCI ports needed as a % of number of servers in building

– 1.25% for hyperscale DC to 0.6% for medium size DC

– Eg. for hyperscale DC with 200,000 servers 2520, 100G ports 252 Tbps

*:Source: Rise of High-Capacity Data Center Interconnect in Hyper-Scale Service Provider Systems by ACG Research

© Copyright 2016 Xilinx .

Need to Connect Clouds to the Transport Boxes

Want Large Connections between devices – Physical Ports; carry a large pipe

– Maximize the use of Deployed Transport Gear

Address Router & Transport Asymmetry – Transport is expensive, maximize entire Link Budget

– Decouples Router and Transport developments

Seamless Mechanism to Aggregate Ports to a Single Link – Channelization to address future MLG applications

Facilitate Bandwidth on Demand – Easily Grow, Shrink

– Add and Tear down links for BWoD

Transport Today

Transport 2017

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Diagram Source: Ethernet Alliance

© Copyright 2016 Xilinx .

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DCI Transport: Automation Network Discovery – Key for Mega DCs

DCI customers want to be able to control the entire link through SDN (high level

orchestration)

SDN controller should be able to know the details about all connectivity between the link

– Routers talk to each other with LLDP (Link Layer Discovery Protocol)

– Automatically detect which ports are connected & can create a map of the connection

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Management Entity(SDN)

© Copyright 2016 Xilinx .

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Security is Critical

Everyone wants to secure their communication

– Data Center are trying to make sure their data is secure

– Today DCs are very secure inside the building

• See Google’s DC videos (Biometric entrances etc.)

– But what about the data between Data Centers?

Need for security is key

– Security requirements are changing and evolving

– Security function to be in the FPGA

• MACSec or Bulk Encryption

Involve Xilinx into network security architecture discussion

– We can help you push this angle … this is a key differentiator

© Copyright 2016 Xilinx .

Router to Transport

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Data Center Interconnect Value Proposition: FlexE System Value

Efficient LAG - Match Transport Bandwidth

Increase Interfaces Reliability

Flexibility for Any Speed, Any Client, Any Network & Custom Rates

Break-through in Network Architecture & Integration w. Different Generations

Performance/Watt for Data Center Interconnect

5 Advantages

Break Ethernet and Transport Roadmap Marriage

Next Generation

Connectivity

Data Centers

interconnection

Transport

Infrastructure

Diagram Source: (1) Keynote_Layer0vsLayer1_SDN_Wellbrock.pdf @ POTE 2013 (Verizon; Glen Wellbrock)

(2) OFC 2016 – Cisco diagrams from presentation ‘FlexE, a New Reality’ (OFC Expo Theater, March 23rd 2016)

(2) (2)

(1)

© Copyright 2016 Xilinx .

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Generic Block Diagram

DCI boxes are simple

– Client optics on one side + line DSP and

optics on the other

Inside the FPGA want to have

– Fixed or Flex Ethernet on the client side +

FlexE on the line side (no need for OTN here)

– LLDP snooping

– Security features like MACSec & BULK

security

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© Copyright 2016 Xilinx .

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Simple 500G DCI Chip Based on Xilinx Virtex UltraScale+ FPGA

500G of DCI with future application space for security & aggregation Can scale to greater than 1Tb in VU13P device if no application space is needed

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Application Space in FPGA Fabric for the FUTURE

© Copyright 2016 Xilinx .

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FlexE Demo at OFC 2016

World’s first public demonstration of a FlexE equipment interoperation

Spirent n x 100G Test Set

FlexE +Traffic Analyzer &

Generator

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© Copyright 2016 Xilinx .

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The Xilinx Differentiating Advantage

Combining Software Intelligence with Flexible Hardware Optimization and Any-to-Any Connectivity

ALL PROGRAMMABLE

© Copyright 2016 Xilinx .

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Technology Leaders Join Forces to Bring an Open Acceleration

Framework to Data Centers and Other Markets

AMD, ARM, Huawei, IBM, Mellanox, Qualcomm, and Xilinx collaborate on new Cache Coherent

Interconnect for Accelerators (CCIX) that will allow multiple processor architectures and accelerators

to seamlessly share data

© Copyright 2016 Xilinx .

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Xilinx Expands its 16nm UltraScale+ Product Roadmap to Include

Acceleration Enhanced Technologies for the Data Center

Combines 16nm UltraScale+ programmable logic with HBM memory and new

accelerator interconnect technology for heterogeneous computing

Acceleration Enhanced FPGAs

© Copyright 2016 Xilinx .

Thank You.

Aerospace &

Defense

Industrial &

Medical

Test, Measure

& Emulation Automotive

Wireless

Communications

Audio

Video

Broadcast Consumer

Wired Comms &

Data Center

Contact (gillesg@Xilinx.com) to see

Xilinx’s Data Center Interconnect Demonstration

Video1: FlexE 200G & 300G - Video2: Tier 1 platform

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