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7/31/2019 DC to DC Converter Using ZVS [Compatibility Mode]
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DESIGN AND IMPLEMENTATION OF
FOUR SWITCH
-
Presented by
.
Asst Professor
EEED-BVRIT.
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ABSTRACT
e new our-sw c - conver er opo ogy s
especially well suited for power converters operating from high
input voltage; it imposes only half of the input voltage across each of
the four switches.The two legs of a full-bridge converter are connected in
, ,
usual topology in which each leg is connected across the dc source.
The topology reduces turn-off switching losses by providing
capacitive snubbing of the turn-off voltage transient, and eliminates
capacitor-discharge turn-on losses by providing zero-voltage turn-
.Switching losses are especially important in converters
operating at high input voltage because turn-on losses are
proportional to the square of the input voltage.
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The to olo is suitable for resonant and non-resonantconverters. It adds one bypass capacitor and one commutating
inductor to the minimum-topology full-bridge converter and
-
transformer, primary winding, and some non-resonantconverters.
The commutating inductor is present in many present-day
converters, to rovide zero-volta e turn-on, or is associated
with one or two capacitors to provide resonant operation and
the bypass capacitor is already present in resonant power
.
In this project work four switch dc-dc converter has been
mp emente us ng , turn-on an turn-o
characteristics are studied.
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INTRODUCTION
Conventional full bridge converter
- -
Advanta es of zero-volta e-switchin
Objectives of the Project Work
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our w c - onver er :-
Four-switch full-bridge dc-dc converter topology is especially
voltage. This topology is suitable for both resonant and non-resonant converters.
Various modes of operation of proposed converter.
Conventional full-bridge converter
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modifications in the connection of components.
First a ca acitor is added in series with the transformer as
shown below
Full-bridge converter with capacitor in series with transformer
primary winding
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Considering two independent input voltage sources, the connection
between the two le s can be eliminated as resented in the belowfigure
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are reversed in the below figure
Reverse polarities of battery and switches in the right leg.
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Rotatin the ri ht le in 180o and connectin below the left leas shown in the below figure
Rotation of the right leg
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The proposed converter can be obtained, substituting the input
vo tage sources y two nput capac tors as e ow
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The proposed converter description:
Switches S1,S2 & S3,S4 - Metal Oxide Semiconductor
switches (MOSFETs).
- - e n erna capac ances
providing capacitive turn-off snubbing
-
input voltage and generate a bypassed
dc mid- oint volta e(Vin/2)
Cs - dc-blocking capacitor
Lr - resonant inductor
TRF - transformer
Dr1,Dr2 - rectifying diodes
o o - ter c rcu t
Ro - load
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Principle of Operation:-
The following are the assumptions made:
All components are ideal.
The ripple in the dc voltage across the series capacitor Cs and
.
A current sink Io replaces the output filter and load.
The analysis is based on the circuit reflected to the primary sideof the transformer, where Lm represents the mutual inductance
in the transformers T equivalent circuit and the leakage
.
The output rectifier is replaced by four rectifier diodes.
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The converter operation can be divided into certain modes:
Mode1:-
Dr3
Cin1
D1
Lr
Dr1
C1
S1
S2
C2
Dr4 Dr2
D2
Lm
Vin Io
D3
C3
Vcs
S3
Cin2
+Cs
D4C4
S4
perat on o o e t
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C1
Cin1
Lr
S1
D1
Dr3 Dr1
C2D2
LmI Lm
2
S2
Vin
Io
Dr4
D3 C3
Dr2
S31
Cin2
Vcs
D4 C4
-+
S4
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S1
D1
Lr
C1
C2 Dr3
Cin1
D2S2
Dr1
Io
Dr4
D3C3
Dr2
S3
LmILmVin
Cs
Vcs
D4
n2
C4
S4
- +
pera on o o e
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Cin1
S1
D1
Lr
C1
C2Dr3
I Lr
D2
LmI Lm
S2Dr1
Vin
Io
Dr4
D3C3
Dr2
Vcs
S3
Cin2
- +S4 CsD4
O eration of Mode4 t3
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S
1 D1C1
C2 Dr3
Cin1Lr
I
LrD2S2
Dr1
Io
Dr4
D3 C3
Dr2
Vc
S
3
m
Cin2
- +S4
Cs
s
D4 C4
Operation of Mode5 ( t4
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S1
Cin1
D1
Lr
S2
C1
C2 Dr3D2
Lm
Dr1
IoVin
Dr4
D3 C3
Dr2
S3
Cin2
- +S4 CsD4 C4
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S1
Cin1
Lr
I Lr
C1
Vin
s2
C2 Dr3D2 Dr1
LmI Lm
Io
S2
D3 C3
Dr2
S3
Cin2
Dr3
- +S4 CsD4 C4
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Cin1
S1
D1
Lr
C1
C2 Dr3D2 Dr1
I Lr
LmI LmVin
IoS2
D3
Dr2
S3
Cin2
Dr3
C3
S4 Cs
Vcs
D4 C4
- +
O eration of Mode8 t7
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Cin1
S1
D1
Lr
C1
C2 Dr3D2
S2
Dr1
I Lr
Io
D3
Dr2
S3
Dr3
C3
S4 Cs
Vcs
D4
Cin2
C4
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Cin1
S1
D1
Lr
C1
C2 Dr4D2
S2
Dr1
I Lr
LmI LmVin
Io
D3
Dr2
S3
Cin2
Dr3
C3
S4 Cs
Vcs
D4
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Analysis:-
At first, temporarily neglecting the reduction of duty ratio
caused by the conduction gap that allows the zero-voltage turn-on,
---------------------------- 11
. . .o in cs csD D
V V V V
= +
where
Vin - input voltage;
2 2n
Vcs - series capacitor voltage;
n - transformer turns ratio ( Np/Ns)
D/2 - (t7-t4)/T.The voltage on the dc-blocking capacitor (Vcs) is
------------------------2
c sV =
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Then, the output voltage is
-----------------------------(3).i n
oV D
V =
But the output voltage is controlled by an effective duty ratio that issmaller than the nominal duty ratio is given by
----------------------------where is the reduction of duty ratio caused by the conduction gap
Current throu h the resonant inductor durin sta es 5 and 6 is
effD D=
given by
---------------------(5)( )6 4.2.
o inr
r
I ViL t t
n L=
t t me t , r=- o n
4. .o
rI
L
----------------------------(6)6 4 .
in
t tV
=
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---------------------(7)2 . T =
8 . .o
rI
L
-------------------------(8).
.i n
n
V
=
.4 . .o
r sI
L F
------------------------
. .2
i no
in
nVn V
=
forward conduction threshold voltage(VF)
. oI
----------------------(10).
nt. . .. i . .
2 2
r sin
o o f
in
V D nV R I V V
=
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DESIGN EXAMPLE:-
The input data for the design of an example converter are as follows.
nput vo tage : n = .
Output Voltage : Vo=60 V.
Output power : Po=1500 W.
Output current : Io=25 A.
w c ng requency : = z.
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Simulation of Designed Circuit
BRIEF INTRODUCTION OF PSPICE:-
SPICE (Simulation Program with Integrated Circuit Emphasis) was developed
at the University of California at Berkely. As the electronics industry advanced,several companies began to sell PC and Macintosh compatible versions of SPICE.
One such company, ORCAD Corporation, a PC compatible version called
PSPICE.
Electronic circuit design requires accurate methods for evaluating circuitperformance. Because of the enormous complexity of modern integrated circuits,
computer aided circuit analysis is essential and can provide information about
circuit performance that is impossible to obtain with laboratory prototype
.
PSPICE is a general-purpose circuit program that simulates electronic
circuits. PSPICE can perform various analyses of electronic circuits. It is a
.
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Types of analysis:-
DC analysis is used for circuits with time-invariant source (e.g., steady state
.
values and their quiescent (dc) values are the outputs.
rans ent na ys s s use or c rcu ts w t t me - var ant sources e.g., ac
sources and switched dc sources). It calculates all node voltages and branch
current over a time interval and their instantaneous values are the outputs.
AC Analysis is used for small - signal analysis of circuits with sources of
variable frequencies. It calculates all node voltages and branch currents over a
range o requenc es, an t e r magn tu es an p ase ang es are t e outputs.
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Advantages:
Evaluating the effects of variation in elements such as register, transformers
.
Assessment of performance, improvement, degrading. Evaluating the effect of noise and signal distortion.
Sensitivity analysis to determine the permissible bounds due to tolerance one
each element value or parameter of active elements.
Fourier analysis without expensive wave analysers. Evaluating effects non-linear elements on the circuit performance
Optimisation the design of electronics circuits in terms circuit parameter.
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Simulated Circuit
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Description of Components Used in Simulation
Description Component Number
MOSFETS IRFP460
DIODES (Dc1 & Dc2) MUR140
DIODES (Dr1 & Dr2) MUR1540
C13)
,
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SIMULATION RESULTS
1400V
2
10V
200V
V
ol
-10V
-200V
ge
(v
ol
ts)
Time
352us 356us 360us 364us 368us 372us 376us 380us 384us 388us
1 V(M1:g,M1:s) 2 V(M1:d,M1:s)
-400V
>>
-
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10V
1
400V2
Vo
0V 0V
200Vlta
ge(v
olt
352us 356us 360us 364us 368us 372us 376us 380us 384us 388us 392us1 V(M2:g,M2:s) 2 V(M2:d,M2:s)
-10V
-400V
-200V
>>
s
Time
Time (us)
Voltage across switch M2 (Zero-Voltage Switching).
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1
2
0V 0V
V
olta
ge
(v
-10V
>>
-200V
ol
ts)
Time
352us 356us 360us 364us 368us 372us 376us 380us 384us 388us 392us
1 V(M3:g,M3:s) 2 V(M3:d,M3:s)
Voltage across switch M3 (Zero-Voltage Switching).
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10V
1
400V2
Vo
0V 0V
lta
ge
(v
olt
s)
352us 356us 360us 364us 368us 372us 376us 380us 384us 388us
-10V
-400V
-200V
>>
Time
1 V(M4:g,M4:s) 2 V(M4:d,M4:s)
Voltage across switch M4 (Zero-Voltage Switching).
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300V
Vo
100V
V
ge
(vo
lts)
900us 910us 920us 930us 940us 950us 960us 970us 980us 990us1000us
V(C2:1,C2:2)
0V
Voltage across dc blocking capacitor(Cs)
Time
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400V
0V
200V
Vo
ltage
-400V
-200Vlts)
Time
900us 910us 920us 930us 940us 950us 960us 970us 980us 990us 1000us
V(TX1:1,TX1:3)
Voltage across primary winding of the transformer
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10A
urre
nt
(A
Current throu h switch M1.Time900us 910us 920us 930us 940us 950us 960us 970us 980us 990us1000us
ID(M1)
-10A
0Amp
s)
20A
Cu
rre
0A
nt
(A
mp
s)
Time
900us 910us 920us 930us 940us 950us 960us 970us 980us 990us1000usID(M2)
-20A
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20A
0A
10A
urre
nt
(A
Time
900us 910us 920us 930us 940us 950us 960us 970us 980us 990us1000us
ID(M3)
-10A
mp
s)
Current through switch M3
10ACu
0A
rre
nt
(A
m
Time
900us 910us 920us 930us 940us 950us 960us 970us 980us 990us1000us
ID(M4)
-10As)
Current through switch M4
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20A
0A
10A
urre
nt
(A
Current through the resonant inductor (Lr)Time
0.99ms 1.00ms 1.01ms 1.02ms 1.03ms 1.04ms 1.05ms 1.06ms 1.07ms 1.08msI(L1)
-10A
mp
s)
200V
Vo
0V
lta
ge
(vo
lts)
Time
0.99ms 1.00ms 1.01ms 1.02ms 1.03ms 1.04ms 1.05ms 1.06ms 1.07ms 1.08ms
V(R1:2,D7:1)
-
Voltage across the rectifier diode.
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1.0KV
0V
Volta
ge
(vo
0.99ms 1.00ms 1.01ms 1.02ms 1.03ms 1.04ms 1.05ms 1.06ms 1.07ms 1.08ms
V(TX1:1,TX1:3)
-1.0KV
lts)
Voltage across the primary winding of the transformer
eliminating the clamping diodes Dc1 and Dc2
Time
0V
Vo
lta
ge
Time
0.99ms 1.00ms 1.01ms 1.02ms 1.03ms 1.04ms 1.05ms 1.06ms 1.07ms 1.08ms
V(R1:2,D7:1)
-500V
(vo
lts)
Voltage across the rectifier diode eliminating the clamping
diodes Dc1 and Dc2
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V
Vol40V
tag
e(vo
0Vs
Time
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms
V(R3:2,0)
-40V
Output Voltage of the Proposed converter
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40A
20ACurre
nt
0A
(A
mp
s)
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms
-I(R3)
-20A
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2.0KW
1.0KW
o
we
r
W
att
s)
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms
W(R3)
0W
.
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CONCLUSIONS
The Four Switch DCDC Converter with ZVS has been
described with modes of operation and ideal waveforms. The
circuits have been analysed..
simulation results are presented such as the timing sequence of
control signals, transformer primary voltage and the waveforms of
rans on e c.
This new four-switch power-circuit topology is well suited to
economical realization of full-brid e dc-dc converters to be
operated from dc input voltages of up to twice the maximumvoltage that is allowed to be imposed on each switch in the power
.
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SCOPE FOR FUTURE WORK
In this project work Four-switch dc-dc converter with Zero-
Voltage Switching has been simulated and simulation results are
presented but hardware implementation has not been done. So,
project work.
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REFERENCES
1) Barbi .I, Gules .R, Redl .R and Sokal ,.N.O, DC/DC converter for High inputvoltage; four switches with peak voltage of Vin/2 capacitive turn off snubbing
-, , .
927, July 2004.
2) Duarte C.M.C and Barbi I., An improved family of ZVS-PWM DC-DCconverter, IEEE Trans on Power Electronics, Vol 17. PP 1-7, Jan 2002
3) Jang Y, Jovonaic M and Yu-Wing Chang, A New ZVS-PWM full-bridgeconverter, IEEE Trans on Power Electronics, Vol 18. PP 1122-1129, Sep
2003.
eon . an yu- yeong o, ero o age an ero urren w c ng
full-bridge DC-DC converter with transformer isolation, IEEE Trans onPower Electronics, Vol 16. PP 573-580, Sep 2001.
5) Lee C.Y and Kwang-hwa.Liu, Zero Voltage Switching technique in DC-DC, , . - , .
6) www.colorado.edu.7) www.power designers.com
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Determination of Passive Components:-
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Determination of Passive Components:-
Transformer Turns Ratio: Assuming ideal switches and diodes and considering
the following. Nominal duty-ratio: D = 0.8.
Maximum duty ratio reduction: 15% of the nominal value of D: = 0.15.D = 0.15.0.8 = 0.12
The transformer turns ratio is calculated as
0.8 0.12D
Resonant Inductor Lr: The resonant inductor Lr is defined b the maximum
. .2
3.4..60
n
o
o
vV
nV v
= = =
duty ratio reduction specified and is calculated as
. .24.5 .
258* * 8*50. *
3.4
inr
o
L HI A
f kHz
n
= = =
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Series Capacitor Cs: The required value of Cs is calculated as a function of the
maximum allowable ripple voltage.
CS Vcsi Cst
=
where1
2 2.
Tt
f = =
oC Si
n=
Then the series capacitor is calculated as
oICs =
. . .
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m t ng t e pea r pp e on t e capac tor to . o t e c va ue y e s
6003.5%. 3.5%. 10.5
inV VVcs V = = =
2 2
257 .
2*3.4*50 *10.5
ACs F
kHz V =
Input Capacitors: The input capacitors Cin1 and Cin2 can be calculated by thesame method used above for Cs.
.cin
C in inV
i Ct
=
where ( ) ( )1 * 12 2*
D T Dtf
= =
2 *
oC i ni
n
=
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en t e nput capac tors are ca cu ate as :
( )1 2
* 1.
* * *
o
in in
I DC C
=
Allowing 5% voltage ripple, we have
Then the input capacitors are
5%*300 15CinV V V = =
( )1 2
25 * 1 0.80.5 .
4*3.4*50 *15in in
AC C F
kHz V
= = =
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Output Filter: The inductance and capacitance of the filter are calculated with
below equations to provide a maximum current ripple Io of 10% and maximumvoltage ripple Vo of 1%
nVimin
16 * * *O
of i n=
min600
88.23OV
L = =. .z
min
8* *
oO
o
IC
f V
=
min2.5
10.4 .8*50 *0.6
OA
C FkHz V
= =
Maximum allowable series resistance of output capacitor Co
0.6oV Vmax . .
2.5ser
oI A
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Switches Voltage and Current Stresses:
Active Switches: The maximum voltage across the off switches is
600inV V= = =
The average and rms currents through S1 and S3 are calculated as
2 2
1 3 .2
a v g a v g
oS S
I DI I
n= =
1 3.
. 2.943.4 2
avg avgS SI I A= = =
oI D.
2
rm s rm s
n
1 325 0.8
. 4.65S rms S rmsA
I I A= = =.
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e average an rms currents t roug an are
2 4av avo
S SI
I I= =2 .n
2 425
3.67avg avgS SI A
I I A= = =.
2 4
o
S rms S rms
I
I I= = .n
2 425
5.2 .*
S rms S rmsA
I I A= = =.
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u pu ec er: or t e out put rect er s own n ma n power c rcu t, t ediode reverse voltage is calculated as
1 600 1inV V
. . . . . .2 2 3.4
dr
n= = =
-
are the switch currents. They are given by
12.52 2
avgdrI A= = =
17.667 .2 2rms
o
drI A= = =
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