Dayle Kotturi Controls [email protected] April 29, 2004 Controls Overview LCLS Facility Advisory Committee April 29-30, 2004 Outline Status

Dayle Kotturi

Controls Overview [email protected]

April 29, 2004

Controls OverviewLCLS Facility Advisory Committee

April 29-30, 2004

OutlineStatus updateResourcesExisting systemProposed new designTask descriptionsNext 12 monthsConclusions

Dayle Kotturi


April 29, 2004

Update: February 2004 – April 2004

Intent to unify the design efforts across the WBS

Global control effort added for support

Design changed to include SLC-aware IOCAllowed new designs outside of CAMAC

Re-costing throughout the WBS to reflect VME

Design discussions started on SLC-aware IOC and timing hardware required

Contact made with some potential personnel

Dayle Kotturi


April 29, 2004

Personnel – Resources

2004 2.42 .56 .07 1.94 .42 .81

200510.37 3.44 .60 1.39 .8610.18

2006 8.12 2.66 2.20 .32 .3110.29

2007 6.07 1.90 4.63 .51 .72 6.32

2008 3.26 .77 .62 .10 .05 6.56

Total30.24 9.33 8.12 4.26 2.3734.17

Ctl. Elec. EngineerCtl. Sr. Elec. Tech.Ctl. Elec Tech.Pwr. Elec. EngineerPwr. Sr. Elec. Tech.Control Prog.

Ramp up plan: starts now with two on board, two more starting in June and two more in October.

Dayle Kotturi


April 29, 2004

Costs: PED & ConstructionFY FY FY FY FY

WBS DESCRIPTION 2004 2005 2006 2007 2008TOTAL K$

1.2.2 Injector Controls Subsystem

PED Project Engineering 460 31 491CON Project Construction 1797 687 140 307 2931TOTAL 2257 719 140 307 3422

5586855745204962833

1.3.2 Linac Controls & Power Conversion Subsystem

PED Project Engineering 1491 559 14 9 2073CON Project Construction 71 4110 746 4927TOTAL 1562 4669 760 9 7000

1.4.2 Undulator Controls Subsystem

PED Project Engineering 36 605 274 914

CON Project Construction1429 2175 9 3614

TOTAL 36 2034 2449 9 4528

1.5.2 X-ray Transport and Diagnostic Controls Subsystem

PED Project Engineering 187 42 228CON Project Construction 896 896TOTAL 187 938 1124

1.6.2 X-ray End Station Controls Subsystem

PED Project Engineering 23 1058 685 1766CON Project Construction 105 3776 3881TOTAL 23 1163 4461 5647

1.1.3.1 Global Controls Subsystem

PED Project Engineering CON Project ConstructionTOTAL

1215 163 17629 776 828 418 2031

1225 938 954 418 3793

258

258

126

TOTAL for this page 25454

Dayle Kotturi


April 29, 2004

Costs: R&D, Commissioning & SparesFY FY FY FY FY

WBS DESCRIPTION 2004 2005 2006 2007 2008TOTAL K$

5586855745204962833

2.4.2 Undulator Controls SubsystemR&D Research & Development 37 185 81 81 77 462

PRE Pre-Operations 104 104 100 308

TOTAL 37 185 186 186 177 770

2.2.2 Injector Controls Subsystem

R&D Research & DevelopmentSPR Project Spares

26

PRE Pre-Operations

268 1490

TOTAL

26 268 1490

2.3.2 Linac Controls & Power Conversion Subsystem

SPR Project Spares

97 97

TOTAL 97 97

2.6.2 X-ray End Station Controls Subsystem

PRE Pre-Operations 142 94 236

TOTAL 142 94 236

2.1.1.11 Global Controls Subsystem

R&D Research & DevelopmentSPR Project SparesPRE Pre-OperationsTOTAL

95 369 343 271 107866 66

101 10195 369 409 372 1245

11991199

TOTAL for this page 3838

TOTAL for last two pages 29292

Dayle Kotturi


April 29, 2004

Integration with the SLC Control System

SLCAlpha

All HighLevelApps

KISNet (fast closed loop control data)PNet (Pulse ID / User ID)

MPG

SLC Net (Data Communication)

micro

CamacI/O

RF reference clock

XtermXtermXtermXterm

EPICSW/S

DistributedApplications

EPICSW/S


EPICSW/S


EPICSW/S


EPICS WSDistributedHigh Level

Applications

Ethernet (EPICS Protocol)

I/OC(SLC-aware)

EVG

Microemulator

Dayle Kotturi


April 29, 2004

Global Hardware - Timing Boards

SLC micro

476 MHz RF Reference

Master PatternGenerator PNET: 128 bit beam codes at 360 Hz

CPU

EVG

Event Generator(PIOP)

Beam Code + EPICS Time + EPICS Events

LLRF(digitizer)

16 triggers

CPU

EVR

Event Receivers(PDU)

Diag

16 triggers

IOC IOCEVR

Fiducial Detector (FIDO)119 MHz w/ 360 Hz fiducial

PNET RCVR

Work in progress

Dayle Kotturi


April 29, 2004

Global Communication Buses

CPU


LLRF(digitizer)

16 triggers

CPU

EVR

Diag

16 triggers

IOC IOCEVR

CPU

EVR

PwrSupply

Ctrl

IOC

Channel Access

SLCAlphaApps


EPICSW/S


EPICSW/S


EPICSW/S


EPICSW/S



Applications

CPU

VacuumCtrl

SLC-Net over Ethernet

Fast Feedback over Ethernet?

Machine Protection

DriveLaserOff

BeamStop

In

EVG

PNET RCVR

Dayle Kotturi


April 29, 2004

SLC Net “Micro” Communication

CPU

LLRF(digitizer)

CPU

EVR

DiagIOC IOCE

VR

CPU

EVR

PowerSupply

Ctrl

IOC

SLCAlphaApps


CPU

VacuumCtrl

SLC-Net over Ethernet

Provides data to SLC Applications from EPICS

Operates at 10 Hz (not beam synched)

Requires significant development in the IOC to emulate SLC “micro” in the IOC

On an application by application basis we will evaluate what functions to provide

EVG

PNET RCVR

Dayle Kotturi


April 29, 2004

Channel Access

CPU

LLRF(digitizer)

CPU

EVR

DiagIOCIOCE

VR

CPU

EVR

PowerSupply

Ctrl

IOC

Channel Access

SLCAlphaApps


EPICSW/S


EPICSW/S


EPICSW/S


EPICSW/S



Applications

CPU

VacuumCtrl

A channel access server in SLC provides data from existing SLC micros to EPICS applicationsAll IOCs have both a channel access server to allow access and a client to have accessChannel access provides read/write by all clients to all data with a server.All EPICS high level applications are channel access clients that may or may not have a server.

EVG

PNET RCVR

Dayle Kotturi


April 29, 2004

Global Communication

CPU LLRF

CPU

EVR

DiagIOC IOCE

VR

CPU

EVR

PowerSupply

Ctrl

IOC CPU

VacuumCtrl

Fast Feedback over Ethernet?

Fast feedback is required to run at 120 HzValues will be transmitted from RF and selected diagnostics to Power Supply and RF IOCsThe communication needs to be reliable, verifiable, and have a well thought out degradationThe entire time budget to read, transmit, communicate, control, and settle is 8.3 msecFirst estimates are that the control system can use 2 msecs to transmit and receive the dataCan this be done over a common Ethernet with adequate bandwidth – or is a dedicated one needed?

EVG

PNET RCVR

Dayle Kotturi


April 29, 2004

Machine Protection

CPU LLRF

CPU

EVR

DiagIOC IOCE

VR

CPU

EVR

PowerSupply

Ctrl

IOC CPU

VacuumCtrl

Machine Protection

DriveLaserOff

SingleBeam

Dumper

Machine protection is used here to define faults requiring global mitigationResponse time is under 8 msecThere are two mitigation devices:

Single Beam Dumper - which prohibits the beam from entering the undulatorDrive Laser Off – which prohibits beam from entering the cavity

Action must also be taken to reduce the repetition rate of the beam

This new design is required to interrupt the beam before the next beam pulse.

EVG

PNET RCVR

Dayle Kotturi


April 29, 2004

Timing

CPU


LLRF

16 triggers

CPU

EVR

Diag

16 triggers

IOC IOCEVR

CPU

EVR

PowerSupply

Ctrl

IOC CPU

VacuumCtrl

Machine ProtectionDriveLaserOff

SLC micro

476 MHz RF Reference

Master PatternGenerator128 bit beam code@ 360 Hz

FIDO119 MHz w/ 360 Hz fiducial

Nsec resolution on the timing gates produced from the Event Rcvr50 psec jitter pulse to pulseEvent generator passes along beam code data from SLCEvent generator sends events to receivers including:

360 Hz, 120 Hz, 10 Hz and 1 Hz fiducialslast beam pulse OKMachine modeEPICS time stamp

Event receivers produce to the IOCinterrupts on eventsdata from the event generator in registers16 triggers with configurable delay and width

EVG

PNET RCVR

Dayle Kotturi


April 29, 2004

LCLS Software Tasks – DevelopmentSLC-aware IOC

Drivers for all new hardware

Machine Protection / Mitigation

Master pattern generator

Fast Feedback Communication

High Level ApplicationsCorrelation PlotsFast Feedback LoopsEmittance reconstruction from wire scans and profile monitorsProfile monitor image analysis for slice emittance with the transverse cavityBeam Steering and online orbit modelingBeam Steering “scans” to emittance reconstruction from wire scans and profile monitors

Dayle Kotturi


April 29, 2004

LCLS Software Tasks – Control Programmer1 RF Control

2 Diagnostics2.1 Toroids & Faraday Cups2.2 Beam Stops2.3 Profile Monitors & Video Devices2.4 Wire Scanners2.5 Bunch Length Monitors & E/O Diagnostics2.6 Beam Position Monitors2.7 Collimators2.8 All other stops

3 Gun Laser and Drive Control

4 Vacuum

5 Magnet Power Supply Control IOC and software

6 Beam Containment / Personnel Protection / Machine Protection

Dayle Kotturi


April 29, 2004

Next 12 months

Acquire team: 8 project engineers, 1 low level programmer, and 3 board designers – or contract out or steal designs

Start PNet, Timing, LLRF, and BPM design efforts

Start the SLC-Aware IOC development

Put together detailed designs per subsystem and have them reviewed – revamp costs.

Develop prototype for 120 Hz Fast Feedback

Develop prototype for video diagnostics

Develop prototype for position controllers

Dayle Kotturi


April 29, 2004

Conclusions

We need to acquire some key resources to get the critical designs well in hand before they are needed

Our key risk is in the design of an SLC-aware IOC and SLC to EPICS timing that will allow us to intermix the SLC and EPICS front-ends. It is also provides a valuable upgrade path for the SLC Linac.

We need to make Interface Control Documents for each control subsystem.

Dayle Kotturi


April 29, 2004

Injector Subsystem DesignsTiming

DigitizerEVR

TCM

EVR

CPU

CPU

RF Equipment

LLRF

6 instances(1 for each klystron), 1 IOC in total

5 Toroids 1 IOC

TCM

TCM

TCM

TCM

1.2.2.3.21.2.2.2

EVR

CPU

4 Faraday Cups with YAGs,share toroid IOC

BI

BO

GADC

1.2.2.3.3

Preamps

LEAD

LEAD LEAD

Mcondchassis

Toroids

MPS?

Actuator

PM Chassis

FaradayCups

MKSU

SLC

Dayle Kotturi


April 29, 2004

Injector Subsystem Designs

EVR

CPU

BI

BO

Actuator

PM Chassis

1.2.2.3.4

TurnOff

MPS

Tune UpDump

Beam Code + EPICS Time

11 Profile Monitors(4 YAGs, 7 OTRs),1 IOC

Ethernet

EVR

CPU

BI

BO

DAC

Lamps&

Actuator

CamerasElectronics

PM Chassis

1.2.2.3.5

Profile Monitors

1 Tune Up Dump,shares toroid IOC

Dayle Kotturi


April 29, 2004

Injector Subsystem DesignsBeam Code + EPICS Time

EVR

BPM

EVR

CPU

CPU

E/O Diagnostic

1 Pulse length meas.share toroid IOC

21 BPMs3 IOCs

BPM

BPM

BPM

BPM

BPM

BPM

EVR

CPU

BI

BO

AO

GADC

SMCTL

IlockChs (2)

MotorControls

1.2.2.41.2.2.5

1.2.2.3.71.2.2.3.6

Thermocouples

AI

GADC

AO To llrf

CamerasElectronics

BPMPickups

Turn off

Gun Laser and Heater Ctrls48 Mirror Motors, 4 Shutters

1 Camera, Joulemeter

1 IOC

Dayle Kotturi


April 29, 2004

Injector Subsystem Designs

EVG


CPU

SLC Timing

EVR

GPIB?

CPU

30gauges

BI

BO

AI

AO

AI

GP307 IGHP937 CCG

30 ionpumps

PowerSupplies

4 blvalves

SLAC PMVC

1.2.2.71.2.2.6

FIDO

PNET 119 MHz w/ 360Hz Fid

Network&

Crates1.2.2.8

LLRF?BCS?

Manual valves into MPS?

PPSMPS

Dayle Kotturi


April 29, 2004

Injector Subsystem DesignsBeam Code + EPICS Time

EVR

CPU

High CurrentHigh Precision

Magnetsw/ KLIXONS

(4)

BIO

MagnetPower Supplies

(4)

1.2.2.9

KlixonBoxes

PS RegInterface

Ethernet

Low CurrentFast Corrector

and Quadrupoles

Magnets

MCORPower Supplies

(4?)

1.2.16.4

EVR

CPU

PPSGates

ControlLogix

PLC (3)

1.2.2.10

1.2.16.1 1.2.16.3

Tone Receiver

ControlLogix

PLC (1)

LaserPPS

Gates

SAM

RTD

AIO

temperatures

Dayle Kotturi


April 29, 2004

LINAC Subsystem DesignsTiming

DAC

EVR

TCM

EVR

CPU

CPU

RF Equipment

LLRF

1 Phase Control 24/30Remaining in SLC

6 Toroids1 IOC

TCM

TCM

TCM

TCM

1.3.2.6.31.3.2.5

Preamps

LEAD

LEAD LEAD

20 Profile Monitors1 IOC

Ethernet

EVR

CPU

BI

BO

DAC

Lamps&

Actuator

CamerasElectronics

PM Chassis

1.3.2.6.5

Toroids Profile Monitors

MKSU

SLC

GADC

TCM

Dayle Kotturi


April 29, 2004

LINAC Subsystem DesignsBeam Code + EPICS Time

EVR

BPM

CPU

1 Pulse length meas. 143 BPMs15 IOCs

BPM

BPM

BPM

BPM

BPM

BPM

1.3.2.6.2

BPMPickups

Ethernet

EVR

CPU

BI

BO

DAC

Lamps&

Actuator

CamerasElectronics

PM Chassis

1.3.2.6.5

E/ODiagnostics

EVR

CPU

SM

ADC

Motorelec

1.3.2.6.1

GADC

20 Wire scanners – 11 new,1 IOC

HVPS

BI

BO

LVDT

Wire ScannersAnd Motors

PhotoTube

CPU

BI

BO

Actuator

PM Chassis

1.3.2.6.4

Stoppers

Dayle Kotturi


April 29, 2004


EVR

CPU

BI

BO

GADC

McondchassisActuator

PM Chassis

Bunch LengthMonitors

1.3.2.6.7

EVR

CPU

BI

BO

Actuator

PM Chassis

1.3.2.6.9

TurnOff

MPS

Single BeamDump

EVR

CPU

BI

BO

ADC

Actuator

PM Chassis

1.3.2.6.10

E BeamDump

EVR

CPU

BI

BO

ADC

Actuator

PM Chassis

1.3.2.6.11

ProtectionCollimator

Dayle Kotturi


April 29, 2004


X – BandAcceleratorStructure

Timing

DAC

EVR

CPU

LLRF MKSU

SLC

GADC

EVR

CPU

BI

BO

SM

Actuator

PM Chassis

MovableCollimator

1.3.2.6.12

MKSU

SLC

1.3.2.6.13

Dayle Kotturi


April 29, 2004


SLC Timing

EVR

GPIB?

CPU

gauges

BI

BO

AI

AO

AI

GP307 IGHP937 CCG

ionpumps

PowerSupplies

4 blvalves

SLAC PMVC

1.3.2.91.3.2.8

LLRF?BCS?

4 chassis for each type of interface

PPSMPS

EVR

24 sets of timing receiver modules

Dayle Kotturi


April 29, 2004


EVR

CPU

PPSGates

ControlLogix

PLC (3)1.3.2.1

EVR

CPU

High CurrentHigh Precision

Magnetsw/ KLIXONS

(4)

MagnetPower Supplies

1.3.2.4

KlixonBoxes

PS RegInterface

Ethernet

Low CurrentFast Corrector

and Quadrapoles

Magnets

MCORPower Supplies

MPS

Tone Receiver

BSOIC

Beam ContainmentSystem

PLIC

BSOIC

1.3.2.21.3.2.6.8 1.3.2.3

BBUS

VMIC

Dayle Kotturi


April 29, 2004

Undulator Subsystem DesignsBeam Code + EPICS Time

EVR

CPU

AI

SMCTL

MotorControls

1.4.2.2.1

WirePosition

Read-backs

Fine Motion Control(strong back

cradle motion)Motors

EVR

CPU

PIEZO

MotorControls

1.4.2.2.2

Phase Corrector Motion

Wire ScannersAnd Motors

EVR

CPU

SM

ADC

LVDT

1.4.2.2.6

GADC

MotorControls

233 motors 4 * 33 controllers 11 wire scanners

Dayle Kotturi


April 29, 2004


EVR

BPM

CPU

33 BPMs33 IOCs

BPM

BPM

BPM

BPM

BPM

BPM

EVR

CPU

GADC

1.4.2.3.21.4.2.3.1

BPMPickups

Charge Monitors(Toroid)

EVR

CPU

SMCTL

MotorControls

1.4.2.2.7

MacroscopicMotion Control

55 controllers2 Charge monitors2 IOCs

EVR

CPU

GADC

1.4.2.3.2

Scanning WiresADCs

3 IOCs

Downconverters

Dayle Kotturi


April 29, 2004

Undulator Subsystem Designs

11 OTRs

Ethernet

EVR

CPU

BI

BO

DAC

Lamps&

Actuator

CamerasElectronics

1.4.2.4.1

ProfileMonitors

7 stations

Ethernet

EVR

CPU

BI

BO

DAC

Lamps&

Actuator

CamerasElectronics

1.4.2.4.3

ObservationVideo

66 temperatures

CPU

AI

1.4.2.5

AI

AI

AI

StrongbackTemperature


Dayle Kotturi


April 29, 2004


GPIB

CPU

2gauges

BI

BO

AI

AO

AI

GP307 IGHP937 CCG

33 ionPumps

* 6

PowerSupplies

? blvalves

SLAC PMVC

1.4.2.6.1

LLRF?BCS?

2 RGAs

PPS

CPU

Gauge

RGA

1.4.2.6.4

MPS

CPU

1.4.2.7

Tone Receiver

CherenkovDetector,

Gamma Ray Detector,

Temperature

Ethernet