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D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated Prepared 25/11/03

D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

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Page 1: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

D75P 34 – HNC Computer Architecture

Week 10

Korean Text Support.

© C Nyssen/Aberdeen College 2003All images © C Nyssen/Aberdeen College except where statedPrepared 25/11/03

Page 2: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

For a final practice at DMA graph drawing, we are using an example where a website has been written in a

foreign script.

To make the page display correctly, we have to download an extra file. This passes from the modem through the CPU to the hard drive.

Page 3: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Like any other question of this type, we begin by drawing a small sketch of the components concerned.

We then add the time proportions spent – in this case, 1/3 – 1/3 – 1/3 – to the diagram, as we will be needing this later.

1/3

1/3

1/3

Page 4: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

We must then work out an appropriate transfer rate, for where there is no DMA or Bus Mastering involved.

The clue is always somewhere in the question!

In this case, we are asked to draw the graph over a three-second period, so the minutes have to be converted to seconds.

5.23 minutes x 60 gives us 313.8 seconds.

Page 5: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Or if you prefer – 9.2 megabytes x 1024 = 9420.8 kilobytes.

9420.8 / 313.8 = 30.02 kilobytes per second – or 30!

Let’s now begin to draw the graph…..

This in turn, gives a rate of 9.2 / 313.8 = 0.029318 megabytes per second.

Or 0.03 would do!

Picture of Korea © Imagestate

Page 6: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

I have made the y-axis big enough to cope with 5 seconds, and plotted the first line at 30 kb/sec.

Page 7: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

We now have to add in the second line for where there is no CPU involved in the transaction.

We will be saving 1/3 of the time that the transfer previously took.

So our 30kB, having taken 1 second before, now takes 2/3 (or 66.6%) of a second….

…and the 90kb now only takes 2.

We can now plot the second line….

1/3

1/3

Page 8: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated
Page 9: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Remember, however, that we do have to “pay” something for all this extra speed. We have to set up the transfer in the first place!

This is where it is useful to refer back to the first diagram again, to work out the DMAC or Bus Master setup time.

1/3 or 0.33

Page 10: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

This takes 1/10th of the time that the data would have spent passing through the CPU when measured over a

period of 1 second.

                                                      

Out of that second, 1/3rd, or 0.33 of it was used by the CPU.

1/10th, or 10%, of this, is 0.03 of a second, or 30 milliseconds.

You can now add this to the graph….

Page 11: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Remember that the DMAC setup time will always be 0.03, regardless of how much data is being transferred.

Page 12: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

We now add the 0.03 second on to every point of the DMA line, to represent the fixed portion of the time included in the whole transfer.

Page 13: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

We are now going to re-define the graph to represent not transfers over varying periods of time, but efficiency over a fixed period of time.

Remember the clue is in the question – so the period of time we will use is three seconds.

Seoul market © Kelly King

Page 14: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

The initial transfer rate represented the system working at 75% efficiency.

Draw a horizontal line at the 3-second mark.

Page 15: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

If 3 seconds = 75%, how much time = 100%?

You can cross-multiply like this ….

3 ?----- = ----- which is the same thing as ….75 100

300----- which gives us 4 seconds.75

If the system was working at 100% efficiency, it could do 4 seconds worth of data in the given time period.

Page 16: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Draw the 100% efficiency line in at 4 seconds, then re-label the y-axis to reflect the new scale of measurement.

Page 17: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Finally, we are asked to estimate a maximum theoretical transfer rate. Use your graph by drawing a line like this….

Read off where it crosses the “DMA + setup” line.

Page 18: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Congratulations! You have now successfully completed a full assessment-level question!

Remember the question is “open-book”, so you might want to print off the next two pages…

Page 19: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Summary [1]

Draw a diagram of the components involved. Put the time breakdown on each component. Work out an appropriate transfer rate. Plot the no-DMA line on your graph. Work out a new rate not including the CPU time. Add this to the graph (this step is optional) Work out the DMA set-up time. Add this to the graph (this step is optional)

Page 20: D75P 34 – HNC Computer Architecture Week 10 Korean Text Support. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College except where stated

Summary [2]

Add this figure to every point on the DMA line (vertically shifts it by the setup amount).

Draw in the first “efficiency” line. Work out where the 100% efficiency line should go, and

draw that in too. Make sure your axes have appropriate labels and scales. Finally, finish your graph with an appropriate title.

Good luck to all!