Anexo 1

Hoja de vida de los miembros de la red

32

CV Ramón Doallo Biempica

Research Curriculum Vitae March 2013 Name: Ramón Doallo Biempica (http://gac.udc.es/~doallo/)

Research Group : Computer Architecture Research Group (http://gac.udc.es)

Department : Departamento de Electrónica y Sistemas

Faculty : Facultad de Informática University : Universidadde A Coruña, 15071 A Coruña, Spain

Phone : +34-981167000, Fax: +34-981167160

E-Mail doallo@udc.es SUMMARY Ramón Doallo, Ph.D in Physics (Univ. Santiago de Compostela) is a Full Professor and the Head of the Computer Architecture Research Group at University of A Coruña. He has 23 years of experience in research and development in the area of High Performance Computing (HPC), covering a wide range of topics such as compilers and programming languages for HPC, parallel and distributed algorithms and applications, management of HPC infrastructures, cluster and grid computing, processor architecture, computer graphics, and distributed Geographic Information Systems. He has published more than 120 technical papers on these topics. He has been a visiting researcher at the Center for Supercomputing Research and Development, and at the Department of Computer Science, both of the University of Illinois at Urbana-Champaign. He has led the research group in 40 research actions (projects, research networks, contracts …) funded by national and international

Anexo 1

Hoja de vida de los miembros de la red

33

agencies and by public institutions and private enterprises. He has been member of the Program Committee or external reviewer in several yearly-celebrated international HPC workshops and conferences. He has also served as Guest Editor of Concurrency and Computation: Practice and Experience, Journal of Parallel and Distributed Computing, and Microprocessors and Microsystems. Currently he is serving as Head of the School of Doctorate Programs of the University of A Coruña. 1. EDUCATION � Ph.D in Physics, April 1992, Universidad de Santiago de Compostela, Spain.

� Graduate in Physics, June 1987, Universidad de Santiago de Compostela, Spain. 2. CURRENT POSITION � Head of the School of Doctorate Programs of University of A Coruña. Since January 2012.

� Full Professor (Catedrático) in Computer Architecture and Technology , Departamento de Electrónica y Sistemas, Universidad de A Coruña, Spain, since 1999.

� Head of Computer Architecture Research Group , Universidad de A Coruña, Spain, since 1994. 3. PROFESSIONAL EXPERIENCE � Director of the Department of Electronics and System s (1999-2003), Universidad de A Coruña, Spain

� Coordinator of the University of A Coruña with the Galicia Supercomputing Center (position equivalent to Director of Department) (1993-1999), Vice-Rectorate for Research, Universidad de A Coruña, Spain.

� Associate Professor (1994-1999), Departamento de Electrónica y Sistemas, Universidad de A Coruña, Spain.

� Assistant Professor (1990-1994), Departamento de Electrónica y Sistemas, Universidad de A Coruña, Spain.

� FPI Grant (young researcher grant, funded by the Ministry of Education, 1988-1990), Departmento de Electrónica y Computación, Universidad de Santiago de Compostela, Spain.

RESEARCH CURRICULUM VITAE 4. SELECTED PUBLICATIONS (SINCE 2003) � All Journal publications listed in SCI JCR 2011

� All conference publications ranked “A” in the CORE list (2009 Ranking of ICT Conferences, http://www.core.edu.au)

1. D. Rolán, B.B. Fraguela, R. Doallo. Adaptive Set-Granular Cooperative Caching. 18th International Symposium on High Performance Computer Architecture, HPCA2012, pp. 213-224, 2012. 2. S. Ramos, G.L. Taboada, R.R. Expósito, J. Touriño, R. Doallo. Design of Scalable Java Communication

Middleware for Multi-core Systems. The Computer Journal (in press), 2012. 3. G. Rodríguez, M.J. Martín, P. González, J. Touriño, R. Doallo. Compiler-assisted Checkpointing of Parallel

Codes: The Cetus and LLVM Experience. International Journal of Parallel Programming (in press), 2012. 4. R.R. Expósito, G.L. Taboada, S. Ramos, J. Touriño, R. Doallo. Evaluation of Messaging Middleware for

High-Performance Cloud Computing. Personal and Ubiquitous Computing (in press), 2012. 5. C. Teijeiro, G.L. Taboada, J. Touriño, R. Doallo, J.C. Mouriño, D.A. Mallón, B. Wibecan. Design and

Implementation of an Extended Collectives Library for Uni_ed Parallel C. Journal of Computer Science and Technology (in press), 2012. 6. J. Porta, J. Parapar, R. Doallo, F. F. Rivera, I. Sant_e, R. Crecente. High Performance Genetic Algorithm for

Land Use Planning. Computers, Environment and Urban Systems (in press), 2012.

7. J. Lobeiras, M. Amor, R. Doallo. Influence of Memory Access Patterns to Small-Scale FFT Performance. The Journal of Supercomputing (in press), 2012. 8. M. Viñas, J. Lobeiras, B.B. Fraguela, M. Arenaz, M. Amor, J.A. García, M. Castro, R. Doallo. A Multi-GPU

Shallow Water Simulation with Transport of Contaminants. Concurrency and Computation: Practice and Experience (in press), 2012. 9. R.R. Expósito, G.L. Taboada, S. Ramos, J. Touriño, R. Doallo. Performance Analysis of HPC Applications in

the Cloud. Future Generation Computer Systems (in press), 2012. 10. D. Andrade, B.B. Fraguela, R. Doallo. Accurate Prediction of the Behavior of Multithreaded Applications in

Shared Caches. Parallel Computing (in press), 2012. 11. R.R. Expósito, G.L. Taboada, S. Ramos, J. Touriño, R. Doallo. General-Purpose Computation on GPUs for

High Performance Cloud Computing. Concurrency and Computation: Practice and Experience (in press), 2012. 12. D. Andrade, B.B. Fraguela, R. Doallo. Static Analysis of the Worst-case Memory Performance for Irregular

Codes with Indirections. ACM Transactions on Architecture and Code Optimization, 9(3):20:1-20:32, 2012. 13. D. Darriba, G.L. Taboada, R. Doallo, D. Posada. jModelTest2: More Models, New Heuristics and Parallel

Computing. Nature Methods, 9(8):772, 2012. 14. J. González-Domínguez, M.J. Martín, G.L. Taboada, J. Touriño, R. Doallo, D.A. Mallón, B. Wibecan.

UPCBLAS: A Library for Parallel Matrix Computations in Unified Parallel C. Concurrency and Computation: Practice and Experience , 24(14):1645-1667, 2012.

15. J.R. Sanjurjo, M. Amor, M. Bóo, R. Doallo. Parallel Monte Carlo Radiosity using Scene Partitioning. International Journal of High Performance Computing Applications (in press), 2012.

16. R. Doallo, M. Amor, B.B. Fraguela. Exploitation of Hardware Accelerators (Guest Editorial). Microprocessors and Microsystems 36(2):63-64, 2012. 17. J.R. Sanjurjo, M. Amor, M. Bóo, R. Doallo. High-performance Monte Carlo Radiosity on GPU based on

Scene Partitioning. Microprocessors and Microsystems 36(2):88-95, 2012. 18. R.R. Expósito, G.L. Taboada, J. Touriño, R. Doallo. Design of Scalable Java Message-Passing

Anexo 1

Hoja de vida de los miembros de la red

34

Communications over Infiniband. Journal of Supercomputing 61(1):141-165, 2012. 19. G.L. Taboada, S. Ramos, R.R. Expósito, J. Touriño, R. Doallo. Java in the High Performance Computing

Arena: Research, Practice and Experience. Science of Computer Programming (in press), 2012.

20. G.L. Taboada, J. Touriño, R. Doallo. F-MPJ: Scalable Java Message-Passing Communications on Parallel

Systems. Journal of Supercomputing 60(1):117-140, 2012.

21. R. Doallo, B.B. Fraguela. Accelerators for High-Performance Computing (Guest Editorial). Journal of Parallel and Distributed Computing, 72(9):1055-1056, 2012 22. G.L. Taboada, J. Touriño, R. Doallo, A. Shafi, M. Baker, B. Carpenter. Device Level Communication Libraries

for High Performance Computing in Java. Concurrency and Computation: Practice and Experience, 23(18): 2382-

2403,2011. 23. J.R. Sanjurjo, M. Amor, M. Bóo, R. Doallo, J. Casares. Optimizing Monte Carlo Radiosity on Graphics

Hardware. Journal of Supercomputing, 58(2): 177–185, 2011. RESEARCH CURRICULUM VITAE 24. J. Porta, J. Parapar, G.L. Taboada, R. Doallo, F.F. Rivera, I. Santé, M. Suárez, M. Boullón, R. Crecente. A Javabased

Parallel Genetic Algorithm for the Land Use Planning Problem. Genetic and Evolutionary Computation Conference pp. 213-214, 2011.

25. E.J. Padrón, M. Amor, M. Bóo, G. Rodríguez, R. Doallo. Parallel hierarchical radiosity on hybrid platforms. The Journal of Supercomputing, 58(3): 357-366, 2011. 26. D. Darriba, G.L. Taboada, R. Doallo, D. Posada. ProtTest 3: fast selection of best-fit models of protein

evolution. Bioinformatics, 27(8): 1164-1165, 2011.

27. S. Ramos, G.L. Taboada, J. Touriño, R. Doallo. Design of efficient Java message-passing collectives on multicore

clusters. Journal of Supercomputing, 55(2): 126-154, 2011.

28. D. Rolán, B.B. Fraguela, R. Doallo. Reducing Capacity and Conflict Misses using Set Saturation Levels. 17th High Performance Conference, HiPC 2010, 2010. 29. B.B. Fraguela, D. Andrade, R. Doallo. Address-Independent Estimation of the Worst-case Memory

Performance. IEEE Trans. on Industrial Informatics 6(4):664-677, November 2010. 30. G. Rodríguez, M.J. Martín, P. González, J. Touriño, R. Doallo. CPPC: a compiler-assisted tool for portable

checkpointing of message-passing applications. Concurrency and Computation: Practice and Experience, 22(6), pp. 749- 766, 2010.

31. G.L. Taboada, J. Touriño, R. Doallo. Performance Analysis of Message-Passing Libraries on High-Speed

Clusters. Computer Systems Science and Engineering, 25(1), pp.63-78, 2010. 32. E.J. Padrón, M. Amor, M. Bóo, R. Doallo. Hierarchical Radiosity for Multiresolution Systems Based on Normal

Tests. The Computer Journal , 53(6):741-752, 2010.

33. D. Rolán, B.B. Fraguela, R. Doallo. Adaptive Line Placement with the Set Balancing Cache. The 42nd Annual IEEE/ACM Int. Symp. on Microarchitecture, MICRO’09, pp. 529-540, 2009. 34. D.A. Mallón, G.L. Taboada, C. Teijeiro, J. Touriño, B.B. Fraguela, A. Gómez, R. Doallo, J.C. Mouriño.

Performance Evaluation of MPI, UPC and OpenMP on Multicore Architectures. 16th European PVM/MPI Users' Group Meeting, EuroPVM/MPI'09, Lecture Notes in Computer Science Vol. 5759, pp. 174-184, Espoo (Finland), September 2009. 35. J. González-Domínguez, M.J. Martín, G.L. Taboada, J. Touriño, R. Doallo, A. Gómez. A Parallel Numerical

Library for UPC. 15th International Euro-Par Conference, Euro-Par 2009, Lecture Notes in Computer Science Vol. 5704, pp.630-641. Delft (The Netherlands), August 2009. 36. D. Andrade, B.B. Fraguela, R. Doallo. Static Prediction of Worst-case Data Cache Performance in the Absence

of Base Address Information. 15th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'09).pp. 45-54. San Francisco (California, USA), April 2009. 37. G.L. Taboada, J. Touriño, R. Doallo. Java Fast Sockets: Enabling High-speed Java Communications on High

Performance Clusters. Computer Communications, 31(17):4049-4059, November 2008. 38. M. Arenaz, J. Touriño, R. Doallo. XARK: An EXtensible Framework for Automatic Recognition of

Computational Kernels. ACM Transactions on Programming Languages and Systems, 30(6), Article 32, 56 pages, October 2008. 39. D. Andrade, B. B. Fraguela, R. Doallo. Precise Automatable Analytical Modeling of the Cache Behavior of

Codes with Indirections. ACM Transactions on Architecture and Code Optimization (TACO), 4(3), paper 16. September 2007. 40. D. Andrade, M. Arenaz, B.B. Fraguela, J. Touriño, R. Doallo. Automated and Accurate Cache Behavior Analysis

for Codes with Irregular Access Patterns. Concurrency and Computation: Practice and Experience, 19(18):2407-2423, December 2007. 41. J. Touriño, B.B. Fraguela, R. Doallo, M. Arenaz. Current Trends in Compilers for Parallel Computers (Editorial).

Concurrency and Computation: Practice and Experience, 19(18):2313-2316, December 2007. 42. M. Arenaz, J. Touriño, R. Doallo. Program Behavior Characterization through Advanced Kernel Recognition.

13th International Euro-Par Conference, Euro-Par 2007, Lecture Notes in Computer Science Vol. 4641, pp.237-247. Rennes (France), August 2007. 43. J.C. Mouriño, M.J. Martín, P. González, R. Doallo. High Performance Air Quality Simulation in the European

Crossgrid Project. Computing and Informatics, 24:1001-1019, 2006. 44. D. Andrade, B. B. Fraguela, R. Doallo. Analytical Modeling of Codes with Arbitrary Data-dependent Conditional

Structures. Journal of Systems Architecture, 52(7):394-410. July 2006.

Anexo 1

Hoja de vida de los miembros de la red

35

45. G.L. Taboada, J. Touriño, R. Doallo. Efficient Java Communication Protocols on High-Speed Cluster

Interconnects. 31st IEEE Conference on Local Computer Networks, LCN 2006, IEEE Computer Society, pp.264- 271. Tampa, Florida (USA), November 2006. RESEARCH CURRICULUM VITAE 46. G.L. Taboada, J. Touriño, R. Doallo. Non-blocking Java Communications Support on Clusters. 13th European PVM/MPI Users' Group Meeting, EuroPVM/MPI'06, Lecture Notes in Computer Science Vol. 4192, pp.256-265. Bonn (Germany), September 2006. 47. D. Andrade, B.B. Fraguela, R. Doallo. Cache Behavior Modelling for Codes Involving Banded Matrices.

Languages and Compilers for Paralell Computers, LCPC’2006, LNCS Vol. 4382, pp. 16-32, 2006.

48. M.J. Martín, M. Parada, R. Doallo. High Performance Pollution Simulation using OpenMP. The Journal of Supercomputing, 28:311-321, 2004. 49. J. Tarrío, J. Touriño, M.J. Martín, P. González, R. Doallo. A Grid Portal to Support High-Performance Scientific

Computing on Distributed Resources. IEICE Transactions on Information and Systems (Special Issue on Hardware/Software Support for High-Performance Scientific and Engineering Computing), E87-D(7):1843-1849, July 2004.

50. J. Salceda, I. Díaz, J. Touriño, R. Doallo. A Middleware Architecture for Distributed Systems Management. Journal of Parallel and Distributed Computing, 64(6):759-766, June 2004. 51. M. Arenaz, J. Touriño, R. Doallo. Compiler Support for Parallel Code Generation through Kernel Recognition.

18th IEEE International Parallel and Distributed Processing Symposium, IPDPS'04, IEEE Computer Society, pp.79b (CD-ROM, 10 pages). Santa Fe, New Mexico (USA), April 2004. 52. B.B. Fraguela, R. Doallo, J. Touriño, E.L. Zapata. A Compiler Tool to Predict Memory Hierarchy Performance

of Scientific Codes. Parallel Computing, 30(2):225-248, February 2004.

53. F.F. Rivera, M. Bubak, A.G. Tato, R. Doallo (Editors). Grid Computing. LNCS 2970, 2004. 54. B. B. Fraguela, R. Doallo, E. L. Zapata. Probabilistic Miss Equations: Evaluating Memory Hierarchy

Performance. IEEE Transactions on Computers, 52(3):21-336. March 2003. 55. M.J. Martín, J.C. Mouriño, R. Doallo, D.E. Singh, F.F. Rivera, J.D. Bruguera. High Performance Air Pollution

Modeling for a Power Plant Environment. Parallel Computing, Vol. 29(11-12), pages 1763-1790, 2003. 56. D. Andrade, B.B. Fraguela, R. Doallo. Cache Behavior Modeling of Codes with Data-Dependent Conditionals.

7th Intl. Workshop on Software and Compilers for Embedded Systems (SCOPES 2003). Lecture Notes in Computer Science Vol. 2826, pp. 373-387. Vienna (Austria), September 2003. 57. G.L. Taboada, J. Touriño, R. Doallo. Performance Analysis of Java Message-Passing Libraries on Fast Ethernet,

Myrinet and SCI Clusters. 5th IEEE International Conference on Cluster Computing, Cluster 2003, IEEE Computer Society, pp.118-126. Hong Kong (China), December 2003. 58. G.L. Taboada, J. Touriño, R. Doallo. Performance Modeling and Evaluation of Java Message-Passing Primitives

on a Cluster. 10th European PVM/MPI Users' Group Meeting, EuroPVM/MPI'2003, Lecture Notes in Computer Science Vol. 2840, pp.29-36. Venice (Italy), September 2003. 59. M. Arenaz, J. Touriño, R. Doallo. A GSA-Based Compiler Infrastructure to Extract Parallelism from Complex

Loops. 17th ACM International Conference on Supercomputing, ICS'03, ACM Press, pp. 193-204. San Francisco, California (USA), June 2003. 5. RECENT RESEARCH GRANTS AND CONTRACTS 5.1. NATIONAL RESEARCH GRANTS 1. Architectures, Systems and Tools for High Performance Computing (Ministry of Science and Innovation of Spain, TIN2010-16735), 291.005 Euros (UDC). Role: PI. Nov. 2010-Oct. 2013 2. Consolidation of Competitive Research Groups: Computer Architecture Group at the University of A Coruña (Galician Regional Government, Spain, no. 2006/3), 200.000 Euros (UDC). Role: PI. October 2010-December 2012 3. Geographical Information Systems for Urban Planning and Land Management using Optimization Techniques on Multicore Processors (Galician Regional Government, Spain, 08SIN011291PR), 58.765 Euros (UDC). Role: PI. November 2008-October 2011 4. Hardware and Software Support for High Performance Computing (Ministry of Education and Science of Spain, TIN2007-67537-C03-02), 294.030 Euros (UDC). Role: PI. October 2007-August 2010 5. Hardware Systems Exploitation for Real-Time Image Synthesis (Galician Regional Government, Spain, INCITE08TIC001206PR), 65.665 Euros (UDC). Role: Member. August 2008-August 2011 6. Galician Network of High Performance Computing (Galician Regional Government, Spain, no. 2007/147), 180.000 Euros (UDC). Role: PI. August 2007-December 2009 7. Software Architecture and Methodological Framework based on Formal Models for the Systematic Generation of System Administration Tools (Galician Regional Government, Spain, PGIDIT06PXIB105228PR), 51.400 Euros (UDC). Role: Member. December 2006-December 2009 RESEARCH CURRICULUM VITAE 8. Consolidation of Competitive Research Groups: Computer Architecture Group at the University of A Coruña (Galician Regional Government, Spain, no. 2006/3), 200.000 Euros (UDC). Role: PI. October 2006-December 2009 9. Middleware and Hardware Solutions in High-Performance Computing: Application to Multimedia and Simulation Codes (Ministry of Education and Science of Spain, TIN2004-07797-C02-02), 209.760 Euros (UDC) plus additional funding of 48.100 Euros (Galician Regional Government, PGIDIT05PXIC10504PN). Role: PI. December 2004-December 2007 10. Fault-Tolerant Distributed Applications: Extension to Grid Computing (Galician Regional Government, Spain,

Anexo 1

Hoja de vida de los miembros de la red

36

PGIDIT04TIC105004PR), 60.000 Euros (UDC). Role: PI. August 2004-August 2007 11. GIS and Web Technologies for Enhancing the Land Market in Galicia (Galician Regional Government, Spain, PGIDIT03SIN10501PR), 79.860 Euros (UDC). Role: Member. October 2003-December 2006 12. High-Performance Computing for Rendering. Memory Hierarchy Exploitation and Mapping of Algorithms on Hardware (Ministry of Science and Technology of Spain, TIC2001-3694-C02-02), 244.762 Euros (UDC) plus additional funding of 23.980 Euros (Galician Regional Government, PGIDIT02PXIC20602PN). Role: PI. December 2001-December 2004 5.2. INTERNATIONAL RESEARCH GRANTS 13. High-Performance Embedded Architectures and Compilers Network of Excellence, HiPEAC-2 NoE (European Union FP7, ICT-217068), 4.800.000 Euros (global). Role: Member. February 2008-January 2012 14. High-Performance Embedded Architectures and Compilers Network of Excellence, HiPEAC NoE (European Union FP6 IST-004408), 3.900.000 Euros (global). Role: Member. February 2007-August 2008 15. Grid Technology to Enable Regional Development (Latin American Program of Science and Technology, CYTED, 506PI0293), 120.000 US$ (global). Role: Member. January 2006-December 2008 16. Weather Forecast and Air Pollution Modelling Tasks: Subcontract within the EU Project Development of Grid Environment for Interactive Applications, Crossgrid (European Union, IST-2002-32243), 22.040 Euros (UDC). Role: PI. May 2002-February 2005 5.3. PRIVATE R&D CONTRACTS 15. HPC4HPT: High Performance Computing for High Performance Trading, funded by Fundación Barrié, 340.000 Euros. Role: Co-PI. July 2011-September 2013 16. Improving UPC Usability and Performance in Constellation Systems: Implementation/Extension of UPC Libraries, funded by Hewlett-Packard, 152.552 Euros. Role: PI. May 2008-April 2011 17. SIUXFOR: GIS-Web System for the Management of Forestry Units (and 3 related contracts), funded by the Ministry of Rural Environment of the Galician Government, 180.322 Euros. Role: Co-PI. February 2008- December 2008 18. Design of a Corporate Geographical Information System (and 2 related contracts), funded by the Council of Lugo, Spain, 66.000 Euros. Role: Co-PI. February 2007-June 2008 19. SITEGAL: Geographical Information System for the Management of the Land Bank of Galicia (and 8 related contracts), funded by the Ministry of Rural Environment of the Galician Government, 262.562 Euros. Role: Co- PI. December 2006-August 2009 20. High-Performance GIS Application for the Development of the Inventory of Equipment of the Lugo Province (and 1 related contract), funded by the Province Government of Lugo, Spain, 37.844 Euros. Role: Co-PI. February 2006-December 2006 21. Training of CESGA Users and Staff on High Performance Computing (and 3 related contracts), funded by the Galicia Supercomputing Center (CESGA), 23.500 Euros. Role: Co-PI. October 2004-December 2008 6. PROFESSIONAL SERVICE (SINCE 2004) 6.1. JOURNAL EDITOR 1. Int. Journal of Computational Science and Engineering (ISSN 1742-7193). Member of the Editorial Board since 2004

2. Journal of Systems Architecture (ISSN 1383-7621). Member of the Editorial Board, March 2004-September2005

3. Concurrency and Computation: Practice and Experience. Editor of the Special Issue on Compilers for Parallel Computing, 2007

4. Microprocessors and Microsystems. Editor of the Special Issue on Exploitation of Hardware Accelerators, 2012

5. Journal of Parallel and Distributed Computing. Editor of the Special Issue on Accelerators for High Performance Computing, 2012 RESEARCH CURRICULUM VITAE 6. Concurrency and Computation: Practice and Experience. Editor of the Special Issue on Computing with Hardware Accelerators, 2013 (to be published)

7. Concurrency and Computation: Practice and Experience. Editor of the Special Issue on Multicore Cache Hierarchies: Design and Programmability issues, 2013 (to be published) 6.2. EDITOR OF PROCEEDINGS 1. 1st European Across Grids Conference (ISBN 3-540-21048-2), 328 pages, 2004

2. 1st Iberian Grid Infrastructure Conference Proceedings (ISBN 978-84-611-6634-3), 420 pages, May 2007

3. 12th Workshop on Compilers for Parallel Computers (ISBN 54-609-8459-1), 455 pages, January 2006 6.3. PROGRAM COMMITTEE CHAIR/MEMBER 1. The 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2012 [PC Member] 2. International Conference on High Performance Computing&Simulation, HPCS 2010, HPCS 2011 [PC Member] 3. 8th International Conference on Advanced Parallel Processing Technologies, APPT 2009 [PC Member] 4. Euromicro Conference on Parallel, Distributed and Network based Processing, [PC Member 2005-2010] 5. 1st Iberian Grid Infrastructure Conference, IBERGRID 2007. Santiago de Compostela, Spain, May 2007 [PC Chair] 6. Parallel Computing 2005 Conference, ParCo2005. Málaga, Spain, September 2005 [PC Member] 6.4. ORGANIZING COMMITTEE CHAIR/MEMBER 1. Workshop on Multicore Cache Hierarchies: Design and Programmability Issues. Madrid, Spain, July 2012 [OC

Anexo 1

Hoja de vida de los miembros de la red

37

Member] 2. Workshop on Exploitation of Hardware Accelerators. Istambul, Turkey, July 2011 [OC Member] 3. Workshop on Exploitation of Hardware Accelerators. Caen, France, June 2010 [OC Member] 4. XX Jornadas de Paralelismo. A Coruña, Spain, September 2009 [OC Chair] 5. 1st Iberian Grid Infrastructure Conference, IBERGRID 2007. Santiago de Compostela, Spain, May 2007 [OC Member] 6. 12th Workshop on Compilers for Parallel Computers, CPC 2006. A Coruña, Spain, January 2006 [OC Member] 7. 12th Euromicro Conference on Parallel, Distributed and Network-based Processing, PDP 2004. A Coruña,

Spain, February 2004 [OC Chair] 7. OTHER ACTIVITIES 7.1. PHD SUPERVISION � “Caché Design Strategies for Efficient Adaptive Line Placement”, PhD in Computer Science, Dyer Rolán, University of A Coruña, June 2012

� “Design of Efficient Java Communications for High Performance Computing”, PhD in Computer Science,

Guillermo L. Taboada, University of A Coruña, May 2009, European PhD � “Systematic Analysis of the Cache Behavior of Irregular Codes”, PhD in Computer Science, Diego Andrade,

University of A Coruña, April 2007. Award to the Best PhD Thesis in CS (2005-2007) by the University of A Coruña

� Acceleration Techniques for the Hierarchical Radiosity Method, PhD in Computer Science, Emilio J. Padrón, University of A Coruña, May 2006

� “Compiler Framework for the Automatic Detection of Loop-Level Parallelism”, PhD in Computer Science,

Manuel Arenaz, University of A Coruña, March 2003, Award to the Best PhD Thesis in CS (2002-2003) by the University of A Coruña

� “Analytical Modeling of the Behaviour of Cache Memories”, PhD in Computer Science, Basilio B. Fraguela, University of A Coruña, March 1999

� “Parallelization and Compilation Issues of Sparse QR Algorithms”, PhD in Computer Science, Juan Touriño,

University of A Coruña, March 1998, European PhD 7.2. R&D MANAGEMENT � Member of the Advisory Committee of the National Commission for the Evaluation of Research Activities (CNEAI) of Spain (December 2006-December 2008)

� Project evaluator for the Ministry of Education and Science of Spain (since 2007) RESEARCH CURRICULUM VITAE � Project evaluator for the Ministry of Innovation of the Regional Government of Andalucia, Spain (2008)

� Project evaluator for the Ministry of Education of the Regional Government of Extremadura, Spain (2008)

� Project evaluator for the Ministry of Economy and Competitiveness of Spain, Ramón y Cajal Programme (2012)

� Project evaluator for the European Commission, FP7-ICT-2013-10 Call, Information and Communication Technologies, (2013)