Current-voltage and capacitance-voltage characteristics of heterostructure insulated-gate field-effect transistors

1650 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-34, NO. 8, AUCiUal 170,

Current-Voltage and Capacitance-Voltage Characteristics of Heterostructure Insulated-Gate

Field-Effect Transistors JUNHO BAEK, MICHAEL S . SHUR, SENIOR MEMBER, IEEE, ROBERT R. DANIELS,

DAVID K. ARCH, MEMBER, IEEE, JONATHON K, ABROKWAH, MEMBER, IEEE, AND OBERT N. TUFTE, SENIOR MEMBER, IEEE

Abstract-We present the results of theoretical and experimental studies of heterostructure insulated-gate field-effect transistors (HIG- FET’s). We develop an improved charge-control model for the two- dimensional densities of electron and hole gases at the heterointerface. Our model provides an accurate description of the device behavior even at relatively low densities of two-dimensional gases. We obtain the current-voltage characteristics of HIGFET’s using our charge-control model and account for the gate current. The theoretical calculations are in good agreement with the experimental measurements.

R I. INTRODUCTION

ECENT DEVELOPMENTS in heterojunction 1:ran- sistor technology, in particular, the emergence of

complementary heterostructure insulated-gate field-effect transistors (HIGFET’s) [1]-[5] have opened up opportu- nities for low-power ultra-high-speed integrated circuits. Further development of this technology requires accurate analytical device models that can be used in’a circuit simulator for IC analysis and design.

Different numerical [6], 171 and analytical [8j -[11] models have been developed and used in order to eluci- date the device physics, to deduce parameters such as the effective electron mobility and saturation velocity in the channel, and to design IC’s. In particular, our mod’el [8]- [lo] has been implemented into a circuit simulator, UM- SPICE, and used in the design of high-speed MODFET IC’s 1121, [13].

Vinter [6] calculated the subband structure and 2-D electron density as a function of the gate voltage in a self- consistent way and revealed that the field effect becomes

Manuscript received October 7, 1986; revised March 16, 1987. The portion of this work done at the University of Minnesota was partially supported by the Microelectronics and Information Science Center at the Uni- versity of Minnesota and by the Physical Science Center at Eoneywell, Inc. The work at Honeywell, Inc. was partially supported by the Air Force Avionics Laboratories under Contract F33615-85-C-1824.

.I. Baek and M. Shur are with the Department of Electrical Engineering, University of Minnesota, Minneapolis, MN 55455.

R. R. Daniels, D. K . Arch, and 0. N. Tufte are with the Physical Sci- ence Center, Honeywell, Inc., Bloomington, MN 55420.

J. K . Abrokwah was with the Physical Science Center, Honeywell, Jnc., Bloomington, MN 55420. He is now with the McDonnell Douglas Micro- electronics Center, Huntington Beach, CA 92647.

IEEE Log Number 8714861.

screened by the parailel conduction in the AlGaAs layer. Yoshida and Kurata [7] employed a two-dimensional numerical model to analyze MODFET’s. Such numerical models can provide very accurate information on the behavior of the devices. However, an analytical model that is easily manipulated is desirable for design analysis. Also, it has been shown that an analytical model can be as accurate as a numedcal model [14].

A handy analytical model for the 2-D electron density, and thereby current-voltage characteristics; was developed and has been used in a MODFET IC simulator. This model is easily manipulated and describes accurately the behavior of MODFET’s except for the subthreshold region where the 2-D electron density is relatively low. However, this subthreshold region is quite important because HIGFET’s are usually operated in this region and the onset of velocity saturation will take place in this region. In conclusion, a new analytical model that is more accurate and easily manipulated is desirable.

In this paper, we present the results of experimental and theoretical studies of heterostructure insulated-gate FET’s. We develop an improved analytical model of the surface densities of the 2-D electron and hole gases (Sec- tions I and 11), the current-voltage characteristics (Sec- tion 111) and the capacitance-voltage characteristics (Sec- tion IV). In particular, we present a more accurate description of the device behavior at relatively low densities of the 2-D gases for both n-channel and p-channel HIG- FET’s. This is followed by a comparison of the present model with experimental results (Section V) and conclud- ing remarks (Section VI).

11. MODELING OF TWO-DIMENSIONAL DENSITIES OF ELECTRON AND HOLE GASES

A. Density of States in Two-Dimensional Space The density of states in two-dimensional space is given

by

0018-9383/87/0800-1650$01.00 O 1987 IEEE

BAEK et al.: I-V AND C-V CHARACTERISTICS OF HIGFET'S 165 1

where g, is the spin degeneracy factor, g, is the valley degeneracy factor, m = ( m1m2)1/2 is the density-of-states effective mass, ml and m2 are effective masses associated with the motion parallel to the plane (surface) of two-dimensional space, and Eo is the minimum of the allowed energy band. For GaAs, the value of D for electrons was found to be 3.24 X 1017 m-2 V-' using the measured cyclotron mass [ 151. For holes in GaAs, it was reported [16] that the spin degeneracy is removed except at k = 0 due to the lack of the inversion symmetry at the heterointerface. This lifting of the spin degeneracy gives rise to two cyclotron masses: m:l = 0.36m0, m?2 = 0.60mo at k = kF = 1.96 X 106 cm-', where mo is the free-electron mass and kF is the Fermi wave vector of the heavier band. These two masses are believed to be derived from the heavy-mass hole band in bulk GaAs. The splitting of the heavy and light hole subbands at the Fermi wave vector is found to be 1.4 1 meV. Since this splitting is smaller than the thermal voltage even at 77 K by several times, we neglect the splitting and regard the two subbands as degenerate with different effective masses. This yields the effective density of states for holes given by

D ( E ) - meff 2aA2

where

B. Two-Dimensional Electron (Hole) Density in the Potential Well

The two-dimensional electron density in the potential well was calculated with only the two lowest subbands taken into account in [8], where the expressions for the subband energy levels under the triangular potential well approximation were given by

where -yno = 2.5 X V * m4/3 and ynl = 3.2 X V * m4/3 for electrons. The same approach is employed here and the two coefficients ypo and ypl for 2-D holes are found to be 1.25 X V - m4j3 and ypl = 2.19 X

V m4/3, respectively, using the values of the cyclotron masses mentioned above. It can be shown that the third lowest subband is several kT/q's above the Fermi energy. Also, it is found that the two-level calculation for the 2-D electron density is a good approximation [ 171.

C. A New Charge-Control Model From the energy-band diagram of the N-HIGFET

shown in Fig. 1, the potential drop across the AlGaAs layer Vox is given by

Vox = Vg - 4 b + AE, - V ( 0 ) (6)

where Vg is the gate voltage, 4b is the Schottky-barrier height at the interface between the gate metal and the

20 ELECTRON GAS

/

-MElAL+GaAs- - METAL+-+-GaAs - (AI,Ga)As

(AI,Ga)As

(a) (b) Fig. 1 . Energy band diagrams for (a) an n-HIGFET and (b) a p-HIGFET.

AlGaAs layer, A E, is the conduction band discontinuity, and V ( 0 ) is the potential of the GaAs conduction band right next to the interface measured from the Fermi level. Equation (6) can be rewritten as

where Cox = E/d is the capacitance of the AlGaAs layer per unit area, E is the dielectric constant of AlGaAs, d is the thickness of the AlGaAs layer, and V,, = 4, - A E,. V ( 0) is a nonlinear function of n,. In [SI, [9], the relation between V ( 0) and ns was approximated as a linear function, which gives rise to a very simple and handy charge- control model. This model describes the behavior above the threshold fairly well. However, a more accurate model describing the behavior of HIGFET's throughout the operating region including the subthreshold region is de- sired. We seek a simple analytical expression that provides a good approximation for the V( 0) - n, relation for low 2-D carrier densities as well as relatively high densities in the following form:

V ( 0 ) = Ann:/2 - V,,

where A, (in volts times centimeters) and V,, (in volts) are functions of the temperature given by

A n ( T ) = 5.22 X 10-14T2 + 1.74 X 10-''T + 1.88

X 1 0 - ~ (9)

Von(Tj = 1.66 X lOP7T2 + 2.36 X lOW4T + 3.43

x (10)

This approximation is compared with the exact V ( 0 ) - n, relation and the linear approximation in Fig. 2. As can be seen from the figure, (8) approximates the exact relation with good accuracy throughout the wide range of the 2-D electron density. Strictly speaking, the contribution from three-dimensional conduction should be included in the subthreshold region. However, as shown in [17], this contribution is not very important in n-channel devices for the substrate doping below or about 1015 ~ m - ~ . In p-chan- ne1 devices, the three-dimensional hole conduction in the subthreshold region may be important as indicated by

1652 IEEE TFANSACTIONS ON ELECTRON DEVICES, VOL. ED-34, NO. 8 , AUGUST 1987

0.3 I I I I 1

? 0.5 1.0 1.5 2.0

2-D Electron Density (1012cm-2)

(4

2 - 0 Hole Densify (10’2cm-21

ib)

- 2.5 I I I

300°K N

-9 - -

2. c .- E 1.5

- al n

0 1.0 - c

c u al - W

0

N

0.5 -

0 0.5 1.0 1.5 2.0 2.5

Gate Voltage (Volts 1

ia) 2.5 I I I I I

% 2.0 - 300°K - - - s

- c

1.5 - ._ Ln c al 0 - - a, 1.0

- 0 I

0.5 - - N

0 . -2.0 -1.5 -1.0 -0.5 0

Gote Voltage (Volts)

(b) Fig. 2. Fermi potential versus 2-D carrier density at 77 and 300 K for (a) Fig. 3. 2-D carrier density versus Gate voltage ( d = 400 A). Dots: exact

electron and (b) hole gas. Dots: exact calculation. Solid lines: approxi- calculation. Solid line: present model, ill), (19). Dashed line: model mation given by (S), (16). Dashed lines: approximation used in [SI, [ 9 ] . used in [SI, [9 ] .

some experimental results presented below. The exact where Ap and V,,, in the same units as for electrons, are distribution of p-type dopants may depend upon the lat- given by era1 diffusion of acceptors from the p+-implanted region into the channel. A,(T) = 2.31 X 10-lOT + 8.06 X (17)

From (7) and (8), we get a new charge control model V o p ( T ) = 1.41 x 10-7T2 + 4.12 X 10-4T + 4.48 qns = C O X [ V , - V, - KF(V, - V ) 1 (11) 112

X (18) where The resulting charge-control model for the P-HIGFET is

( 1 2 ) given by

4 p s = Cox[ - V, - V, - KF( - V, -- V,) ] (19) 1 12

COXA: V r = Vb, - V,, - - ( where V, and Vr are given by (12), (14) with Vbln replaced

4q by Vbjn = EgAIGaAs - c&, - AE,, respectively. Here,

KF = [cot’]112 EgAIGaAs is the energy gap of AlGaAs and AE, is the val- ( 14) ence band discontinuity. The threshold voltage is given

by The threshold voltage is obtained by setting n, = 0 vthp = - ( Vbip - Vop>

= - (V , + -J,>. COXA; (20)

(15) In Fig. 3 , n, and p s calculated using the new charge-control model are compared with those calculated using the exact V ( 0 ) - n, relation and the charge-control model used in [8], [9]. It can be seen that the new charge-control model is extremely accurate even in the subthreshold re-

The charge-control model for the P-HIGFET can be cle- rived in the same way as for the N-HIGFET. In this case, V ( 0 ) is approximated in the form of

- V ( 0 ) = A,P,”~ - Vop (16) gion.

BAEK et 41.: I-V AND C-V CHARACTERISTICS OF HIGFET’S 1653

111. CURRENT-VOLTAGE CHARACTERISTICS The &-v& characteristics for the N-HIGFET

Saturation can be found from Ohm’s law below

(21)

where W is the width of the HIGFET, pn is the electron mobility, and V is the channel potential. Replacing Vg in (1 1) by the effective gate voltage Vgs-V, and integrating from the source to the drain yields

I& = /3[(VgS - V,) V, - IVL + $KF{(Vgd - v,)3/2

where ,6 = W p , Co,/L and L is the gate length. To deter- mine the onset of saturation, we use a two-piece linear approximation for the field dependence of the carrier velocity. In this approximation, velocity saturation occurs when the electric field reaches the critical field at the drain end of the channel

IDSsat = wqnsvs

= ~ F , L [ vgS - v, - v, - W ( V , S - vds - VJ 1. (23) 1 /’

The saturation voltage VDSSat and the saturation current ZDssat can be found by equating (22) and (23), which results in the following dimensionless equation:

u - x + a - y ( u - x ) 1 /’

= ( u + a) x - $x’ - $y[u3/‘ - ( u - xy”] (24)

where

For a given V,,, the saturation voltage VDSsat can be found by solving the above equation. Since (25) cannot be solved analytically, we solve the equation numerically and fit the saturation voltage by the following expression:

where a, b, and n are functions of y given by

O ( Y ) = 0.3112~’ - 0 . 4 5 1 9 ~ - 0.7466 (31)

b ( y ) = 0.0409y’ - 0.24893. + 0.1181 (32)

n ( y ) = -0 .0323~’ + 0.156411 + 1.163. (33)

The saturation current can be obtained by substituting (30) into either (22) or (23). Since Ids in (23) is a more rapidly changing function of vds than that in (22), a small error in (30) may result in a substantial error in the saturation current. Therefore, we obtain the saturation current from (22)

IDSsat = P [ ( vgs - vc) VDSsat - 4 v h s a t

+ $KF{(vgs - VDSsat - vrl3’’

(34)

The corresponding saturation transconductance is obtained by differentiating ZDSsat with respect to Vgs

It should be mentioned, however, that when the electric field is high enough to cause velocity saturation, electron heating will take place and the nonequilibrium situation will prevail in the saturation region. It was reported [18] that in this case the electron heating led to a 2-D electron density even smaller than the bulk electron density (the 2-D electron densities in the second and higher subbands were regarded as bulk electrons). Therefore, when the channel is strongly pinched off, the charge-control model and the two-piece approximation for the velocity-electric field characteristics presented in this paper may lose their validity. Hence, this model is only used to predict the saturation currents and voltages at the onset of velocity saturation. A two-dimensional numerical approach should be employed for determining the device behavior in the saturation regime.

IV. CAPACITANCE-VOLTAGE CHARACTERISTICS Our new charge-control model can be used to find the

gate capacitance of HIGFET’s. The gate capacitance when the source And the drain are tied together is obtained by differentiating (11) with respect to the gate voltage,

1654 IEEE TR4NSACTIONS ON ELECTRON DEVICES, VOL. ED-34, NO. 8, AUGUST l Y 8 1

0 o 0.25 0 W c 1

I

I I 0.5 1.0 1.5 2.0 2.5

Gate Voltage (Vgs /Vs, 1

Fig. 4. Normalized gate-to-channel capacitance versus normalized gatc voltage ( V,, = F,L) . Dots: exact calculation. Solid line: calculation b:! present model.

which is valid for the gate voltages above the threshold. Fig. 4 shows a comparison of the gate capacitance calculated using our model with that using the exact relation between V ( 0 ) and n,.

The total charge in the channel when the gate and the drain are biased can be calculated by integrating (1 1) with V, replaced by Vgs - V

L

QT = W 1 qn, 0

= mc0, (37)

The srnall-signal gate-to-source and gate-to-drain cayac- itances C,, and Cgd, can be calculated by differentiaing QT with respect to Vgs and Vgd, respectively. The results are shown in Fig. 5 , where the drain voltage is up to the saturation voltage. A comparison of the capacitance characteristics presented in this paper with those in [9] clearly demonstrates that our model describes the subthreshold region quite well.

v. CALCULATIONS AND COMPARISON WITH EXPERIMENTAL RESULTS

Both the N- and P-HIGFET’s used in the experiment were fabricated using an MBE-grown structure consisting of a 400-A (300-A for P-HIGFET’s) thick Alo.5Gao.5As undoped layer on top of a 0.5-pm-thick undoped GaAs layer. Different ohmic contacts are made for N- and P- HIGFET’s. The details of the fabrication process are presented elsewhere [TI, [2]. For the calculation of jh,-Vds characteristics, our model was implemented into the UM- SPICE simulation program.

It was found that the gate leakage current plays an extremely important role in HIGFET’s. The mechanjsm for gate conduction was studied in detail in [19] for a wide range of gate voltages and temperatures. For the r;imula- tion, a simple diode current equation with an appropriate

i I , , , l - 0

0 0.25 0.5 075 1.0

Droin-to-Source Voltage (Vds/V,, )

(a)

L7 ‘0 0.25 0.5 0.75 1.0

Drain-to-Source Voltage CVd,/Vs,)

(b) Fig. 5. (a) Normalized gate-to-source capacitance and (b) normalized gate-

to-drain capacitance versus normalized drain-to-source voltage for different normalized gate-to-source voltages ( Vis= V, - V,, V,, = F,L) .

ideality factor was used because such equations were found to be valid for a gate voltage higher than the threshold voltage, and the gate current for a gate voltage less than the threshold voltage was small enough to be neglected as far as the drain current characteristics are concerned [19]

The calculated gate current is compared with the measured one in Fig. 6 for different drain-to-source voltages. The ideality factor n, the reverse saturation current Zs, and the sum of the source and gate series resistances were de- termined from Igs for V& = 0 V. Then the source, drain, and gate series resistances were chosen to obtain the best fit to Zgs with nonzero Vds. As can be seen in Fig. 6, the agreement between the calculated and the measured gate current is quite good. We notice some discrepancy in the gate current for nonzero drain-to-source voltages. This may imply that, for nonzero drain-to-source voltages, a change in the ideality factor occurs that may be related to a change of the carrier effective temperature. Using this gate current characteristic along with the series resistances, Zd,-Vd, characteristics were calculated. The values of parameters such as Schottky-barrier height, carrier mo- bilities, saturation velocities, and the output conduc- tance parameter X [12] were chosen to obtain the best fit

BAEK et al.: I-V AND C-V CHARACTERISTICS OF HIGFET'S 1655

2.5 v I I

2.0 - - a

1.5 - r

L 3 1.0 - D 0 a r

0.5 -

n -0 1.0 2.0 3.0

Gate-to-Source Voltage ( Vol ts)

(a)

1.7 V

1.3V c-

-1.0) I I I I 0 1.0 2.0 3.0 4.0

Drain - to-Source Voltage (Volts)

(a)

0

- -1.0 4 E - e

s -2.0 V a 0 el -

-3.0

-4.0 -3 -4.0 -3.0 -2.0 -1.0 0

Gate-to-Source Voltage (Volts) Droin-to-Source Voltage (Volts)

(b) (b)

Fig. 6 . Z,,-V,, characteristics of (a) an N-HIGFET and (b) a P-HIGFET Fig. 7 . Ids-Vds characteristics of (a) an N-HIGFET and (b) a P-HIGFET at 300 K. Dashed lines: experimental measurements. Solid line: theo- at 300 K. Dashed lines: experimental measurements. Solid lines: Theo- retical calculation. retical calculations.

to the experimental results. All the values of parameters used in the calculation including the device dimensions? the energy gap of Alo.5Ga,,sAs, and the band discontinu- ities at the AlGaAs /GaAs interface [20], [21] are sum- marized in Table I. All of these values seem quite reason- able.

The calculated and measured I&-vd$ characteristics for both N- and P-HIGFET's are shown in Fig. 7. An excellent agreement was obtained between the theoretical calculations and the experimental measurements. Two interesting points, however, should be mentioned that are not incorporated in the present model. First, the drain currents for high gate voltages are off from the origin even at Vds = 0 V. For high gate voltages and low drain voltages, the drain current is reduced from the intrinsic one due to the leakage current from the gate to the drain resulting in a negative drain current for some range of the drain voltage. The intrinsic drain current increases with the drain voltage while the gate-to-drain leakage current decreases. For drain voltages comparable to the gate voltage, the gate-to-drain leakage current is cut off, and its effect on the drain current disappears. Another interesting phenomenon in z&-vd$ characteristics is the negative dif- ferential resistance observed for high gate voltages and

TABLE I PARAMETERS

Parameters Unit Value

N-HIGFET P-HIGFET

X 0 . 5 0 . 5

E ~ A ~ G ~ A S eV 1.97 1 . 9 7

4 % eV 0 . 3 2 0.32

E" eV 0 . 2 4 0 . 2 4

*b eV 1.20 1.33

d

w Pm 10 10

0 P 400 300

k m

cmz/V-s

cm/s

n

n

n

1 /v b P

1

3500

1. 4x107

60

60

320

0 . 0 5

1 . 3 2 ~ 1 0 - ~

9 . 3 4

1

130

0 . 5x107

500

500

15

0.25

8.10~10-

1 0 . 4 7

7

1656 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-34, NO. 8, AUGUST 1987

0 0


(a)

c .- r;

-3.0 -2.0 -1.0 0


@)

Fig. 8. IDSsat, GMst-Vg, characteristics of (a) an N-HIGFET and (b) a P-HIGFET at 300 K. Dashed lines: experimental measurements. Solid lines: theoretical calculations.

the drain voltages close to the saturation voltage [2 11. It is understood that the leakage to the gate of hot electrons near the drain end of the channel is responsible for this interesting phenomenon. The calculated and measwed drain saturation currents and saturation transconductances are shown in Fig. 8. For the N-HIGFET, our model is in excellent agreement with the experiment from the subthreshold through the intermediate range of the gate voltages. The P-HIGFET has a substatial subthreshold current that is not turned off completely due to the uriin- tentionally doped p-type impurities in the channel. For very high gate voltages the calculated drain saturation current exceeds the measured one for both N- and P-HIG- FET’s. This may be attributed to the saturation of the (carrier velocity in the spreading resistance between the ohmic region and the channel, which causes the series resistance to increase. In contrast to MODFET’s, parallel contluc- tion through the AlGaAs layer is estimated to be negli- gibly small in this gate voltage range.

VI. CONCLUSIONS We present a new charge-control model for hetero-

structure insulated-gate field-effect transistors. This model describes quite accurately 2-D electron and hole densities

from the subthreshold up to high gate voltages. This model leads to intrinsic Ids-v& characteristics.

This intrinsic I&-vds model together with the gate current model were used for the calculation of extrinsic Ids- v d s characteristics, drain saturation currents, and saturation transconductances of both N- and P-HIGFET’s. The calculated characteristics are in good agreement with the measured characteristics from the subthreshold up to high gate voltages.

Our model is being implemented into a circuit simulator at present, UM-SPICE, and will be used in the design .of high-speed low-power HIGFET IC’s.

ACKNOWLEDGMENT We would like to thank Dr. N. C. Cirillo for useful

discussions and P. Vold for help in measurements.

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and 0. N. Tufte, “Complementary heterostmcture insulated gate field effect transistors (HIGFET’s),” in IEDM Tech. Dig. , pp. 317-320, 1985.

[2] N. C. Cirillo, M. Shur, P. J. Vold, J. K. Abrokwah, and 0. N. Tufte, “Realization of n-channel and p-channel high mobility (A1,Ga) As/GaAs heterostructure insulated gate field effect transistors on a planar wafer surface,” IEEE Electron Device Lett., vol. EDL-6, no. 12, pp. 645-647, Dec. 1985.

[3] Y. Katayama, M. Morioka, Y. Sawada, K. Ueyanagi, T. Mishima, Y. Ono, T. Usagawa, and Y. Shiraki, “A new two dimensional electron gas field effect transistor fabricated on undoped AlGaAs-GaAs heterostructure,” Japan. J . Appl. Phys., vol. 23, no. 3, pp. LlSO- L152, Mar. 1984.

[4] K. Oe, M. Hirano, K. Arai, and F. Yanagawa, “A new p-channel AlGaAsjGaAs MIS-like heterostmcture FET employing two dimensional hole gas,” Japan. J. Appl. Phys., vol. 24, no. 4, pp. L335- L337, May 1985.

[5] T. Mizutani, S. Fujita, and F. Yanagawa, “Complementary circuit with AlGaAs/GaAs heterostructure MISFETs employing high-mobility-two-dimensional electron and hole gases,” Electron. Lett., vol. 21, no. 23, pp. 1116-1117, Nov. 1985.

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[7] J. Yoshida and M. Kurata, “Analysis of high electron mobility tranl sistor based on a two-dimensional numerical model,” IEEE Elecrron Device Lett., vol. EDL-5, no. 12, pp. 508-510, Dec. 1984.

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[9] K. Lee, M. Shur, T. Drummond, and H. Morkop, “Current-voltage and capacitance-voltage Characteristics of modulation-doped field effect transistors,” IEEE Trans. Electron Devices, vol. ED-30, no. 3, pp. 207-212, Mar. 1983.

[lo] -, “Parasitic MESFET in (Al,Ga)As/GaAs modulation doped FET’s and MODFET characterization,” IEEE Trans. Electron De- vices, vol. ED-30, no. l, pp. 29-35, Jan. 1984.

1111 M. E. Das, W. Kopp, and H. Morkoq, “Determination of carrier saturation velocity in short-gate-length modulation doped FET’s,” IEEE Electron DeviceLett., vol. EDL-5, no. 11, pp. 446-449, Nov. 1984.

[12] C. H. Hyun, M. Shur, and N. C. Cirillo, “Simulation and design analysis of (Al,Ga)As/GaAs MODFET integrated circuits,” IEEE Trans. Computer-AidedDesign ofZCAS, vol. CAD-5, no. 2, pp. 284- 292, Apr. 1985.

[13] C. H. Hyun, M. Shur, 3. H. Baek, and N. C. Cirillo, “Comparative study of MODFET integrated circuits operating at 77K and 300K,” in Proc. Cornel1 IEEE Con$ Advanced Concepts in High Speed De- vices (Ithaca, NY), July 1985.

[14] M. Shur and N. C. Cirillo, presented at WOCSEMMAD, Fort Lau- derdale, FL, 1985.

BAEK et al.: I-V AND C-V CHARACTERISTICS OF HIGFET’S 1657

D. Delagebeaudeuf and N. T. Linh, “Metal-(n) AlGaAs-GaAs two- dimensional electron gas FET,” IEEE Trans. Electron Devices, vol. ED-29, no. 6, pp. 955-960, June 1982. H. L. Stonner, Z. Schlesinger, A. Chang, D. C. Tsui, A. C. Gossard, and W. Wiegmann, “Energy structure and quantized Hall effect of two-dimensional holes,” Phys. Rev. Lett., vol. 51, no. 2, pp. 126- 129, July 1983. R. F. Pierret, “Extension of the approximate two-dimensional electron gas formulation,” IEEE Trans. Electron Devices, vol. ED-32, no. 7, pp. 1279-1287, July 1985. D. J. Widger, I. C. Kizilyalli, K. Hess, and J . J . Coleman, “Two- dimensional transient simulation of an idealized high electron mobility transistor,” IEEE Trans. Electron Devices, vol. ED-32, no. 6, pp. 1092-1102, June 1985. J . H. Baek, M. Shur, R. R. Daniels, D. Arch, and J . K. Abrokwah, “New mechanism of gate current in heterostructure insulated gate fieId effect transistors,” IEEE Electroa Device Lett., vol. EDL-7, no. 9, pp. 519-521, Sept. 1986. J . S. Blakemore, “Semiconducting and other major properties of gal- lium arsenide,” J . Appl. Phys., vol. 53, p. R123, Oct. 1982. S. Adachi, “GaAs, AlAs, and AlxGa,-xAs: Material parameters for use in research and device applications,” J . Appl. Phys., vol. 58, p. 1, Aug. 1985. M. Shur, D. Arch, R. R. Daniels, and J. K. Abrokwah, “New negative resistance regime of heterostructure insulated gate transistor (HIGFET) operation,” IEEE Electron Device Lett., vol. EDL-7, no. 2, pp. 78-80, Feb. 1986.

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Junho Baek was born in Seoul, Korea, in 1958. He received the B.S. degree in electronics engineering from Seoul National University in 1981 and the M.S.E.E. degree in electrical engineering from the University of Minnesota. He is currently working toward the Ph.D. degree. His reseach work involves the modeling, simulation, and characterization of novel heterostructure devices including MODFET’s, HIGFET’s, and GaAs/ AlGaAs superlattices.

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Michael S. Shur (M’78-SM’83) received the M.S.E.E. degree (with honors) from the Lenin- grad Electrotechnical Institute in 1965 and the Ph.D. degree in physics from the A.F. Ioffe In- stitute of Technology in 1967.

From 1965 to 1976, he was with the A.F. Ioffe Institute of Physics and Technology. In 1976, he joined the School of Electrical Engineering, Cor- ne11 University, Ithaca, NY, and then the Depart- ment of Electrical Engineering, Wayne State Uni- versity, Detroit, MI. During 1978, he was with

the School of Engineering, Oakland University, Rochester, MI. In 1979, he joined the Department of Electrical Engineering, University of Minne- sota, Minneapolis, where is currently a Professor of Electrical Engineer- ing. His research has included ferroelectrics, amorphous semiconductors, hot-electron effects, solar cells, high-speed microwave devices, and integrated circuits.

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Robert R. Daniels received the B.S. degree in physics and mathematics in 1979 and the Ph.D. degree in physics in 1984 from the University of Wisconsin, Madison.

Since joining the Honeywell Physical Sciences Center in 1984, his work has involved the study of morphological and electronic defects in MBE- grown GaAs / AlGaAs heterostrpctures and the development of heterostructure FET.’s. Currently, his work involves the characterization and development of AlGaAs /InGaAs and AlGaAs / GaAs heterostructure insulated-gate FET’s for enhancement-depletion and complementary logic applications.

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David K. Arch (M’85), photograph and biography not available at the time of publication.

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Jonathon K. Abrokwah (S’77-M’79), available at the time of publication.

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photograph and biography not

Documents

Current-voltage and capacitance-voltage characteristics of heterostructure insulated-gate field-effect transistors