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CSE140: Components and Design Techniques CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz, Boriello, Vahid, Perkowski 1

CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

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Page 1: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

CSE140: Components and Design Techniques CSE140: Components and Design Techniques for Digital Systems

FSM Optimization

Tajana Simunic Rosing

Sources: TSR, Katz, Boriello, Vahid, Perkowski

1

Page 2: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Overview• HW#5 due• Where we’ve beenWhere we ve been

– Finite State Machine definition– Mealy vs. Moore FSM

D i d f FSM– Design procedure for FSMs1. Capture FSM2. Select architecture3. Encode the states4. Create state table5. Implement combinational logic

• What is next– FSM optimization– State assignment and partitioning

Sources: TSR, Katz, Boriello, Vahid, Perkowski

2

State assignment and partitioning

Page 3: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

FSM Optimization Flow Chart

S bl

• Goal : remove redundant states which can not be observed from the FSM I/O behavior

• Why : 1 Reduce number of FFs

p

State tables

State minimization identify and remove equivalent states

Why : 1. Reduce number of FFs2. Increase # unassigned state codes

State assignment

y q

assign unique binary code to each stateState assignment assign unique binary code to each state

Combinational logic optimization use unassigned state-codes as don’t care

Sources: TSR, Katz, Boriello, Vahid, Perkowski

netlist

Page 4: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Successive partitioning algorithm for state minimization

• Goal– identify and combine states that have equivalent behavioridentify and combine states that have equivalent behavior

• Algorithm sketch1. place all states in one set2. initially partition set based on the output behavior3. successively partition the resulting subsets based on next state

transitions4. repeat (3) until no further partitioning is possible

• states left in the same set are equivalent

• Polynomial time procedure• Polynomial time procedure

Sources: TSR, Katz, Boriello, Vahid, Perkowski

4

Page 5: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Method of successive partitions

Input Next State OutputSequence Present State X=0 X=1 X=0 X=1

p

Sequence Present State X=0 X=1 X=0 X=1

Reset S0 S1 S2 0 00 S1 S3 S4 0 01 S2 S5 S6 0 000 S3 S0 S0 0 000 S3 S0 S0 0 001 S4 S0 S0 1 010 S5 S0 S0 0 011 S6 S0 S0 1 0

( S0 S1 S2 S3 S4 S5 S6 )

( S0 S1 S2 S3 S5 ) ( S4 S6 )( ) ( )

( S0 ) ( S3 S5 ) ( S1 S2 ) ( S4 S6 )

Sources: TSR, Katz, Boriello, Vahid, Perkowski

5

Page 6: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Minimized FSMInput Next State OutputSequence Present State X=0 X=1 X=0 X=1

Reset S0 S1 S2 0 00 S1 S3 S4 0 01 S2 S5 S6 0 000 S3 S0 S0 0 001 S4 S0 S0 1 001 S4 S0 S0 1 010 S5 S0 S0 0 011 S6 S0 S0 1 0

( S0 ) ( S1 S2 ) ( S3 S5 ) ( S4 S6 )

Input Present Next State OutputSequence State X=0 X=1 X=0 X=1S0

Reset S0 S1' S1' 0 00 + 1 S1' S3' S4' 0 000+10 S3' S0 S0 0 001+11 S4' S0 S0 1 0

S1’

X/0

1/00/0

Sources: TSR, Katz, Boriello, Vahid, Perkowski

6

S3’ S4’

1/00/1X/0

Page 7: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Basic ConceptspCompatiblity:

Si, Sj are compatible if for each input they have consistent outputs,and their successors are the same or compatible

xS a b c d a b c d

and their successors are the same or compatible.

States conditionally1 – 3 4 2 – 1 1 1

2 4 – – – 0 – – –

3 6 6 – – 0 1 – –

States conditionally compatible

4 – 6 1 5 – 0 0 1

5 – – 2 – – – 1 –

6 3 – 2 3 0 – 0 1

Compatible states

Incompatible states

Conditionally compatible : Si, Sj are conditionally compatible if their outputs and ne t states are consistent for some pairs of s ccessors

Sources: TSR, Katz, Boriello, Vahid, Perkowski

7

next states are consistent for some pairs of successors (Si, Sj) ≠ (Sk, Sl)

Page 8: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Triangular tableg

2

Because of conditional compatibility we use triangular table in all calculations

3

4

5

vx

(i j)1 2 3 4

We fill the cells of triangular table as follows:

(i,j)

We fill the cells of triangular table as follows:

v – if pair of states is compatible,

x – if pair of states in incompatible,

(i,j) – pair (pair of successors), if the pair is diti ll tibl

Sources: TSR, Katz, Boriello, Vahid, Perkowski

8

conditionally compatible.

Page 9: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Triangular table – example g p

a b c d a b c dNext state Output

1 – 3 4 2 – 1 1 1

2 4 – – – 0 – – –

3 6 6 – – 0 1 – –

4 6 1 5 0 0 1

2

3

v

36 464 – 6 1 5 – 0 0 1

5 – – 2 – – – 1 –

4

5

v

vv246 3 – 2 3 0 – 0 1

6

1 2 3 4 5

1,2; 3,5v34

Sources: TSR, Katz, Boriello, Vahid, Perkowski

9Note: a,b,c,d are input combinations; e.g. 00,01,10,11

Page 10: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Triangular table - exampleg p

To get compatible states iteratively cross out all incompatiblesTo get compatible states iteratively cross out all incompatibles

All non-crossed cells2 ∨

3 3,6 4,6

All non-crossed cells correspond to compatible pairs: (1,2); (1,3); (1,5);

4 × ∨ ×

5 2,4 ∨ ∨ ×

(1,2); (1,3); (1,5); (2,3); (2,4); (2,5); (3,5); (3,6); (4,6).

6 × 3,4 ∨ 1,2; 3,5 ×

1 2 3 4 5

Sources: TSR, Katz, Boriello, Vahid, Perkowski

10

1 2 3 4 5

Page 11: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Calculating Maximal classes of Compatibilityg p yCompatible pairs: (1,2); (1,3); (1,5); (2,3); (2,4); (2,5); (3,5); (3,6); (4,6)

1,2 1,3 1 5

1,2,3 Maximal Class of Compatibility (MCC):

1,2,5 1,5 2,3 2,42 5

1,2,3,51,3,5 2,3,5 2,4

3,62,5 3,5 3,64 6

3,64,6

4,6

MCC = {{1 2 3 5} {2 4} {3 6} {4 6}}

Sources: TSR, Katz, Boriello, Vahid, Perkowski

11

MCC {{1,2,3,5}, {2,4}, {3,6}, {4,6}}

Page 12: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Another exampleppresent next state outputstate 00 01 10 11S0 S0 S1 S2 S3 1S1 S0 S3 S1 S4 0

S1

S2

S1 S0 S3 S1 S4 0S2 S1 S3 S2 S4 1S3 S1 S0 S4 S5 0S4 S0 S1 S2 S5 1S5 S1 S4 S0 S5 0

S3

S4

S5

S0 S1 S2 S3 S4

Sources: TSR, Katz, Boriello, Vahid, Perkowski

Page 13: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Minimization Algorithmg

1) Find all pairs of compatible states,1) Find all pairs of compatible states,

2) Calculate maximal sets of compatible states (MCC)states (MCC),

3) Select sets that satisfy the covering condition (a) and the closure condition (b):

a) Each state must be in at least one class;

b) For each input symbol all next states of each class must be included into one class.

Sources: TSR, Katz, Boriello, Vahid, Perkowski

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Page 14: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Covering Condition - exampleg pa b c d a b c d

1 – 3 4 2 – 1 1 11 3 4 2 1 1 1

2 4 – – – 0 – – –

3 6 6 – – 0 1 – –

4 – 6 1 5 – 0 0 1

5 – – 2 – – – 1 –

6 3 – 2 3 0 – 0 1

MCC = {{1,2,3,5}, {3,6}, { 2,4}, {4,6}}

Covering condition:Each state must be in at least one class

Satisfy covering condition!{1,2,3,5}, {4,6}

Each state must be in at least one class

Sources: TSR, Katz, Boriello, Vahid, Perkowski

14

Page 15: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Closure condition - examplep

a b c d a b c dFor selected classes{1,2,3,5},{4,6}} we calculate their

1 – 3 4 2 – 1 1 1

2 4 – – – 0 – – –

3 6 6 – – 0 1 – –

successors

4 – 6 1 5 – 0 0 1

5 – – 2 – – – 1 –

6 3 2 3 0 0 16 3 – 2 3 0 – 0 1 a b c d

1,2,3,5 4,6 3,6 2,4 23,6! 2,4!Closure condition:

4,6

Closure condition is not satisfied!

3 6 1,2 3,5Closure condition:For each input symbol all next states of each class must be included into one class.

Sources: TSR, Katz, Boriello, Vahid, Perkowski

15

Closure condition is not satisfied!

Page 16: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Condition of covering and closure – second try

a b c d a b c dMCC = {{1,2,3,5}, {3,6}, { 2,4}, {4,6}}

1 – 3 4 2 – 1 1 1

2 4 – – – 0 – – –

3 6 6 – – 0 1 – – a b c d a b c d

Selection: {1,2}, {3,5}, {4,6}

4 – 6 1 5 – 0 0 1

5 – – 2 – – – 1 –

6 3 2 3 0 0 1

A 1,2

B 3,5 6 6 2 –

4 3 4 2 0 1 1 1

0 1 1 –6 3 – 2 3 0 – 0 1

C 4,6 3 6 1,2 3,5 0 0 0 1

a b c d a b c d

A C B C A 0 1 1 1B C C A – 0 1 1 –

O.K.

Sources: TSR, Katz, Boriello, Vahid, Perkowski

16

B C C A – 0 1 1 –C B C A B 0 0 0 1

Page 17: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Another examplep0 1 0 1

21 2 6 0 0

2 3 1 1 1

2

3

3 – 4 – 0

4 – 5 – 0

4

5

5 3 – 1 –

6 7 – 1 –

6

7

7 – 8 – 0

8 – – – 1

8

1 2 3 4 5 6 7

Sources: TSR, Katz, Boriello, Vahid, Perkowski

17

Page 18: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Maximal compatibility classp y

21,31 7

Compatibles: MCC:

3

4

46

56 45

1,72,52,83,4 3 4 6

3,4,52,5,8

4

5

6 37

56 45

v v v

37

3,43,53,64,5

3,4,64,5,74,6,71,36

7

8

37

68 48 58

v v

v v

v

37 4,64,75,7

1,76,8

8

1 2 3 4 5 6 7

v v v 5,86,76,8

Sources: TSR, Katz, Boriello, Vahid, Perkowski

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Page 19: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Testing successor states0 1 0 1

1 2 6 0 0

2 3 1 1 12,5,83,4,5

MCC:

3 – 4 – 0

4 – 5 – 0

5 3 – 1 –

3,4,64,5,74,6,71 35 3 1

6 7 – 1 –

7 – 8 – 0

8 1

1,31,76,8

8 – – – 1

2 5 8 3 4 5 3 4 6 4 5 7 4 6 7 1 3 1 7 6 8

Table of successors2,5,8 3,4,5 3,4,6 4,5,7 4,6,7 1,3 1,7 6,8

δ(0,Si)

δ(1 Si)33–

1

– –3

45

– –7

45 5 8 5 8 64 68

7–2––3– –7– 2–

Sources: TSR, Katz, Boriello, Vahid, Perkowski

19

δ(1,Si) 1– – 45– 45– 5–8 5–8 64 68 – –

Page 20: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Covering and closure – final state selection0 1 0 1

1 2 6 0 0X2 3 1 1 1

3 – 4 – 0

4 – 5 – 0

XS 0 1 0 1

A C C 1 1

B B A 1 05 3 – 1 –

6 7 – 1 –

B B A 1 0

C A B 0 0

7 – 8 – 0

8 – – – 1

2 5 8 3 4 5 3 4 6 4 5 7 4 6 7 1 3 1 7 6 8

A B C2,5,8 3,4,5 3,4,6 4,5,7 4,6,7 1,3 1,7 6,8

δ(0,Si) 3 3 7 3 7 2 2 7

δ(1,Si) 1 45 45 58 58 46 68 –

Sources: TSR, Katz, Boriello, Vahid, Perkowski

20

( , i)

Page 21: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Minimizing states may not yield best circuitg y y• Example: edge detector - outputs 1 when last two input

changes from 0 to 1

X Q1 Q0 Q1+ Q0

+

0 0 0 0 0

g

X’0 0 1 0 00 1 1 0 01 0 0 0 11 0 1 1 1

00[0]

01

X’

1 1 1 1 1– 1 0 0 0

11[0]

[1]X’ X

X

Q1+ = X (Q1 xor Q0)

Q0+ = X Q1’ Q0’

[0]

X

Sources: TSR, Katz, Boriello, Vahid, Perkowski

21

Page 22: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Edge detector – ad hoc solutiong• "Ad hoc" solution - not minimal but cheap and fast

00

X’

00[0]

10 01

X’ X

X10[0]

01[1]

X11

X’

X’

X

X11[0]

X

Sources: TSR, Katz, Boriello, Vahid, Perkowski

22

Page 23: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Minimizing incompletely specified FSMsg p y p

• Equivalence of states is transitive when machine is fully specified• But its not transitive when don't cares are present

e.g., state outputS0 – 0 S1 is compatible with both S0 and S2S1 1 – but S0 and S2 are incompatibleS2 – 1

• No polynomial time algorithm exists for determining best grouping of states into equivalent sets that will yield the smallest number of final statesstates

Sources: TSR, Katz, Boriello, Vahid, Perkowski

Page 24: CSE140: Components and Design Techniques for Digital ... · CSE140: Components and Design Techniques for Digital Systems FSM Optimization Tajana Simunic Rosing Sources: TSR, Katz,

Summaryy• State minimization

– straightforward in fully-specified machinesg y p• Find compatible states• Define maximal compatibility class• Select states that satisfy covering and closure conditiony g

– computationally intractable in general (with don’t cares)

• Next: – State assignment– State partitioning

Sources: TSR, Katz, Boriello, Vahid, Perkowski

24