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CS 61C: Great Ideas in Computer Architecture More RISC-V Instructions and How to Implement Functions Instructors: Krste Asanović and Randy H. Katz http://inst.eecs.Berkeley.edu/~cs61c/fa17 9/14/17 Fall 2017 - Lecture #6 1

CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

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Page 1: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

CS61C:GreatIdeasinComputerArchitecture

MoreRISC-VInstructionsandHowtoImplementFunctions

Instructors:KrsteAsanović andRandyH.Katz

http://inst.eecs.Berkeley.edu/~cs61c/fa17

9/14/17 Fall2017- Lecture#6 1

Page 2: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Outline• RISC-VISAandC-to-RISC-VReview• ProgramExecutionOverview• FunctionCall• FunctionCallExample• AndinConclusion…

9/14/17 2

Page 3: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Outline• RISC-VISAandC-to-RISC-VReview• ProgramExecutionOverview• FunctionCall• FunctionCallExample• AndinConclusion…

9/14/17 3

Page 4: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

LevelsofRepresentation/Interpretation

lw x10,0(x12)lw x11,4(x12)sw x11,0(x12)sw x10,4(x12)

High-LevelLanguageProgram(e.g.,C)

AssemblyLanguageProgram(e.g.,RISC-V)

MachineLanguageProgram(RISC-V)

HardwareArchitectureDescription(e.g.,blockdiagrams)

Compiler

Assembler

MachineInterpretation

temp=v[k];v[k]=v[k+1];v[k+1]=temp;

0000 1001 1100 0110 1010 1111 0101 10001010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111

ArchitectureImplementation

Anythingcanberepresentedasanumber,

i.e.,dataorinstructions

LogicCircuitDescription(CircuitSchematicDiagrams)

9/14/17 4

Page 5: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

ReviewFromLastLecture…• Computer“words”and“vocabulary”arecalledinstructions and

instructionsetrespectively• RISC-VisexampleRISCinstructionsetusedinCS61C

– Lecture/problemsuse32-bitRV32ISA,bookuses64-bitRV64ISA• Rigidformat:oneoperation,twosourceoperands,onedestination

– add,sub,mul,div,and,or,sll,srl,sra– lw,sw,lb,sb tomovedatato/fromregistersfrom/tomemory– beq, bne, j fordecision/flowcontrol

• Simplemappingsfromarithmeticexpressions,arrayaccess,inCtoRISC-Vinstructions

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Page 6: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Processor

Control

Datapath

Recap:RegistersliveinsidetheProcessor

6

PC

RegistersArithmetic&LogicUnit

(ALU)

Memory Input

Output

Bytes

Enable?Read/Write

Address

WriteData

ReadData

Processor-MemoryInterface I/O-MemoryInterfaces

Program

Data

CS61c

Page 7: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Exampleif-else Statement• Assumingtranslationsbelow,compilef→x10 g→x11 h→x12i →x13 j→x14

if (i == j) bne x13,x14,Else f = g + h; add x10,x11,x12

else j Exit f = g – h; Else: sub x10,x11,x12

Exit:

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Page 8: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Magnitude Compares in RISC-V• Untilnow,we’veonlytestedequalities(==and!=inC);

Generalprogramsneedtotest<and>aswell.• RISC-Vmagnitude-comparebranches:

“BranchonLessThan”Syntax:blt reg1,reg2, labelMeaning: if(reg1<reg2)//treatregistersassignedintegers

goto label;• “BranchonLessThanUnsigned”

Syntax:bltu reg1,reg2, labelMeaning: if(reg1<reg2) //treatregistersasunsignedintegers

goto label;

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CLoopMappedtoRISC-VAssemblyint A[20];int sum = 0;for (int i=0; i<20; i++)

sum += A[i];

addi x9, x8, 0 # x9=&A[0]addi x10, x0, 0 # sum=0addi x11, x0, 0 # i=0

Loop:lw x12, 0(x9) # x12=A[i]add x10,x10,x12 # sum+=addi x9,x9,4 # &A[i++]addi x11,x11,1 # i++addi x13,x0,20 # x13=20blt x11,x13,Loop

9

Page 10: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

PeerInstructionWhichofthefollowingisTRUE?

RED:add x10,x11,4(x12)isvalidinRV32GREEN:canbyteaddress8GBofmemorywithanRV32wordORANGE:immmustbemultipleof4forlw x10,imm(x10)tobevalid

:Noneoftheabove

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Page 11: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

PeerInstructionWhichofthefollowingisTRUE?

RED:add x10,x11,4(x12)isvalidinRV32GREEN:canbyteaddress8GBofmemorywithanRV32wordORANGE:immmustbemultipleof4forlw x10,imm(x10)tobevalid

:Noneoftheabove

9/14/17 11

Page 12: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Outline• RISC-VISAandC-to-RISC-VReview• ProgramExecutionOverview• FunctionCall• FunctionCallExample• AndinConclusion…

9/14/17 12

Page 13: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

AssemblertoMachineCode(morelaterincourse)

foo.S bar.S

Assembler Assembler

foo.o bar.o

Linker lib.o

a.out

Assemblersourcefiles(text)

Machinecodeobjectfiles

Pre-builtobjectfilelibraries

Machinecodeexecutablefile

Assemblerconvertshuman-readableassemblycodetoinstructionbitpatterns

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Page 14: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

HowProgramisStoredMemory

Bytes

Program

Data

OneRISC-VInstruction=32bits

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Page 15: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Processor

Control

Datapath

ProgramExecution

PC

RegistersArithmetic&LogicUnit

(ALU)

Memory

BytesInstructionAddress

ReadInstructionBits

Program

Data

• PC (programcounter)isinternalregisterinsideprocessorholdingbyte addressofnextinstructiontobeexecuted

• Instructionisfetchedfrommemory,thencontrolunitexecutesinstructionusingdatapath andmemorysystem,andupdatesprogramcounter(defaultisadd+4bytestoPC,tomovetonextsequentialinstruction)

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Page 16: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

IntheNews:Whyfastcomputersmatter

CS61c 16

EuropeanWeathersupercomputerECMWF50tonnes~120,000computecores(IntelBroadwell)10PetaBytes ofstorageRunsLinuxoneachnode

Page 17: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Break!

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Page 18: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

HelpfulRISC-VAssemblerFeatures

• Symbolicregisternames– E.g.,a0-a7 forargumentregisters(x10-x17)– E.g.,zero forx0

• Pseudo-instructions– Shorthandsyntaxforcommonassemblyidioms– E.g.,mv rd, rs = addi rd, rs, 0– E.g.2,li rd, 13 = addi rd, x0, 13

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Page 19: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

RISC-VSymbolicRegisterNames

19

Numbershardwareunderstands

Human-friendlysymbolicnamesinassemblycode

Page 20: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Outline• RISC-VISAandC-to-RISC-VReview• ProgramExecutionOverview• FunctionCall• FunctionCallExample• AndinConclusion…

9/14/17 20

Page 21: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

SixFundamentalStepsinCallingaFunction

1. Putparametersinaplacewherefunctioncanaccessthem

2. Transfercontroltofunction3. Acquire(local)storageresourcesneededforfunction4. Performdesiredtaskofthefunction5. Putresultvalueinaplacewherecallingcodecan

accessitandrestoreanyregistersyouused6. Returncontroltopointoforigin,sinceafunctioncan

becalledfromseveralpointsinaprogram9/14/17 21

Page 22: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

RISC-VFunctionCallConventions• Registersfasterthanmemory,sousethem• a0–a7 (x10-x17):eightargumentregisterstopassparametersandtworeturnvalues(a0-a1)

• ra:onereturnaddressregistertoreturntothepointoforigin(x1)

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Page 23: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

InstructionSupportforFunctions(1/4)... sum(a,b);... /* a,b:s0,s1 */}int sum(int x, int y) {return x+y;}

address (shown in decimal)1000 1004 1008 1012 1016 …2000 2004

CRISC-V

InRISC-V,allinstructionsare4bytes,andstoredinmemoryjustlikedata.Sohereweshowtheaddressesofwheretheprogramsarestored.

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Page 24: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

InstructionSupportforFunctions(2/4)... sum(a,b);... /* a,b:s0,s1 */}int sum(int x, int y) {return x+y;}

address (shown in decimal)1000 mv a0,s0 # x = a1004 mv a1,s1 # y = b1008 addi ra,zero,1016 #ra=10161012 j sum #jump to sum1016 … # next instruction…2000 sum: add a0,a0,a12004 jr ra # new instr. “jump register”

9/14/17 24

CRISC-V

Page 25: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

InstructionSupportforFunctions(3/4)... sum(a,b);... /* a,b:s0,s1 */}int sum(int x, int y) {return x+y;}

2000 sum: add a0,a0,a12004 jr ra # new instr. “jump register”

• Question:Whyuse jr here?Whynot usej?

• Answer:summightbecalledbymanyplaces,sowecan’treturntoafixedplace.Thecallingproctosummustbeabletosay“returnhere”somehow.

9/14/17 25

CRISC-V

Page 26: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

InstructionSupportforFunctions(4/4)• Singleinstructiontojumpandsavereturnaddress:jumpandlink

(jal)• Before:

1008 addi ra,zero,1016 #ra=10161012 j sum #goto sum

• After:1008 jal sum # ra=1012,goto sum

• Whyhaveajal?– Makethecommoncasefast:functioncalls verycommon– Reduceprogramsize– Don’thavetoknowwhere codeis inmemorywithjal!

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Page 27: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

RISC-VFunctionCallInstructions• Invokefunction:jumpandlinkinstruction(jal)

(reallyshouldbelaj “linkandjump”)– “link”meansformanaddressorlinkthatpointsto

callingsitetoallowfunctiontoreturntoproperaddress– Jumpstoaddressandsimultaneouslysavestheaddressofthefollowing

instructioninregisterrajal FunctionLabel

• Returnfromfunction:jumpregisterinstruction(jr)– Unconditionaljumptoaddressspecifiedinregister:jr ra– Assemblershorthand:ret = jr ra

9/14/17 27

Page 28: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Outline• RISC-VISAandC-to-RISC-VReview• ProgramExecutionOverview• FunctionCall• FunctionCallExample• AndinConclusion…

9/14/17 28

Page 29: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Exampleint Leaf

(int g, int h, int i, int j){

int f;f = (g + h) – (i + j);return f;

}• Parametervariablesg,h,i, andj inargumentregistersa0,a1,

a2,anda3,andf ins0• Assumeneedonetemporaryregisters1

9/14/17 29

Page 30: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

WhereAreOldRegisterValuesSavedtoRestoreThemAfterFunctionCall?• Needaplacetosaveoldvaluesbeforecallfunction,restore

themwhenreturn,anddelete• Idealisstack:last-in-first-outqueue

(e.g.,stackofplates)– Push:placingdataontostack– Pop:removingdatafromstack

• Stackinmemory,soneedregistertopointtoit• sp isthestackpointerinRISC-V(x2)• Conventionisgrowstackdownfromhightolowaddresses

– Push decrementssp,Pop incrementssp9/14/17 30

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RISC-VCodeforLeaf()Leaf: addi sp,sp,-8 # adjust stack for 2 items

sw s1, 4(sp) # save s1 for use afterwardssw s0, 0(sp) # save s0 for use afterwards

add s0,a0,a1 # f = g + hadd s1,a2,a3 # s1 = i + jsub a0,s0,s1 # return value (g + h) – (i + j)

lw s0, 0(sp) # restore register s0 for caller lw s1, 4(sp) # restore register s1 for calleraddi sp,sp,8 # adjust stack to delete 2 itemsjr ra # jump back to calling routine

9/14/17 31

Page 32: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

StackBefore,During,AfterFunction• Needtosaveoldvaluesofs0 ands1

9/14/17 32

sp

Beforecall

spSaved s1

Duringcall

Saved s0

sp

Aftercall

Saved s1Saved s0

Page 33: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Administrivia• HW1isout!Getstartedearly.• CandMemoryManagementGuerrillaSessionistonight7-9pmin293Cory

• Smallgrouptutoringsessionshavelaunched

9/14/17 33

Page 34: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

NewRISC-Vbook!• “TheRISC-VReader”,DavidPatterson,

AndrewWaterman

• Availableat• https://www.createspace.com/7439283

• Earlyprintedition$9.99• Kindleeditiontofollowatsomepoint

• Recommended,notrequired

34

Page 35: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

Break!

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Page 36: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

WhatIfaFunctionCallsaFunction?RecursiveFunctionCalls?

• Wouldclobbervaluesina0-a7 andra• Whatisthesolution?

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Page 37: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

NestedProcedures(1/2)int sumSquare(int x, int y) {return mult(x,x)+ y;}

• SomethingcalledsumSquare,nowsumSquare iscallingmult

• Sothere’savalueinra thatsumSquare wantstojumpbackto,butthiswillbeoverwrittenbythecalltomult

NeedtosavesumSquare returnaddressbeforecalltomult

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Page 38: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

NestedProcedures(2/2)• Ingeneral,mayneedtosavesomeotherinfoinadditiontora.

• WhenaCprogramisrun,therearethreeimportantmemoryareasallocated:– Static:Variablesdeclaredonceperprogram,ceasetoexistonlyafterexecutioncompletes- e.g.,Cglobals

– Heap:Variablesdeclareddynamicallyviamalloc– Stack:Spacetobeusedbyprocedureduringexecution;thisiswherewecansaveregistervalues

389/14/17

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OptimizedFunctionConventionToreduceexpensiveloadsandstoresfromspillingandrestoringregisters,RISC-Vfunction-callingconventiondividesregistersintotwocategories:

1. Preservedacrossfunctioncall– Callercanrelyonvaluesbeingunchanged– sp,gp,tp, “savedregisters”s0- s11 (s0 isalso fp)

2. Notpreservedacrossfunctioncall– Callercannotrelyonvaluesbeingunchanged– Argument/returnregistersa0-a7,ra,“temporary

registers”t0-t69/14/17 39

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PeerInstruction• WhichstatementisFALSE?• RED:RISC-Vusesjal toinvokeafunctionandjr toreturnfromafunction

• GREEN: jal savesPC+1inra• ORANGE: Thecallee canusetemporaryregisters(ti)

withoutsavingandrestoringthem: Thecallercanrelyonsaveregisters(si)

withoutfearofcallee changingthem

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Page 41: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

PeerInstruction• WhichstatementisFALSE?• RED:RISC-Vusesjal toinvokeafunctionandjr toreturnfromafunction

• GREEN: jal savesPC+1inra• ORANGE: Thecallee canusetemporaryregisters(ti)

withoutsavingandrestoringthem: Thecallercanrelyonsaveregisters(si)

withoutfearofcallee changingthem

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Page 42: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

AllocatingSpaceonStack• Chastwostorageclasses:automaticandstatic

– Automatic variablesarelocaltofunctionanddiscardedwhenfunctionexits

– Staticvariablesexistacrossexitsfromandentriestoprocedures

• Usestackforautomatic(local)variablesthatdon’tfitinregisters

• Procedureframeor activationrecord:segmentofstackwithsavedregistersandlocalvariables

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Page 43: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

StackBefore,During,AfterFunction

439/14/17

sp

Beforecall

sp

Duringcall

Savedargumentregisters(ifany)

Savedreturnaddress(ifneeded)

Savedsavedregisters(ifany)Localvariables

(ifany)

sp

Aftercall

Page 44: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

UsingtheStack(1/2)• Sowehavearegistersp whichalwayspointstothelastusedspaceinthestack

• Tousestack,wedecrementthispointerbytheamountofspaceweneedandthenfillitwithinfo

• So,howdowecompilethis?int sumSquare(int x, int y) {

return mult(x,x)+ y;}

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Page 45: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

UsingtheStack(2/2)

45

sumSquare: addi sp,sp,-8 # space on stacksw ra, 4(sp) # save ret addrsw a1, 0(sp) # save ymv a1,a0 # mult(x,x)jal mult # call multlw a1, 0(sp) # restore yadd a0,a0,a1 # mult()+ylw ra, 4(sp) # get ret addraddi sp,sp,8 # restore stackjr ra

mult: ...

int sumSquare(int x, int y) {return mult(x,x)+ y; }

“push”

“pop”

9/14/17

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WhereistheStackinMemory?• RV32convention(RV64andRV128havedifferentmemorylayouts)• Stackstartsinhighmemoryandgrowsdown

– Hexadecimal(base16):bfff_fff0hex– Stackmustbealignedon16-byteboundary(nottrueinexamplesabove)

• RV32programs(textsegment)inlowend– 0001_0000hex

• staticdatasegment(constantsandotherstaticvariables)abovetextforstaticvariables– RISC-Vconventionglobalpointer(gp)pointstostatic– RV32gp =1000_0000hex

• Heapabovestaticfordatastructuresthatgrowandshrink;growsuptohighaddresses

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RV32MemoryAllocation

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Outline• RISC-VISAandC-to-RISC-VReview• ProgramExecutionOverview• FunctionCall• FunctionCallExample• AndinConclusion…

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Page 49: CS 61C: Great Ideas in Computer Architecturecs61c/fa17/lec/06/L06 RISCV Functions (1up).pdf• RISC-V is example RISC instruction set used in CS61C –Lecture/problems use 32-bit RV32

AndinConclusion…• Functionscalledwithjal,returnwithjr ra.• Thestackisyourfriend:Useittosaveanythingyouneed.Just leaveitthewayyou

foundit!• Instructionsweknowsofar…

Arithmetic:add, addi, subMemory: lw, sw, lb, lbu, sbDecision:beq, bne, blt, bgeUnconditionalBranches(Jumps):j, jal, jr

• Registersweknowsofar– Allofthem!– a0-a7forfunctionarguments,a0-a1forreturnvalues– sp,stackpointer, ra returnaddress– s0-s11savedregisters– t0-t6temporaries– zero

499/14/17


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