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8/6/2019 CRC Calculation
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© 2000 Microchip Technology Inc. Preliminary DS00730A-page 1
AN730
INTRODUCTIONThis application note describes the Cyclic RedundancyCheck (CRC) theory and implementation. The CRCcheck is used to detect errors in a message. Two imple-mentations are shown:
• Table driven CRC calculation• Loop driven CRC calculation
This application describes the implementation of theCRC-16 polynomial. However, there are several for-mats for the implementation of CRC such asCRC-CCITT, CRC-32 or other polynomials.
CRC is a common method for detecting errors in trans-mitted messages or stored data. The CRC is a verypowerful, but easily implemented technique to obtaindata reliability.
THEORY OF OPERATIONThe theory of a CRC calculation is straight forward. Thedata is treated by the CRC algorithm as a binary num-
ber. This number is divided by another binary numbercalled the polynomial. The rest of the division is theCRC checksum, which is appended to the transmittedmessage. The receiver divides the message (includingthe calculated CRC), by the same polynomial the trans-mitter used. If the result of this division is zero, then thetransmission was successful. However, if the result isnot equal to zero, an error occurred during the trans-mission.
The CRC-16 polynomial is shown in Equation 1. Thepolynomial can be translated into a binary value,because the divisor is viewed as a polynomial withbinary coefficients. For example, the CRC-16 poly-nomial translates to 1000000000000101b. All coeffi-cients, like x 2 or x 15 , are represented by a logical 1 inthe binary value.
The division uses the Modulo-2 arithmetic. Modulo-2calculation is simply realized by XOR’ing two numbers.
EXAMPLE 1: MODULO-2 CALCULATION
EQUATION 1: THE CRC-16 POLYNOMIAL
Example CalculationIn this example calculation, the message is two byteslong. In general, the message can have any length inbytes. Before we can start calculating the CRC value 1,the message has to be augmented by n-bits, where nis the length of the polynomial. The CRC-16 polynomialhas a length of 16-bits, therefore, 16-bits have to beaugmented to the original message. In this examplecalculation, the polynomial has a length of 3-bits, there-fore, the message has to be extended by three zeros atthe end. An example calculation for a CRC is shown inExample 1. The reverse calculation is shown inExample 2.
Authors: Thomas Schmidt Microchip Technology Inc.
1 0 0 1 1 0 0 1 0 1
0 1 0 0 1 1 0 1 1 1
1 1 0 1 0 1 0 0 1 0
XOR
=
XOR-Function X1 X2 Y0 0 00 1 11 0 1
1 1 0
P(x) = x 16 +x 15+x 2+1
CRC Generating and Checking
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DS00730A-page 2 Preliminary © 2000 Microchip Technology Inc.
EXAMPLE 2: CALCULATION FOR GENERATING A CRC
EXAMPLE 3: CHECKING A MESSAGE FOR A CRC ERROR
Message = 110101Polynomial = 101
1 1 0 1 0 1 0 0 : 1 0 1 = 1 1 1 0 11 0 1
1 1 11 0 1
1 0 0
Remainder = CRC checksum
Message with CRC = 1 1 0 1 0 1 1 1
1 0 11 1 01 0 1
1 1 01 0 1
1 1
Quotient (has no function in CRC calculation)
Message with CRC = 11010111Polynomial = 101
1 1 0 1 0 1 1 1 : 1 0 1 = 1 1 1 0 11 0 1
1 1 11 0 1
1 0 0
Checksum is zero, therefore, no transmission error
1 0 11 1 11 0 1
1 0 11 0 1
0 0
Quotient
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FIGURE 1: HARDWARE CRC-16 GENERATOR
FIGURE 2: LOOP DRIVEN CRC IMPLEMENTATION
CRC Hardware ImplementationThe CRC calculation is realized with a shift register andXOR gates. Figure 1 shows a CRC generator for theCRC-16 polynomial. Each bit of the data is shifted into
the CRC shift register (Flip-Flops) after being XOR’edwith the CRC’s most significant bit.
Software ImplementationsThere are two different techniques for implementing aCRC in software. One is a loop driven implementationand the other is a table driven implementation.
The loop driven implementation works like the calcula-
tion shown in Figure 2. The data is fed through a shiftregister. If a one pops out at the MSb, the content isXORed with the polynomial. In the other, the registersare shifted by one position to the left.
Another method to calculate a CRC is to use precalcu-lated values and XOR them to the shift register.
+++
Datax0x2x15x16Flip-Flops
CRC_HIGH CRC_LOW CRC_BUFF
C
07 7 0 07
Note: The mathematical details are not givenwithin this application note. The interestedreader may refer to the material shown inthe Reference section.
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DS00730A-page 4 Preliminary © 2000 Microchip Technology Inc.
LOOP DRIVEN CRCIMPLEMENTATIONThis section describes the loop driven CRC implemen-tation. This implementation is derived from the hard-ware implementation shown in Figure 1. The programfor the loop driven CRC generation and CRC checkingis shown in Appendix A.
CRC GenerationThe implementation of a loop driven CRC generation isshown in Figure 2. In the first step the registers,CRC_HIGH and CRC_LOW, are initialized with the firsttwo bytes of data. CRC_BUFF is loaded with the thirdbyte of data. After that, the MSb of CRC_BUFF isshifted into the LSb of CRC_LOW and the MSb ofCRC_LOW is shifted into the LSb of CRC_HIGH. TheMSb of CRC_HIGH, which is now stored in the Carryflag, is tested to see if it is set. If the bit is set, the reg-isters, CRC_HIGH and CRC_LOW, will be XORed withthe CRC-16 polynomial. If the bit is not set, the next bitfrom CRC_BUFF will be shifted into the LSb ofCRC_LOW.This process is repeated until all data from CRC_BUFFis shifted into CRC_LOW. After this, CRC_BUFF isloaded with the next data byte. Then all data bytes areprocessed, and 16 zeros are appended to the mes-sage. The registers, CRC_HIGH and CRC_LOW, con-tain the calculated CRC value. The message can haveany length. In this application note, the CRC value for8 data bytes is calculated.
CRC CheckingThe CRC check uses the same technique as the CRCgeneration, with the only difference being that zerosare not appended to the message.
TABLE DRIVEN CRCIMPLEMENTATIONA table driven CRC routine uses a different techniquethan a loop driven CRC routine. The idea behind atable driven CRC implementation is that instead of cal-culating the CRC bit by bit, precomputed bytes areXORed to the data. The source code for the tabledriven implementation is given in Appendix B.
The advantage of the table driven implementation isthat it is faster than the loop driven solution. The draw-back is that it consumes more program memory
because of the size of the look-up table.
CRC GenerationThe CRC at the table driven implementation is gener-ated by reading a precomputed value out of a table andXOR, the result with the low and high byte of the CRCshift registers.
In the first step, the registers, CRC_BUFF, CRC_HIGHand CRC_LOW, are initialized with the first three bytes
of data. After that, the value in CRC_BUFF is used asan offset to get the value for the precomputed CRCvalue out of the look-up table. Since the CRC-16 is 16bits long, the look-up table is split up into two separatelook-up tables. One for the high byte of the CRC regis-ter and one for the low byte of the CRC register (seeFigure 3). The result from the look-up table of the highbyte is XORed to the content of the CRC_HIGH regis-ter. The result for the low byte is XORed to the contentof CRC_LOW. The results are stored back inCRC_LOW.
The next step is that the content from CRC_HIGH isshifted into CRC_BUFF and the content fromCRC_LOW is shifted into the register, CRC_HIGH.Then the register, CRC_LOW, is loaded with the newdata byte.
This process repeats for all data bytes. At the end of theCRC generation, the message has to be appended by16 zeros. The 16 zeros are treated like the data bytes.
After the calculation is done, the content of the regis-ters, CRC_HIGH and CRC_LOW, are appended to themessage.
CRC CheckingThe CRC check uses the same technique as the CRCgeneration, with the difference being that zeros are notappended to the message.
COMPARISONTable 1 shows a comparison between the loop drivenimplementation and the table driven implementation.For the calculation, 8 data bytes were used.
TABLE 1: CRC-16 COMPARISON TABLE
ImplementationCRC
Generation(in cycles)
CRCCheck
(incycles)
ProgramMemoryUsage
(words)
DataBytes
Loop Driven 865 870 85 6
Table Driven 348 359 612 5
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© 2000 Microchip Technology Inc. Preliminary DS00730A-page 5
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ADVANTAGES OF CRC VS. SIMPLESUM TECHNIQUESThe CRC generation has many advantages over sim-ple sum techniques or parity check. CRC error correc-tion allows detection of:
1. single bit errors
2. double bit errors3. bundled bit errors (bits next to each other)
A parity bit check detects only single bit errors. TheCRC error correction is mostly used where large datapackages are transmitted, for example, in local areanetworks such as Ethernet.
ReferencesRoss N. Williams - A Painless Guide to CRC Error Detection Algorithms
Donald E. Knuth - The Art of Computer Programming,Volume 2, Addisson Wesley
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DS00730A-page 6 Preliminary © 2000 Microchip Technology Inc.
FIGURE 3: TABLE DRIVEN CRC CALCULATION IMPLEMENTATION
CRC_BUFF CRC_HIGH CRC_LOW07 0 07 7
TABLE_HIGH0
0xFF
07 TABLE_LOW0
0xFF
07
++
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© 2000 Microchip Technology Inc. Preliminary DS00730A-page 17
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DS00730A-page 18 Preliminary © 2000 Microchip Technology Inc.
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0 8
C D
0 8
C 7
0 0 3 0
8
d t
0 x c
8 ,
0 x c
d ,
0 x c
7 ,
0 x c
2
0 8
C 2
0 4 6 1
0 8 4 0
0 8 4 5
0 8 4
F
0 0 3 0
9
d t
0 x
4 0
,
0 x
4 5
,
0 x
4 f
,
0 x
4 a
0 8 4
A
0 4 6 5
0 8 5
B
0 8 5
E
0 8 5 4
0 0 3 1
0
d t
0 x
5 b
,
0 x
5 e ,
0 x
5 4
,
0 x
5 1
0 8 5 1
0 4 6 9
0 8 7 3
0 8 7 6
0 8 7
C
0 0 3 1
1
d t
0 x
7 3
,
0 x
7 6
,
0 x
7 c ,
0 x
7 9
0 8 7 9
0 4 6
D
0 8 6 8
0 8 6
D
0 8 6 7
0 0 3 1
2
d t
0 x
6 8
,
0 x
6 d
,
0 x
6 7
,
0 x
6 2
0 8 6 2
0 4 7 1
0 8 2 3
0 8 2 6
0 8 2
C
0 0 3 1
3
d t
0 x
2 3
,
0 x
2 6
,
0 x
2 c ,
0 x
2 9
0 8 2 9
0 4 7 5
0 8 3 8
0 8 3
D
0 8 3 7
0 0 3 1
4
d t
0 x
3 8
,
0 x
3 d
,
0 x
3 7
,
0 x
3 2
0 8 3 2
0 4 7 9
0 8 1 0
0 8 1 5
0 8 1
F
0 0 3 1
5
d t
0 x
1 0
,
0 x
1 5
,
0 x
1 f
,
0 x
1 a
0 8 1
A
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© 2000 Microchip Technology Inc. Preliminary DS00730A-page 21
AN730
0 4 7
D
0 8 0
B
0 8 0
E
0 8 0 4
0 0 3 1
6
d t
0 x
b ,
0 x e ,
0 x
4 ,
0 x
1
0 8 0 1
0 4 8 1
0 8 0 3
0 8 0 6
0 8 0
C
0 0 3 1
7
d t
0 x
3 ,
0 x
6 ,
0 x c ,
0 x
9
0 8 0 9
0 4 8 5
0 8 1 8
0 8 1
D
0 8 1 7
0 0 3 1
8
d t
0 x
1 8
,
0 x
1 d
,
0 x
1 7
,
0 x
1 2
0 8 1 2
0 4 8 9
0 8 3 0
0 8 3 5
0 8 3
F
0 0 3 1
9
d t
0 x
3 0
,
0 x
3 5
,
0 x
3 f
,
0 x
3 a
0 8 3
A
0 4 8
D
0 8 2
B
0 8 2
E
0 8 2 4
0 0 3 2
0
d t
0 x
2 b
,
0 x
2 e ,
0 x
2 4
,
0 x
2 1
0 8 2 1
0 4 9 1
0 8 6 0
0 8 6 5
0 8 6
F
0 0 3 2
1
d t
0 x
6 0
,
0 x
6 5
,
0 x
6 f
,
0 x
6 a
0 8 6
A
0 4 9 5
0 8 7
B
0 8 7
E
0 8 7 4
0 0 3 2
2
d t
0 x
7 b
,
0 x
7 e ,
0 x
7 4
,
0 x
7 1
0 8 7 1
0 4 9 9
0 8 5 3
0 8 5 6
0 8 5
C
0 0 3 2
3
d t
0 x
5 3
,
0 x
5 6
,
0 x
5 c ,
0 x
5 9
0 8 5 9
0 4 9
D
0 8 4 8
0 8 4
D
0 8 4 7
0 0 3 2
4
d t
0 x
4 8
,
0 x
4 d
,
0 x
4 7
,
0 x
4 2
0 8 4 2
0 4
A 1
0 8
C 0
0 8
C 5
0 8
C F
0 0 3 2
5
d t
0 x c
0 ,
0 x c
5 ,
0 x c
f ,
0 x c a
0 8
C A
0 4
A 5
0 8
D B
0 8
D E
0 8
D 4
0 0 3 2
6
d t
0 x
d b
,
0 x
d e ,
0 x
d 4
,
0 x
d 1
0 8
D 1
0 4
A 9
0 8
F 3
0 8
F 6
0 8
F C
0 0 3 2
7
d t
0 x
f 3
,
0 x
f 6
,
0 x
f c ,
0 x
f 9
0 8
F 9
0 4
A D
0 8
E 8
0 8
E D
0 8
E 7
0 0 3 2
8
d t
0 x e
8 ,
0 x e
d ,
0 x e
7 ,
0 x e
2
0 8
E 2
0 4
B 1
0 8
A 3
0 8
A 6
0 8
A C
0 0 3 2
9
d t
0 x a
3 ,
0 x a
6 ,
0 x a c ,
0 x a
9
0 8
A 9
0 4
B 5
0 8
B 8
0 8
B D
0 8
B 7
0 0 3 3
0
d t
0 x
b 8
,
0 x
b d
,
0 x
b 7
,
0 x
b 2
0 8
B 2
0 4
B 9
0 8 9 0
0 8 9 5
0 8 9
F
0 0 3 3
1
d t
0 x
9 0
,
0 x
9 5
,
0 x
9 f
,
0 x
9 a
0 8 9
A
0 4
B D
0 8 8
B
0 8 8
E
0 8 8 4
0 0 3 3
2
d t
0 x
8 b
,
0 x
8 e ,
0 x
8 4
,
0 x
8 1
0 8 8 1
0 4
C 1
0 8 8 0
0 8 8 5
0 8 8
F
0 0 3 3
3
d t
0 x
8 0
,
0 x
8 5
,
0 x
8 f
,
0 x
8 a
0 8 8
A
0 4
C 5
0 8 9
B
0 8 9
E
0 8 9 4
0 0 3 3
4
d t
0 x
9 b
,
0 x
9 e ,
0 x
9 4
,
0 x
9 1
0 8 9 1
0 4
C 9
0 8
B 3
0 8
B 6
0 8
B C
0 0 3 3
5
d t
0 x
b 3
,
0 x
b 6
,
0 x
b c ,
0 x
b 9
0 8
B 9
0 4
C D
0 8
A 8
0 8
A D
0 8
A 7
0 0 3 3
6
d t
0 x a
8 ,
0 x a
d ,
0 x a
7 ,
0 x a
2
0 8
A 2
0 4
D 1
0 8
E 3
0 8
E 6
0 8
E C
0 0 3 3
7
d t
0 x e
3 ,
0 x e
6 ,
0 x e c ,
0 x e
9
0 8
E 9
0 4
D 5
0 8
F 8
0 8
F D
0 8
F 7
0 0 3 3
8
d t
0 x
f 8
,
0 x
f d
,
0 x
f 7
,
0 x
f 2
0 8
F 2
0 4
D 9
0 8
D 0
0 8
D 5
0 8
D F
0 0 3 3
9
d t
0 x
d 0
,
0 x
d 5
,
0 x
d f
,
0 x
d a
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AN730
DS00730A-page 22 Preliminary © 2000 Microchip Technology Inc.
0 8
D A
0 4
D D
0 8
C B
0 8
C E
0 8
C 4
0 0 3 4
0
d t
0 x c
b ,
0 x c e ,
0 x c
4 ,
0 x c
1
0 8
C 1
0 4
E 1
0 8 4 3
0 8 4 6
0 8 4
C
0 0 3 4
1
d t
0 x
4 3
,
0 x
4 6
,
0 x
4 c ,
0 x
4 9
0 8 4 9
0 4
E 5
0 8 5 8
0 8 5
D
0 8 5 7
0 0 3 4
2
d t
0 x
5 8
,
0 x
5 d
,
0 x
5 7
,
0 x
5 2
0 8 5 2
0 4
E 9
0 8 7 0
0 8 7 5
0 8 7
F
0 0 3 4
3
d t
0 x
7 0
,
0 x
7 5
,
0 x
7 f
,
0 x
7 a
0 8 7
A
0 4
E D
0 8 6
B
0 8 6
E
0 8 6 4
0 0 3 4
4
d t
0 x
6 b
,
0 x
6 e ,
0 x
6 4
,
0 x
6 1
0 8 6 1
0 4
F 1
0 8 2 0
0 8 2 5
0 8 2
F
0 0 3 4
5
d t
0 x
2 0
,
0 x
2 5
,
0 x
2 f
,
0 x
2 a
0 8 2
A
0 4
F 5
0 8 3
B
0 8 3
E
0 8 3 4
0 0 3 4
6
d t
0 x
3 b
,
0 x
3 e ,
0 x
3 4
,
0 x
3 1
0 8 3 1
0 4
F 9
0 8 1 3
0 8 1 6
0 8 1
C
0 0 3 4
7
d t
0 x
1 3
,
0 x
1 6
,
0 x
1 c ,
0 x
1 9
0 8 1 9
0 4
F D
0 8 0 8
0 8 0
D
0 8 0 7
0 0 3 4
8
d t
0 x
8 ,
0 x
d ,
0 x
7
0 0 3 4
9
0 0 3 5
0
E N D
P r o g r a m
M e m o r y
W o r
d s
U s e
d :
6 2 1
P r o g r a m
M e m o r y
W o r
d s
F r e e :
1 4 2 7
E r r o r s
:
0
W a r n
i n g s
:
0
r e p o r t e
d ,
0
s u p p r e s s e
d
M e s s a g e s
:
5
r e p o r t e
d ,
0
s u p p r e s s e
d
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