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White Paper

 Next-Generation Digital

Television

 November 1998

For more information contact:

Raghu Rao

TeraLogic, Inc.

707 California Street

Mountain View, CA 94041

[email protected]

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Next Generation Digital TV

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Introduction

The television industry is at the threshold of a major revolution—the advent of digital

television (DTV). On Nov 1 1998, 42 stations in the United States started broadcasting

DTV programming, marking a major milestone in TV history. The transition from analog

to DTV will radically alter the way we use TV. In the not-too-distant future, consumers

will be able to shop, bank and communicate while being entertained by a true cinematic

experience in their homes.

DTV broadcasting delivers crystal-clear pictures that approach the quality of 35mm

movies and CD sound, creating a true “home-theater” experience for consumers. The

pictures, rich with vibrant colors and sharp details, enable viewers to discern blades of 

grass or intricate design patterns on a Persian carpet, making it a truly engrossing

experience. In addition to dramatic improvements in picture and sound quality, DTV

brings a host of new viewing options and TV-based interactive services, causing a

paradigm shift in the way consumers interact with TV. The DTV revolution promises to

change TV from a passive, one-way entertainment medium to a rich, interactive appliance

that combines communication, information services and entertainment. The new digital

standard has enough bandwidth to allow TV stations to broadcast multiple programs at

the same time or transmit data in conjunction with TV programming to enable TV-based

data services.

The market potential for interactive data services on TV is huge, with applications ranging

from on-line shopping and video-on-demand to viewer participation in real-time sporting

events. Real-time interactivity allows the viewer to purchase music CDs during an MTV

broadcast or play along with the contestants in a game show. The convergence of theInternet and DTV is expected to open the floodgates for e-commerce, as generations of 

consumers accustomed to TV will be more inclined to shop than they have been on the

PC, the current Internet platform. An exciting new revenue opportunity awaits

broadcasters, service providers and TV equipment makers.

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Next Generation Digital TV

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Next Generation Digital TV

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DTV Brings Complex Challenges

DTV technology promises to usher in a new era for both consumers and the TV industry.However, there are several challenges that must be addressed before DTV can be widely

deployed in consumer homes. Consumer electronics manufacturers will face intense time-

to-market pressures in a rapidly changing environment that demands multiple versions of 

products at varying price points. It is important that manufacturers are able to develop

custom solutions quickly and cost effectively. Yet, price and time constraints must not

compromise an end product's ability to handle high-resolution, integrated graphics and

video, as next-generation DTVs will require these capabilities. Further complicating

matters for manufacturers are the fact that software and hardware standards for DTV are

not consistent worldwide. This paper describes the limitations of current DTV solutions

and the key architectural elements that are necessary for a next-generation digital set-top

box (STB) to overcome these shortcomings.

Limitations of Current-generation DTV Solutions

The current generation of DTV receivers or STBs has several limitations that inhibit the

growth of DTV. These limitations are direct results of electronics, or ASIC chips that are

used to implement the STB. The key functions of a DTV receiver or an STB are handled

by DTV decoder logic. The decoder electronics are responsible for receiving and

displaying DTV broadcasts, decoding MPEG-2 audio/video data stream, demultiplexing

the digital transport stream and handling the graphics capabilities of the STB. Figure 1

shows a typical diagram for a current-generation DTV STB.

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Next Generation Digital TV

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Figure 1: Current Generation Digital TV

The following section highlights the limitations of current DTV decoder logic in such a

design.

1. Inability to support multiple display formats: DTV broadcasts use different

transmission formats all over the world. ATSC in the United States, ARIB in Japan

and DVB in the European Union have defined different DTV video formats. Even in

the United States, there are 18 different display formats—ranging from 480i

(equivalent to current analog sets) to wide-screen HDTV 1080i resolution (see Table

1). Initial DTV standards will encompass both standard-definition TV (SDTV) at 480

line resolution and high-definition TV (HDTV) at 720 and 1080 line resolution. TV

stations will use different display formats depending on the sophistication of their

transmission equipment and how they use the digital broadcast spectrum. Some

broadcasters have indicated that they may transmit multiple SDTV programs instead

DTV Tuner Demodulator

TransportStream

M e m o r y

Digi ta l Video Ou t

Aud io Ou t

EPROM

I/O

FLASH SDRAM

Proprietary Bus

IR

ParallelSerial

IDE

M P E G 2

Video

Dec ode/O SDEmbeddedCPU/  

Xpor tDe mu x

Display

Processor

M e m o ry

DTV Decoder Sub-system

Aux. Video Out

CCIR 601 d ig i ta lM P E G

AudioNTSC/PAL

Decoder

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Next Generation Digital TV

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of a single bandwidth-hungry HDTV program to offer more choice to their viewers.

Current-generation DTV decoders are not designed to handle all different 18 ATSC

display standards. Some support all-format input but do not output all the display

modes, forcing the manufacturers to design different boxes for SDTV and HDTV

markets. The design effort requires separate engineering teams and duplicate tools,

making it a time-consuming and expensive proposition for manufacturers.

Table 1: 18 ATSC Formats

2. High manufacturing cost: Current-generation STBs use multiple chips to handle audio

and video functions as shown in Fig 1. The chips used in these boxes are designed

with the old 0.5 micron process, resulting in large die sizes. Separate chips are

required for up and down conversions of display formats. Also, the memory usage is

not optimal with different sections of the decoder logic requiring separate storage,

wasting valuable memory resources. Such an architecture increases board space and

makes the design more complex. Lower integration, inefficient memory architecture

and archaic process technology makes current-generation decoder electronics

expensive and low-performing.

3. Inability to support evolving data services standards: Current-generation DTV

decoders have rigid and closed architectures. These solutions are not compliant with

Windows CE or PersonalJava and ATSC application programming interfaces (APIs)

and hence cannot support emerging data services applications such as on-line banking,

e-mail or web browsing. Without support for interactive applications, current-

Vertical lines Pixels Aspect Ratio Picture Rate

1080 1920 16:9 60I, 30P, 24P

720 1280 16:9 60I, 30P, 24P

480 704 16:9 and 4:3 60P, 60I, 30P, 24P

480 640 16:9 60P,60I, 30P, 24P

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Next Generation Digital TV

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generation DTV decoders do not have a compelling story for the consumer.

4. Poor user interface: For interactive data services to be engaging, the user interface

must be visually rich, easy to use and intuitive. Current DTV decoder logic has a poor

user interface due to lack of a dedicated graphics processor. The applications run

slowly, have poor graphics quality, inferior text and annoying flickering artifacts. The

current generation of STBs use embedded OSD processors in the MPEG-2 chips to

handle text and graphics. OSD processors lack graphics acceleration, have no anti-

flicker circuitry and support only 4-8 bits/pixel graphics format. Thus, they fail to

deliver a rich, interactive experience to the consumer.

5. Low performance and proprietary CPUs: Current solutions use embedded processors,

which have inadequate performance—20 MIPS or less, and they use a proprietary bus.

Emerging interactive data services applications (based on new API standards) need

powerful CPUs for real-time interaction with the viewer.

6. Rigid and closed architecture: Current DTV decoder chip architectures are inflexible,

cannot scale and do not support modularity. They use proprietary buses and operating

systems. Such architectures cannot scale up to HD display from SD or vice versa to

give more flexibility to box manufacturers. A proprietary architecture also inhibits

modularity, as it prevents the addition of new off-the-shelf standard peripherals such as

I/O devices, modems and 3-D graphics components.

With all these limitations, current-generation DTV decoders have not achieved the

distinction of a mass-market product. Instead, they have become merely a vehicle for

technology demonstration and are not encouraging the growth of DTV.

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Next Generation Digital TV

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Accelerating the Mass Acceptance of DTV in the Consumer Market

A fresh approach is needed in developing the next-generation DTV decoder solution.

Consumer electronics manufacturers will choose an architecture that is flexible andfeature-rich, yet cost-effective so that they can keep pace with the evolving DTV market.

Such an architecture will accelerate the deployment of DTV receivers and STBs.

For chip architects, the challenge lies in developing a DTV decoder solution that is

affordable, inputs and outputs all 18 DTV formats, offers an engaging interactive user

experience, is scalable and eases the transition from conventional TV to DTV. Such an

architecture must be “open”—it must support standard bus interfaces, use widely available

CPUs and run on popular software such as Windows CE and PersonalJava.

The key requirements for the next-generation DTV decoder chipset are highlighted in the

following section.

Next-generation DTV Decoder Logic

1.  All-format support: The DTV decoder must not only decode but also display all 18

ATSC formats. A DTV receiver or an STB designed with such an advanced decoder

will receive any digital transmission and output in any display format. The decoder

should have the ability to down-convert HD signals for display on SDTVs or display

SD programs on HDTVs. All-format support ensures that consumers do not miss out

on any digital programming, regardless of what type of TV receiver they have.

Existing analog transmission and a huge installed base of analog TV sets must be

supported. Analog transmission can be viewed on a DTV by up-conversion, and HD

transmission can be viewed on an analog TV by down-conversion.

2.  Lower BOM cost: The next-generation decoder must integrate more functionality on a

single chip and employ state-of-the art process technology (0.25 micron or 0.18

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Next Generation Digital TV

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micron process) for smaller die size. Current DTV decoder architectures use separate

chips for MPEG-2 video/audio decoding, transport stream demultiplexing, graphics

functions and display processing. These four functions are the key building blocks of 

a DTV receiver. By integrating these functions on a single DTV decoder chip, the

cost can be significantly reduced. Additionally, a lower component count simplifies

the board design, reduces the board space and facilitates inventory management,

further decreasing costs for DTV manufacturers. Integration has the added benefit of 

optimized interface between various internal modules for better performance. Also,

the memory can be shared between video and graphics functions for lower memory

cost.

3.  Superior support for interactive data services: The next-generation decoder should be

compliant with DTV APIs like Windows CE and Personal Java. The architecture

should be flexible enough to support emerging API standards that are still being

defined by ATSC and DVB committees. Support for popular APIs ensures that new

data services applications, such as banking, shopping and web browsing, will run

flawlessly on a DTV solution. Compatibility with future API standards will ensure

that all future applications are compliant, extending the product life for both consumer

electronics manufacturers and consumers.

4.  Compelling user interface: A user interface will play a critical role in the ultimate

success of interactive data services. On-screen menus and controls must be easy to

use, visually engaging and intuitive so that consumers are comfortable with on-line

applications. The next-generation decoder chips must integrate a dedicated graphics

processor to deliver a visually rich experience to the consumer. The decoder chip

should support higher color depths (16 bits/pixel or higher) for vibrant colors, must

have graphics acceleration (bit blitter, hardware cursor, etc.) for faster response time

and perform seamless integration of video and graphics content. The graphics

processor should have anti-flicker circuitry for high-quality display on interlaced TV

monitors and support anti-aliasing for sharper on-screen text. The hardware cursor

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facilitates navigation of menu items. A compelling user experience is essential for

growth of e-commerce and other on-line services on DTV.

5.  Support for multi-sourced powerful CPUs: The next generation DTV decoder solution

should work with powerful CPUs to handle emerging interactive applications based on

new DTV APIs. The decoder should have a “glueless” interface so it can easily

connect to widely used CPUs. By having an open CPU interface, consumer

electronics manufacturers can customize the box design by choosing the appropriate

CPU for different target segments. A low-power CPU can be chosen for a basic STB

used only for displaying TV programming, or a very powerful CPU can be utilized for

enhanced DTV data services applications.

6.  Industry standard host bus interface: The DTV decoder must be designed around a

high-performance bus such as Peripheral Component Interconnect (PCI) interface.

The PCI bus has evolved over several years in the PC industry to become a very stable

and mature interface. Several off-the-shelf PCI peripheral are easily available and

affordable due to economy of scale. This wide range of peripheral chips includes

functionality like super I/O, P1394, USB, V.90 modems and advanced 3-D graphics.

A PCI-based DTV architecture is modular and can be easily upgraded to offer more

functionality to target different market niches. For example, a P1394 or USB port can

be added to a DTV STB for camera connection, or PCI-based 3-D graphics can be

included to offer real-time game action on wide-screen DTV. Two-way connectivity

can be offered by the simple addition of an inexpensive PCI V.90 modem for enhanced

data services. Finally, the PCI bus architecture makes it very easy to upgrade the

CPU. A PCI-based CPU can be easily replaced with a more powerful CPU without

changing the basic design of the box. Consumer electronics manufacturers need only a

single software/hardware effort to develop a range of low- to high-end boxes with

varying degrees of CPU horsepower and memory. The PCI interface significantly

reduces design time and eases software development to enable faster time-to-market

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for DTV products.

7.  Convergence of the PC and DTV: Intel, Microsoft and Compaq have been working

aggressively to bring DTV technology the PC platform. It is only a matter of time

before add-in cards capable of receiving DTV transmission are available for the PC

market. The PC industry has a huge market of more than 100 million units shipped

annually. This offers a lucrative opportunity for cleverly designed DTV decoder chip

solutions. The decoder architecture should facilitate design of PC/DTV add-in cards

to broaden the reach of DTV. PCI based DTV decoder chips will have a significant

advantage in penetrating the PC market, as PC/DTV boards will be easier to design

and upgrade. Compliance with the Windows 98 and Windows CE operating systems

is absolutely necessary for PC platforms.

Figure 2 shows an STB designed with next-generation DTV decoder electronics. The

DTV decoder is highly integrated with superior graphics for rich, enhanced data services,

has a standard PCI interface, uses a multi-sourced powerful CPU and utilizes a unified

memory architecture for a superior DTV solution.

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Figure 2: Next Generation Digital TV

Need for an Open DTV Reference Platform

The availability of a next-generation decoder chip solves only part of the problems faced

by manufacturers due to the complexity of DTV technology. Unlike conventional analog

TV solutions, DTV has a significant software component because of interactive data

services. With emerging DTV APIs and new applications that are coming out, software

development takes a major design effort. The consumer integrated circuit makers must

provide a reference platform designed around the DTV decoder chip to aid the consumer

electronics manufacturers. A comprehensive, system-level solution and reference platform

based on next-generation decoder architecture can drastically reduce time-to-market for

manufacturers. A reference platform enables faster hardware and software development

IR

DTV Tuner Demodulator

TransportStream

Unified M em ory

Dig i ta l V ideo Out

A u d i o O u t

EPROM

Super I/O

FLASH SDRAM

PCI Bus

Hi-perf.

C PUSubsystem

ParallelSerial

IDE

DTV D ecoder

Single ChipMP@ HL Video32-bitGraphicsSharper Text

Transport demu xAudio

Format-Converter

A u x . V i d e o O u tCCIR 601 d ig i ta lNTSC/PAL

Decoder

CCIR601

SDRAM

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of advanced DTV products for consumer electronics manufacturers.

A reference system also provides third-party software developers with an easy-to-use

platform to develop DTV applications. Without such a platform, the software developers

have to wait until the consumer electronics manufacturers produce the DTV STB before

any development work can be started. With a reference platform, the applications can be

developed at the same time the manufacturer is designing the STB. A low-cost, easily

available reference platform is particularly helpful for third-party developers that will help

spur innovations and broaden the base of DTV applications.

A reference platform with an open architecture provides an environment to verify, debug

and validate the hardware, software and peripherals in a real system environment. Device

drivers, RTOS APIs and application software supplied in the reference platform can be

used to demonstrate DTV functionality and ensure a high-quality product. Significant

cost savings and quicker market entry are made possible due to reduced design time for

manufacturers and software developers.

Conclusion

The top 30 broadcast markets represent more than half of all U.S. viewing households,

and as these markets convert to digital signals this year, the market for data services and

DTV products is expected to accelerate. The future of DTV holds many exciting

possibilities for convergence products that go beyond the data services we currently have

or can imagine. Over time, DTV will likely become a multimedia network hub in the

home—something capable of handling DVD, audio, video gaming and other emerging

applications.

In coming months, consumer electronics manufacturers will be barraged with an array of 

DTV decoder solutions from different consumer chip companies. Choosing the right

integrated circuit decoder solution and reference platforms for a next-generation DTV

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product will play a key role in determining the ultimate market success for the product. A

discriminating designer must go beyond the hype and select a chip architecture that is

highly integrated, open, flexible and feature-rich—yet cost-effective—to deliver a

compelling DTV solution for the skeptical consumer.

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